Linus Torvalds 3f173bde7e Pin control fixes for v4.12: ... - Make a few Intel Chromebooks with Cherryview DMI firmware work smoothly. - A fix for some bogus allocations in the generic group management code. - Some GPIO descriptor lookup table stubs. Merged through the pin control tree for administrative reasons. - Revert the "bi-directional" and "output-enable" generic properties: we need more discussions around this. It seems other SoCs are using input/output gate enablement and these terms are not correct. - Fix mux and drive strength atomically in the MXS driver. - Fix the SPDIF function on sunxi A83T. - OF table terminators and other small fixes. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZK9EfAAoJEEEQszewGV1zOWsP/j1eaQajpNgxIQTu7loTKekq kOfMO8LhGd+ZAUh9APr+eeWPBzGVir6EMC8Ha0JgCau33d67AVCkBNWeo+ztIvCP 7R5LUSAi4sFxHZ20kEPIWVWqOFN4Ob/5Ju+ivOvRy47pAL3cvDMhoP7cWM/Curkt k5X4WLJonPAzXEuWG1EvRWOd1w6z1g1prUiOyxFF2vnJgEZ/nckVkhf+BR/kwJZl w4UwPXeuceI4bqL7+L7kzii6ou1fxoKj0GxmsAmdpYTJW3ObV6m7qJd9Kfj0NEgI E+9INh/3R+fs0OVZoyAQf1ufoaByjz/qmCGiyuxLW3aWmmAT1LQhNw/8fZixwZWF aSGD7Fgj+Ub2deCmzTbN7sY5ES8lP3CcYQB2EM0q/uVd94vCqFDuCfh3aHg3Tj4c EGjE9yGcW2vD/CEYewbIluC4Eqp4Sou69+SWvGFQrIDcJjy1JshsNab2lCBTDEJy eD1TpIj1q5LGBSxCmVlJqqRql44H9OVizbbhnoy8uDscSiO8KsZPbUlQX3WIsN/0 WvH6UGRpvrFqY1b4Ek9o2NE8nTO0OkpGwuugEV9rBWK3XKVjbtEI32hydAwZXRXH 0J7iVl7EDg2Lq3h87udtdQAVcdzfnOvtE9R0y45YAgPeItRc7JqP/aoxbtgEMSwE 9f9tGWywFOygE9o6n0DW =S65X -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Here is an overdue pull request for pin control fixes, the most prominent feature is to make Intel Chromebooks (and I suspect any other Cherryview-based Intel thing) happy again, which we really want to see. There is a patch hitting drivers/firmware/* that I was uncertain to who actually manages, but I got Andy Shevchenko's and Dmitry Torokov's review tags on it and I trust them both 100% to do the right thing for Intel platform drivers. Summary: - Make a few Intel Chromebooks with Cherryview DMI firmware work smoothly. - A fix for some bogus allocations in the generic group management code. - Some GPIO descriptor lookup table stubs. Merged through the pin control tree for administrative reasons. - Revert the "bi-directional" and "output-enable" generic properties: we need more discussions around this. It seems other SoCs are using input/output gate enablement and these terms are not correct. - Fix mux and drive strength atomically in the MXS driver. - Fix the SPDIF function on sunxi A83T. - OF table terminators and other small fixes" * tag 'pinctrl-v4.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: sunxi: Fix SPDIF function name for A83T pinctrl: mxs: atomically switch mux and drive strength config pinctrl: cherryview: Extend the Chromebook DMI quirk to Intel_Strago systems firmware: dmi: Add DMI_PRODUCT_FAMILY identification string pinctrl: core: Fix warning by removing bogus code gpiolib: Add stubs for gpiod lookup table interface Revert "pinctrl: generic: Add bi-directional and output-enable" pinctrl: cherryview: Add terminate entry for dmi_system_id tables		2017-05-29 10:05:19 -07:00
..
bindings	Pin control fixes for v4.12:	2017-05-29 10:05:19 -07:00
00-INDEX
booting-without-of.txt	dt: add documentation of "hotpluggable" memory property	2016-12-12 18:55:07 -08:00
changesets.txt	Documentation: devicetree: changesets do locking on their own meanwhile	2016-08-30 17:07:44 -05:00
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt
todo.txt
usage-model.txt