mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 11:20:49 +07:00
40d2d968e9
On exynos5250, exynos5420 and exynos5260 it was observed that, after 1 cycle of S2R, the rtc-tick occurs at a very fast rate as compared to the rtc-tick occuring before S2R. This patch fixes the above issue by correcting the wrong way of save/restore of S3C2410_TICNT for TYPE_S3C64XX. Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
697 lines
17 KiB
C
697 lines
17 KiB
C
/* drivers/rtc/rtc-s3c.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Copyright (c) 2004,2006 Simtec Electronics
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* Ben Dooks, <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* S3C2410/S3C2440/S3C24XX Internal RTC Driver
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*/
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#include <linux/module.h>
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#include <linux/fs.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <linux/clk.h>
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#include <linux/log2.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include "rtc-s3c.h"
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enum s3c_cpu_type {
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TYPE_S3C2410,
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TYPE_S3C2416,
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TYPE_S3C2443,
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TYPE_S3C64XX,
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};
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struct s3c_rtc_drv_data {
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int cpu_type;
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};
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/* I have yet to find an S3C implementation with more than one
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* of these rtc blocks in */
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static struct clk *rtc_clk;
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static void __iomem *s3c_rtc_base;
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static int s3c_rtc_alarmno = NO_IRQ;
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static int s3c_rtc_tickno = NO_IRQ;
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static enum s3c_cpu_type s3c_rtc_cpu_type;
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static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
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static void s3c_rtc_alarm_clk_enable(bool enable)
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{
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static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
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static bool alarm_clk_enabled;
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unsigned long irq_flags;
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spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags);
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if (enable) {
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if (!alarm_clk_enabled) {
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clk_enable(rtc_clk);
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alarm_clk_enabled = true;
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}
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} else {
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if (alarm_clk_enabled) {
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clk_disable(rtc_clk);
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alarm_clk_enabled = false;
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}
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}
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spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags);
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}
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/* IRQ Handlers */
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static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
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{
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struct rtc_device *rdev = id;
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clk_enable(rtc_clk);
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rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
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if (s3c_rtc_cpu_type == TYPE_S3C64XX)
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writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
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clk_disable(rtc_clk);
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s3c_rtc_alarm_clk_enable(false);
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return IRQ_HANDLED;
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}
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static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
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{
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struct rtc_device *rdev = id;
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clk_enable(rtc_clk);
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rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
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if (s3c_rtc_cpu_type == TYPE_S3C64XX)
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writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
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clk_disable(rtc_clk);
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return IRQ_HANDLED;
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}
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/* Update control registers */
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static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
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{
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unsigned int tmp;
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dev_dbg(dev, "%s: aie=%d\n", __func__, enabled);
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clk_enable(rtc_clk);
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tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
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if (enabled)
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tmp |= S3C2410_RTCALM_ALMEN;
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writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
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clk_disable(rtc_clk);
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s3c_rtc_alarm_clk_enable(enabled);
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return 0;
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}
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static int s3c_rtc_setfreq(struct device *dev, int freq)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
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unsigned int tmp = 0;
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int val;
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if (!is_power_of_2(freq))
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return -EINVAL;
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clk_enable(rtc_clk);
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spin_lock_irq(&s3c_rtc_pie_lock);
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if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
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tmp = readb(s3c_rtc_base + S3C2410_TICNT);
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tmp &= S3C2410_TICNT_ENABLE;
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}
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val = (rtc_dev->max_user_freq / freq) - 1;
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if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
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tmp |= S3C2443_TICNT_PART(val);
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writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
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if (s3c_rtc_cpu_type == TYPE_S3C2416)
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writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
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} else {
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tmp |= val;
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}
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writel(tmp, s3c_rtc_base + S3C2410_TICNT);
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spin_unlock_irq(&s3c_rtc_pie_lock);
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clk_disable(rtc_clk);
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return 0;
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}
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/* Time read/write */
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static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
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{
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unsigned int have_retried = 0;
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void __iomem *base = s3c_rtc_base;
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clk_enable(rtc_clk);
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retry_get_time:
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rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
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rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
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rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
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rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
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rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
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rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
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/* the only way to work out whether the system was mid-update
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* when we read it is to check the second counter, and if it
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* is zero, then we re-try the entire read
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*/
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if (rtc_tm->tm_sec == 0 && !have_retried) {
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have_retried = 1;
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goto retry_get_time;
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}
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rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
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rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
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rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
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rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
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rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
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rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
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rtc_tm->tm_year += 100;
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dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
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1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
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rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
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rtc_tm->tm_mon -= 1;
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clk_disable(rtc_clk);
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return rtc_valid_tm(rtc_tm);
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}
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static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
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{
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void __iomem *base = s3c_rtc_base;
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int year = tm->tm_year - 100;
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dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
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1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
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tm->tm_hour, tm->tm_min, tm->tm_sec);
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/* we get around y2k by simply not supporting it */
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if (year < 0 || year >= 100) {
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dev_err(dev, "rtc only supports 100 years\n");
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return -EINVAL;
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}
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clk_enable(rtc_clk);
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writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
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writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
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writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
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writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
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writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
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writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
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clk_disable(rtc_clk);
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return 0;
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}
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static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct rtc_time *alm_tm = &alrm->time;
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void __iomem *base = s3c_rtc_base;
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unsigned int alm_en;
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clk_enable(rtc_clk);
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alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
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alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
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alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
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alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
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alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
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alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
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alm_en = readb(base + S3C2410_RTCALM);
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alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
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dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
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alm_en,
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1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
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alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
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/* decode the alarm enable field */
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if (alm_en & S3C2410_RTCALM_SECEN)
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alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
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else
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alm_tm->tm_sec = -1;
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if (alm_en & S3C2410_RTCALM_MINEN)
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alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
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else
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alm_tm->tm_min = -1;
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if (alm_en & S3C2410_RTCALM_HOUREN)
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alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
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else
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alm_tm->tm_hour = -1;
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if (alm_en & S3C2410_RTCALM_DAYEN)
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alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
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else
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alm_tm->tm_mday = -1;
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if (alm_en & S3C2410_RTCALM_MONEN) {
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alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
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alm_tm->tm_mon -= 1;
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} else {
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alm_tm->tm_mon = -1;
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}
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if (alm_en & S3C2410_RTCALM_YEAREN)
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alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
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else
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alm_tm->tm_year = -1;
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clk_disable(rtc_clk);
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return 0;
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}
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static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct rtc_time *tm = &alrm->time;
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void __iomem *base = s3c_rtc_base;
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unsigned int alrm_en;
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clk_enable(rtc_clk);
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dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
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alrm->enabled,
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1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
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tm->tm_hour, tm->tm_min, tm->tm_sec);
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alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
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writeb(0x00, base + S3C2410_RTCALM);
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if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
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alrm_en |= S3C2410_RTCALM_SECEN;
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writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
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}
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if (tm->tm_min < 60 && tm->tm_min >= 0) {
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alrm_en |= S3C2410_RTCALM_MINEN;
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writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
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}
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if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
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alrm_en |= S3C2410_RTCALM_HOUREN;
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writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
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}
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dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
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writeb(alrm_en, base + S3C2410_RTCALM);
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s3c_rtc_setaie(dev, alrm->enabled);
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clk_disable(rtc_clk);
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return 0;
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}
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static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
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{
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unsigned int ticnt;
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clk_enable(rtc_clk);
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if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
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ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
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ticnt &= S3C64XX_RTCCON_TICEN;
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} else {
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ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
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ticnt &= S3C2410_TICNT_ENABLE;
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}
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seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
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clk_disable(rtc_clk);
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return 0;
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}
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static const struct rtc_class_ops s3c_rtcops = {
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.read_time = s3c_rtc_gettime,
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.set_time = s3c_rtc_settime,
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.read_alarm = s3c_rtc_getalarm,
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.set_alarm = s3c_rtc_setalarm,
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.proc = s3c_rtc_proc,
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.alarm_irq_enable = s3c_rtc_setaie,
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};
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static void s3c_rtc_enable(struct platform_device *pdev, int en)
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{
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void __iomem *base = s3c_rtc_base;
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unsigned int tmp;
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if (s3c_rtc_base == NULL)
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return;
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clk_enable(rtc_clk);
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if (!en) {
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tmp = readw(base + S3C2410_RTCCON);
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if (s3c_rtc_cpu_type == TYPE_S3C64XX)
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tmp &= ~S3C64XX_RTCCON_TICEN;
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tmp &= ~S3C2410_RTCCON_RTCEN;
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writew(tmp, base + S3C2410_RTCCON);
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if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
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tmp = readb(base + S3C2410_TICNT);
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tmp &= ~S3C2410_TICNT_ENABLE;
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writeb(tmp, base + S3C2410_TICNT);
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}
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} else {
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/* re-enable the device, and check it is ok */
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if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
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dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
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tmp = readw(base + S3C2410_RTCCON);
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writew(tmp | S3C2410_RTCCON_RTCEN,
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base + S3C2410_RTCCON);
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}
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if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
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dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
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tmp = readw(base + S3C2410_RTCCON);
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writew(tmp & ~S3C2410_RTCCON_CNTSEL,
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base + S3C2410_RTCCON);
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}
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if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
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dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
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tmp = readw(base + S3C2410_RTCCON);
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writew(tmp & ~S3C2410_RTCCON_CLKRST,
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base + S3C2410_RTCCON);
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}
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}
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clk_disable(rtc_clk);
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}
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static int s3c_rtc_remove(struct platform_device *dev)
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{
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s3c_rtc_setaie(&dev->dev, 0);
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clk_unprepare(rtc_clk);
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rtc_clk = NULL;
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return 0;
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}
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static const struct of_device_id s3c_rtc_dt_match[];
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static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
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{
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#ifdef CONFIG_OF
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struct s3c_rtc_drv_data *data;
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if (pdev->dev.of_node) {
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const struct of_device_id *match;
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match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
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data = (struct s3c_rtc_drv_data *) match->data;
|
|
return data->cpu_type;
|
|
}
|
|
#endif
|
|
return platform_get_device_id(pdev)->driver_data;
|
|
}
|
|
|
|
static int s3c_rtc_probe(struct platform_device *pdev)
|
|
{
|
|
struct rtc_device *rtc;
|
|
struct rtc_time rtc_tm;
|
|
struct resource *res;
|
|
int ret;
|
|
int tmp;
|
|
|
|
dev_dbg(&pdev->dev, "%s: probe=%p\n", __func__, pdev);
|
|
|
|
/* find the IRQs */
|
|
|
|
s3c_rtc_tickno = platform_get_irq(pdev, 1);
|
|
if (s3c_rtc_tickno < 0) {
|
|
dev_err(&pdev->dev, "no irq for rtc tick\n");
|
|
return s3c_rtc_tickno;
|
|
}
|
|
|
|
s3c_rtc_alarmno = platform_get_irq(pdev, 0);
|
|
if (s3c_rtc_alarmno < 0) {
|
|
dev_err(&pdev->dev, "no irq for alarm\n");
|
|
return s3c_rtc_alarmno;
|
|
}
|
|
|
|
dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
|
|
s3c_rtc_tickno, s3c_rtc_alarmno);
|
|
|
|
/* get the memory region */
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
s3c_rtc_base = devm_ioremap_resource(&pdev->dev, res);
|
|
if (IS_ERR(s3c_rtc_base))
|
|
return PTR_ERR(s3c_rtc_base);
|
|
|
|
rtc_clk = devm_clk_get(&pdev->dev, "rtc");
|
|
if (IS_ERR(rtc_clk)) {
|
|
dev_err(&pdev->dev, "failed to find rtc clock source\n");
|
|
ret = PTR_ERR(rtc_clk);
|
|
rtc_clk = NULL;
|
|
return ret;
|
|
}
|
|
|
|
clk_prepare_enable(rtc_clk);
|
|
|
|
/* check to see if everything is setup correctly */
|
|
|
|
s3c_rtc_enable(pdev, 1);
|
|
|
|
dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
|
|
readw(s3c_rtc_base + S3C2410_RTCCON));
|
|
|
|
device_init_wakeup(&pdev->dev, 1);
|
|
|
|
/* register RTC and exit */
|
|
|
|
rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
|
|
THIS_MODULE);
|
|
|
|
if (IS_ERR(rtc)) {
|
|
dev_err(&pdev->dev, "cannot attach rtc\n");
|
|
ret = PTR_ERR(rtc);
|
|
goto err_nortc;
|
|
}
|
|
|
|
s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
|
|
|
|
/* Check RTC Time */
|
|
|
|
s3c_rtc_gettime(NULL, &rtc_tm);
|
|
|
|
if (rtc_valid_tm(&rtc_tm)) {
|
|
rtc_tm.tm_year = 100;
|
|
rtc_tm.tm_mon = 0;
|
|
rtc_tm.tm_mday = 1;
|
|
rtc_tm.tm_hour = 0;
|
|
rtc_tm.tm_min = 0;
|
|
rtc_tm.tm_sec = 0;
|
|
|
|
s3c_rtc_settime(NULL, &rtc_tm);
|
|
|
|
dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
|
|
}
|
|
|
|
if (s3c_rtc_cpu_type != TYPE_S3C2410)
|
|
rtc->max_user_freq = 32768;
|
|
else
|
|
rtc->max_user_freq = 128;
|
|
|
|
if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
|
|
tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
|
|
tmp |= S3C2443_RTCCON_TICSEL;
|
|
writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
|
|
}
|
|
|
|
platform_set_drvdata(pdev, rtc);
|
|
|
|
s3c_rtc_setfreq(&pdev->dev, 1);
|
|
|
|
ret = devm_request_irq(&pdev->dev, s3c_rtc_alarmno, s3c_rtc_alarmirq,
|
|
0, "s3c2410-rtc alarm", rtc);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
|
|
goto err_nortc;
|
|
}
|
|
|
|
ret = devm_request_irq(&pdev->dev, s3c_rtc_tickno, s3c_rtc_tickirq,
|
|
0, "s3c2410-rtc tick", rtc);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
|
|
goto err_nortc;
|
|
}
|
|
|
|
clk_disable(rtc_clk);
|
|
|
|
return 0;
|
|
|
|
err_nortc:
|
|
s3c_rtc_enable(pdev, 0);
|
|
clk_disable_unprepare(rtc_clk);
|
|
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
/* RTC Power management control */
|
|
|
|
static int ticnt_save, ticnt_en_save;
|
|
static bool wake_en;
|
|
|
|
static int s3c_rtc_suspend(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
clk_enable(rtc_clk);
|
|
/* save TICNT for anyone using periodic interrupts */
|
|
if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
|
|
ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
|
|
ticnt_en_save &= S3C64XX_RTCCON_TICEN;
|
|
ticnt_save = readl(s3c_rtc_base + S3C2410_TICNT);
|
|
} else {
|
|
ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
|
|
}
|
|
s3c_rtc_enable(pdev, 0);
|
|
|
|
if (device_may_wakeup(dev) && !wake_en) {
|
|
if (enable_irq_wake(s3c_rtc_alarmno) == 0)
|
|
wake_en = true;
|
|
else
|
|
dev_err(dev, "enable_irq_wake failed\n");
|
|
}
|
|
clk_disable(rtc_clk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int s3c_rtc_resume(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
unsigned int tmp;
|
|
|
|
clk_enable(rtc_clk);
|
|
s3c_rtc_enable(pdev, 1);
|
|
if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
|
|
writel(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
|
|
if (ticnt_en_save) {
|
|
tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
|
|
writew(tmp | ticnt_en_save,
|
|
s3c_rtc_base + S3C2410_RTCCON);
|
|
}
|
|
} else {
|
|
writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
|
|
}
|
|
|
|
if (device_may_wakeup(dev) && wake_en) {
|
|
disable_irq_wake(s3c_rtc_alarmno);
|
|
wake_en = false;
|
|
}
|
|
clk_disable(rtc_clk);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
|
|
|
|
#ifdef CONFIG_OF
|
|
static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = {
|
|
[TYPE_S3C2410] = { TYPE_S3C2410 },
|
|
[TYPE_S3C2416] = { TYPE_S3C2416 },
|
|
[TYPE_S3C2443] = { TYPE_S3C2443 },
|
|
[TYPE_S3C64XX] = { TYPE_S3C64XX },
|
|
};
|
|
|
|
static const struct of_device_id s3c_rtc_dt_match[] = {
|
|
{
|
|
.compatible = "samsung,s3c2410-rtc",
|
|
.data = &s3c_rtc_drv_data_array[TYPE_S3C2410],
|
|
}, {
|
|
.compatible = "samsung,s3c2416-rtc",
|
|
.data = &s3c_rtc_drv_data_array[TYPE_S3C2416],
|
|
}, {
|
|
.compatible = "samsung,s3c2443-rtc",
|
|
.data = &s3c_rtc_drv_data_array[TYPE_S3C2443],
|
|
}, {
|
|
.compatible = "samsung,s3c6410-rtc",
|
|
.data = &s3c_rtc_drv_data_array[TYPE_S3C64XX],
|
|
},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
|
|
#endif
|
|
|
|
static struct platform_device_id s3c_rtc_driver_ids[] = {
|
|
{
|
|
.name = "s3c2410-rtc",
|
|
.driver_data = TYPE_S3C2410,
|
|
}, {
|
|
.name = "s3c2416-rtc",
|
|
.driver_data = TYPE_S3C2416,
|
|
}, {
|
|
.name = "s3c2443-rtc",
|
|
.driver_data = TYPE_S3C2443,
|
|
}, {
|
|
.name = "s3c64xx-rtc",
|
|
.driver_data = TYPE_S3C64XX,
|
|
},
|
|
{ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
|
|
|
|
static struct platform_driver s3c_rtc_driver = {
|
|
.probe = s3c_rtc_probe,
|
|
.remove = s3c_rtc_remove,
|
|
.id_table = s3c_rtc_driver_ids,
|
|
.driver = {
|
|
.name = "s3c-rtc",
|
|
.owner = THIS_MODULE,
|
|
.pm = &s3c_rtc_pm_ops,
|
|
.of_match_table = of_match_ptr(s3c_rtc_dt_match),
|
|
},
|
|
};
|
|
|
|
module_platform_driver(s3c_rtc_driver);
|
|
|
|
MODULE_DESCRIPTION("Samsung S3C RTC Driver");
|
|
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:s3c2410-rtc");
|