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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ed0bc98f8c
This implements the tricky tracing and soft irq handling bits in C, leaving the low level bit to asm. A functional difference is that this redirects the interrupt exit to a return stub to execute blr, rather than the lr address itself. This is probably barely measurable on real hardware, but it keeps the link stack balanced. Tested with QEMU. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [mpe: Move power4_fixup_nap back into exceptions-64s.S] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20190711022404.18132-1-npiggin@gmail.com
137 lines
2.7 KiB
C
137 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Idle daemon for PowerPC. Idle daemon will handle any action
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* that needs to be taken when the system becomes idle.
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*
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* Originally written by Cort Dougan (cort@cs.nmt.edu).
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* Subsequent 32-bit hacking by Tom Rini, Armin Kuster,
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* Paul Mackerras and others.
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*
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* iSeries supported added by Mike Corrigan <mikejc@us.ibm.com>
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*
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* Additional shared processor, SMT, and firmware support
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* Copyright (c) 2003 Dave Engebretsen <engebret@us.ibm.com>
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*
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* 32-bit and 64-bit versions merged by Paul Mackerras <paulus@samba.org>
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*/
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <linux/cpu.h>
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#include <linux/sysctl.h>
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#include <linux/tick.h>
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#include <asm/processor.h>
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#include <asm/cputable.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/runlatch.h>
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#include <asm/smp.h>
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unsigned long cpuidle_disable = IDLE_NO_OVERRIDE;
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EXPORT_SYMBOL(cpuidle_disable);
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static int __init powersave_off(char *arg)
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{
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ppc_md.power_save = NULL;
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cpuidle_disable = IDLE_POWERSAVE_OFF;
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return 0;
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}
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__setup("powersave=off", powersave_off);
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#ifdef CONFIG_HOTPLUG_CPU
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void arch_cpu_idle_dead(void)
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{
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sched_preempt_enable_no_resched();
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cpu_die();
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}
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#endif
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void arch_cpu_idle(void)
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{
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ppc64_runlatch_off();
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if (ppc_md.power_save) {
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ppc_md.power_save();
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/*
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* Some power_save functions return with
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* interrupts enabled, some don't.
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*/
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if (irqs_disabled())
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local_irq_enable();
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} else {
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local_irq_enable();
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/*
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* Go into low thread priority and possibly
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* low power mode.
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*/
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HMT_low();
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HMT_very_low();
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}
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HMT_medium();
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ppc64_runlatch_on();
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}
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int powersave_nap;
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#ifdef CONFIG_PPC_970_NAP
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void power4_idle(void)
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{
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if (!cpu_has_feature(CPU_FTR_CAN_NAP))
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return;
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if (!powersave_nap)
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return;
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if (!prep_irq_for_idle())
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return;
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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asm volatile("DSSALL ; sync" ::: "memory");
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power4_idle_nap();
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/*
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* power4_idle_nap returns with interrupts enabled (soft and hard).
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* to our caller with interrupts enabled (soft and hard). Our caller
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* can cope with either interrupts disabled or enabled upon return.
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*/
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}
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#endif
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#ifdef CONFIG_SYSCTL
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/*
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* Register the sysctl to set/clear powersave_nap.
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*/
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static struct ctl_table powersave_nap_ctl_table[] = {
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{
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.procname = "powersave-nap",
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.data = &powersave_nap,
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.maxlen = sizeof(int),
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.mode = 0644,
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.proc_handler = proc_dointvec,
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},
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{}
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};
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static struct ctl_table powersave_nap_sysctl_root[] = {
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{
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.procname = "kernel",
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.mode = 0555,
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.child = powersave_nap_ctl_table,
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},
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{}
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};
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static int __init
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register_powersave_nap_sysctl(void)
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{
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register_sysctl_table(powersave_nap_sysctl_root);
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return 0;
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}
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__initcall(register_powersave_nap_sysctl);
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#endif
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