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5d81f7dc9b
Now that all our infrastructure is in place, let's expose the availability of ARCH_WORKAROUND_2 to guests. We take this opportunity to tidy up a couple of SMCCC constants. Acked-by: Christoffer Dall <christoffer.dall@arm.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
132 lines
3.2 KiB
C
132 lines
3.2 KiB
C
/*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* Derived from arch/arm/kvm/reset.c
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/errno.h>
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#include <linux/kvm_host.h>
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#include <linux/kvm.h>
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#include <linux/hw_breakpoint.h>
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#include <kvm/arm_arch_timer.h>
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#include <asm/cputype.h>
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#include <asm/ptrace.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_coproc.h>
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#include <asm/kvm_mmu.h>
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/*
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* ARMv8 Reset Values
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*/
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static const struct kvm_regs default_regs_reset = {
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.regs.pstate = (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT |
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PSR_F_BIT | PSR_D_BIT),
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};
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static const struct kvm_regs default_regs_reset32 = {
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.regs.pstate = (COMPAT_PSR_MODE_SVC | COMPAT_PSR_A_BIT |
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COMPAT_PSR_I_BIT | COMPAT_PSR_F_BIT),
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};
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static bool cpu_has_32bit_el1(void)
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{
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u64 pfr0;
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pfr0 = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);
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return !!(pfr0 & 0x20);
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}
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/**
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* kvm_arch_dev_ioctl_check_extension
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*
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* We currently assume that the number of HW registers is uniform
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* across all CPUs (see cpuinfo_sanity_check).
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*/
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int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
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{
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int r;
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switch (ext) {
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case KVM_CAP_ARM_EL1_32BIT:
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r = cpu_has_32bit_el1();
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break;
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case KVM_CAP_GUEST_DEBUG_HW_BPS:
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r = get_num_brps();
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break;
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case KVM_CAP_GUEST_DEBUG_HW_WPS:
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r = get_num_wrps();
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break;
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case KVM_CAP_ARM_PMU_V3:
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r = kvm_arm_support_pmu_v3();
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break;
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case KVM_CAP_SET_GUEST_DEBUG:
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case KVM_CAP_VCPU_ATTRIBUTES:
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r = 1;
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break;
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default:
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r = 0;
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}
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return r;
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}
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/**
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* kvm_reset_vcpu - sets core registers and sys_regs to reset value
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* @vcpu: The VCPU pointer
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*
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* This function finds the right table above and sets the registers on
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* the virtual CPU struct to their architecturally defined reset
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* values.
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*/
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int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
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{
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const struct kvm_regs *cpu_reset;
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switch (vcpu->arch.target) {
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default:
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if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) {
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if (!cpu_has_32bit_el1())
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return -EINVAL;
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cpu_reset = &default_regs_reset32;
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} else {
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cpu_reset = &default_regs_reset;
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}
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break;
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}
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/* Reset core registers */
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memcpy(vcpu_gp_regs(vcpu), cpu_reset, sizeof(*cpu_reset));
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/* Reset system registers */
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kvm_reset_sys_regs(vcpu);
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/* Reset PMU */
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kvm_pmu_vcpu_reset(vcpu);
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/* Default workaround setup is enabled (if supported) */
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if (kvm_arm_have_ssbd() == KVM_SSBD_KERNEL)
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vcpu->arch.workaround_flags |= VCPU_WORKAROUND_2_FLAG;
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/* Reset timer */
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return kvm_timer_vcpu_reset(vcpu);
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}
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