Anthony Koo 5ed78cd69a drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP ... [Why] It is confusing to sinks if we send VSC SDP only on some format. Today we signal colorimetry format using MSA while in formats like sRGB. But when we switch to BT2020 we set the bit to ignore MSA colorimetry and instead use the colorimetry information in the VSC SDP. But if sink supports signaling of colorimetry via VSC SDP we should always set the MSA MISC1 bit 6, instead of doing so selectively. [How] If sink supports signaling of colorimetry via VSC SDP, and we are sending the colorimetry info via VSC SDP with packet revision 05h, then always set MSA MISC1 bit 6. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-11-13 15:29:43 -05:00
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color	drm/amd/display: Only use EETF when maxCL > max display	2019-10-25 16:50:09 -04:00
freesync	drm/amd/display: Add capability check for static ramp calc	2019-10-10 19:34:20 -05:00
hdcp	drm/amd/display: fix spelling mistake AUTHENICATED -> AUTHENTICATED	2019-10-03 13:51:19 -05:00
inc	drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP	2019-11-13 15:29:43 -05:00
info_packet	drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP	2019-11-13 15:29:43 -05:00
power	drm/amd/display: set minimum abm backlight level	2019-10-03 09:10:57 -05:00
stats	drm/amd/display: remove redundant null pointer check before kfree	2018-09-26 21:09:12 -05:00
vmid	drm/amd/display: add missing mod_vmid destructor	2019-06-22 09:34:14 -05:00