Kulkarni, Ganapatrao d6310a3f33 Documentation: perf: Add documentation for ThunderX2 PMU uncore driver ... The SoC has PMU support in its L3 cache controller (L3C) and in the DDR4 Memory Controller (DMC). Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com> [will: minor spelling and format fixes, dropped events list] Signed-off-by: Will Deacon <will.deacon@arm.com>		2018-12-06 12:29:47 +00:00
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arm_dsu_pmu.txt	perf: ARM DynamIQ Shared Unit PMU support	2018-01-02 16:43:12 +00:00
arm-ccn.txt	drivers/bus: Move Arm CCN PMU driver	2018-03-06 17:26:15 +01:00
hisi-pmu.txt	Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver	2017-10-19 17:06:34 +01:00
qcom_l2_pmu.txt	perf: add qcom l2 cache perf events driver	2017-02-08 19:32:24 +00:00
qcom_l3_pmu.txt	perf: qcom: Add L3 cache PMU driver	2017-04-03 18:53:50 +01:00
thunderx2-pmu.txt	Documentation: perf: Add documentation for ThunderX2 PMU uncore driver	2018-12-06 12:29:47 +00:00
xgene-pmu.txt