mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-20 18:56:48 +07:00
58c05c823b
- NXP i.MX7ULP SoC clock support - Support for i.MX8QXP SoC clocks - Support for NXP i.MX8MQ clock controllers * clk-imx7ulp: clk: imx: add imx7ulp clk driver clk: imx: implement new clk_hw based APIs clk: imx: make mux parent strings const dt-bindings: clock: add imx7ulp clock binding doc clk: imx: add imx7ulp composite clk support clk: imx: add pfdv2 support clk: imx: add pllv4 support clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support clk: imx: add gatable clock divider support * clk-imx6-fixes: clk: imx6q: handle ENET PLL bypass clk: imx6q: optionally get CCM inputs via standard clock handles clk: imx6q: reset exclusive gates on init * clk-imx-fixes: clk: imx6q: add DCICx clocks gate clk: imx6sl: ensure MMDC CH0 handshake is bypassed clk: imx7d: remove UART1 clock setting * clk-imx8qxp: clk: imx: add imx8qxp lpcg driver clk: imx: add lpcg clock support clk: imx: add imx8qxp clk driver clk: imx: add scu clock common part clk: imx: add configuration option for mmio clks dt-bindings: clock: add imx8qxp lpcg clock binding dt-bindings: clock: imx8qxp: add SCU clock IDs firmware: imx: add pm svc headfile dt-bindings: fsl: scu: update power domain binding firmware: imx: remove resource id enums dt-bindings: imx: add scu resource id headfile * clk-imx8mq: clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant clk: imx: remove redundant initialization of ret to zero clk: imx: Add SCCG PLL type clk: imx: Add fractional PLL output clock clk: imx: Add clock driver for i.MX8MQ CCM clk: imx: Add imx composite clock dt-bindings: Add binding for i.MX8MQ CCM
45 lines
1.1 KiB
Makefile
45 lines
1.1 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_MXC_CLK) += \
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clk.o \
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clk-busy.o \
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clk-composite-8m.o \
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clk-cpu.o \
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clk-composite-7ulp.o \
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clk-divider-gate.o \
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clk-fixup-div.o \
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clk-fixup-mux.o \
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clk-frac-pll.o \
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clk-gate-exclusive.o \
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clk-gate2.o \
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clk-pfd.o \
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clk-pfdv2.o \
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clk-pllv1.o \
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clk-pllv2.o \
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clk-pllv3.o \
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clk-pllv4.o \
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clk-sccg-pll.o
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obj-$(CONFIG_MXC_CLK_SCU) += \
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clk-scu.o \
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clk-lpcg-scu.o
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obj-$(CONFIG_CLK_IMX8MQ) += clk-imx8mq.o
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obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o
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obj-$(CONFIG_SOC_IMX1) += clk-imx1.o
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obj-$(CONFIG_SOC_IMX21) += clk-imx21.o
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obj-$(CONFIG_SOC_IMX25) += clk-imx25.o
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obj-$(CONFIG_SOC_IMX27) += clk-imx27.o
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obj-$(CONFIG_SOC_IMX31) += clk-imx31.o
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obj-$(CONFIG_SOC_IMX35) += clk-imx35.o
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obj-$(CONFIG_SOC_IMX5) += clk-imx51-imx53.o
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obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o
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obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o
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obj-$(CONFIG_SOC_IMX6SLL) += clk-imx6sll.o
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obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o
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obj-$(CONFIG_SOC_IMX6UL) += clk-imx6ul.o
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obj-$(CONFIG_SOC_IMX7D) += clk-imx7d.o
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obj-$(CONFIG_SOC_IMX7ULP) += clk-imx7ulp.o
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obj-$(CONFIG_SOC_VF610) += clk-vf610.o
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