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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 03:06:46 +07:00
2d4d3b5d45
The Kconfig currently controlling compilation of this code is: config BF561_COREB bool "Enable Core B loader" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_misc_device translates to device_initcall in the non-modular case, the init ordering remains unchanged with this commit. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: Bas Vermeulen <bvermeul@blackstar.xs4all.nl> Cc: Steven Miao <realmz6@gmail.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
65 lines
1.6 KiB
C
65 lines
1.6 KiB
C
/* Load firmware into Core B on a BF561
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*
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* Author: Bas Vermeulen <bvermeul@blackstar.xs4all.nl>
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*
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* Copyright 2004-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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*/
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/* The Core B reset func requires code in the application that is loaded into
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* Core B. In order to reset, the application needs to install an interrupt
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* handler for Supplemental Interrupt 0, that sets RETI to 0xff600000 and
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* writes bit 11 of SICB_SYSCR when bit 5 of SICA_SYSCR is 0. This causes Core
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* B to stall when Supplemental Interrupt 0 is set, and will reset PC to
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* 0xff600000 when COREB_SRAM_INIT is cleared.
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*/
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#include <linux/device.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/miscdevice.h>
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#define CMD_COREB_START _IO('b', 0)
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#define CMD_COREB_STOP _IO('b', 1)
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#define CMD_COREB_RESET _IO('b', 2)
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static long
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coreb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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{
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int ret = 0;
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switch (cmd) {
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case CMD_COREB_START:
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bfin_write_SYSCR(bfin_read_SYSCR() & ~0x0020);
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break;
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case CMD_COREB_STOP:
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bfin_write_SYSCR(bfin_read_SYSCR() | 0x0020);
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bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080);
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break;
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case CMD_COREB_RESET:
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bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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CSYNC();
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return ret;
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}
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static const struct file_operations coreb_fops = {
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.owner = THIS_MODULE,
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.unlocked_ioctl = coreb_ioctl,
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.llseek = noop_llseek,
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};
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static struct miscdevice coreb_dev = {
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.minor = MISC_DYNAMIC_MINOR,
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.name = "coreb",
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.fops = &coreb_fops,
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};
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builtin_misc_device(coreb_dev);
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