Marek Szyprowski 5dcbeca615 clk: samsung: exynos4: Enable VPLL and EPLL clocks for suspend/resume cycle ... Commit 6edfa11cb3 ("clk: samsung: Add enable/disable operation for PLL36XX clocks") added enable/disable operations to PLL clocks. Prior that VPLL and EPPL clocks were always enabled because the enable bit was never touched. Those clocks have to be enabled during suspend/resume cycle, because otherwise board fails to enter sleep mode. This patch enables them unconditionally before entering system suspend state. System restore function will set them to the previous state saved in the register cache done before that unconditional enable. Fixes: 6edfa11cb3 ("clk: samsung: Add enable/disable operation for PLL36XX clocks") CC: stable@vger.kernel.org # v4.13 Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>		2017-10-04 09:19:13 -07:00
..
at91	clk: at91: clk-generated: make gclk determine audio_pll rate	2017-09-01 15:46:54 -07:00
axis
axs10x	clk: axs10x: introduce AXS10X pll driver	2017-07-17 11:50:59 -07:00
bcm	clk: iproc: Remove __init marking on iproc_pll_clk_setup()	2017-06-21 09:12:57 -07:00
berlin	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
h8300
hisilicon	clk: hi6220: change watchdog clock source	2017-08-31 18:32:43 -07:00
imgtec	clk: boston: Add a driver for MIPS Boston board clocks	2017-07-11 14:13:06 +02:00
imx	clk: imx51: propagate rate across ipu_di*_sel	2017-08-31 11:30:47 -07:00
ingenic
keystone	clk: keystone: sci-clk: Fix sci_clk_get	2017-08-02 18:37:26 -07:00
loongson1
mediatek	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
meson	Amlogic clock driver updates for 4.14	2017-08-23 15:28:52 -07:00
microchip
mmp	clk: mmp: Drop unnecessary static	2017-07-17 18:31:06 -07:00
mvebu	clk: mvebu: cp110: Minor cleanups	2017-06-19 17:14:11 -07:00
mxs
nxp	clk: nxp: clk-lpc32xx: rename clk_gate_is_enabled()	2017-08-31 18:35:44 -07:00
pistachio
pxa
qcom	clk: msm8996-gcc: add missing smmu clks	2017-08-23 16:07:18 -07:00
renesas	clk: renesas: Updates for v4.14	2017-08-23 15:39:58 -07:00
rockchip	clk: rockchip: add sclk_timer5 as critical clock on rk3128	2017-09-17 01:55:36 +02:00
samsung	clk: samsung: exynos4: Enable VPLL and EPLL clocks for suspend/resume cycle	2017-10-04 09:19:13 -07:00
sirf
socfpga	clk: socfpga: Fix the smplsel on Arria10 and Stratix10	2017-06-19 17:01:55 -07:00
spear
st
sunxi	clk: sunxi: fix uninitialized access	2017-08-30 22:39:49 -07:00
sunxi-ng	The diff is dominated by the Allwinner A10/A20 SoCs getting converted to	2017-09-13 11:04:14 -07:00
tegra	clk: tegra: Fix Tegra210 PLLU initialization	2017-08-23 16:00:42 -07:00
ti	clk: ti: check for null return in strrchr to avoid null dereferencing	2017-08-31 18:44:13 -07:00
uniphier	clk: uniphier: add video input subsystem clock	2017-08-31 18:41:14 -07:00
ux500	clk: ux500: prcc: constify clk_ops.	2017-08-30 22:27:49 -07:00
versatile	clk: versatile: make clk_ops const	2017-08-30 22:38:59 -07:00
x86	clk: x86: Do not gate clocks enabled by the firmware	2017-07-18 16:23:13 -07:00
zte	clk: zte: constify clk_div_table	2017-08-30 22:30:30 -07:00
zynq
clk-asm9260.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
clk-axi-clkgen.c
clk-axm5516.c
clk-bulk.c	clk: Export clk_bulk_prepare()	2017-09-29 14:17:17 -07:00
clk-cdce706.c
clk-cdce925.c
clk-clps711x.c
clk-composite.c
clk-conf.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
clk-cs2000-cp.c	clk: cs2000: Add cs2000_set_saved_rate	2017-08-31 11:32:32 -07:00
clk-devres.c	clk: add managed version of clk_bulk_get	2017-06-02 15:37:49 -07:00
clk-divider.c	clk: Don't write error code into divider register	2017-08-31 18:43:38 -07:00
clk-efm32gg.c
clk-fixed-factor.c
clk-fixed-rate.c
clk-fractional-divider.c	clk: fractional-divider: allow overriding of approximation	2017-08-08 17:39:48 +02:00
clk-gate.c	clk: gate: expose clk_gate_ops::is_enabled	2017-08-31 18:35:45 -07:00
clk-gemini.c	clk: gemini: hands off PCI OE bit	2017-08-30 22:29:11 -07:00
clk-gpio.c
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c	ARC: clk: introduce HSDK pll driver	2017-08-30 22:36:05 -07:00
clk-max77686.c
clk-moxart.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
clk-multiplier.c
clk-mux.c
clk-nomadik.c
clk-nspire.c
clk-oxnas.c
clk-palmas.c	clk: palmas: undo preparation of a clock source.	2017-06-02 10:51:34 -07:00
clk-pwm.c
clk-qoriq.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
clk-rk808.c
clk-s2mps11.c
clk-scpi.c	clk: scpi: error when clock fails to register	2017-06-29 18:47:35 -07:00
clk-si514.c
clk-si570.c
clk-si5351.c	clk: si5351: fix PLL reset	2017-09-01 16:00:54 -07:00
clk-si5351.h
clk-stm32f4.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
clk-stm32h7.c	clk: stm32h7: Add stm32h743 clock driver	2017-08-31 18:35:47 -07:00
clk-tango4.c
clk-twl6040.c
clk-u300.c
clk-versaclock5.c	clk: vc5: Add support for IDT VersaClock 5P49V5925	2017-07-17 11:51:00 -07:00
clk-vt8500.c
clk-wm831x.c
clk-xgene.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
clk.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
clk.h
clkdev.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
Kconfig	clk: Kconfig: Name RK805 in Kconfig for COMMON_CLK_RK808	2017-08-31 16:20:12 -07:00
Makefile	clk: mb86s7x: Drop non-building driver	2017-09-01 13:31:24 -07:00