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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7c11af9fcd
The existing code uses two handlers for a shared edge-based MSI interrupts. In corner cases, interrupts are lost, leading to IPC timeouts. Those timeouts do not appear in legacy mode. This patch merges the two handlers and threads into a single one, and simplifies the mask/unmask operations by using a single top-level mask (Global Interrupt Enable). The handler only checks for interrupt sources using the Global Interrupt Status (GIS) field, and all the actual work happens in the thread. This also enables us to remove the use of spin locks. Stream events are prioritized over IPC ones. This patch was tested with HDaudio and SoundWire platforms, and all known IPC timeout issues are solved in MSI mode. The SoundWire-specific patches will be provided in follow-up patches, where the SoundWire interrupts are handled in the same thread as IPC and stream interrupts. Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20191204212859.13239-1-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
125 lines
3.4 KiB
C
125 lines
3.4 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2018 Intel Corporation. All rights reserved.
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//
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// Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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// Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
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// Rander Wang <rander.wang@intel.com>
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// Keyon Jie <yang.jie@linux.intel.com>
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//
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/*
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* Hardware interface for audio DSP on Apollolake and GeminiLake
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*/
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#include "../sof-priv.h"
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#include "hda.h"
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static const struct snd_sof_debugfs_map apl_dsp_debugfs[] = {
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{"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
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{"pp", HDA_DSP_PP_BAR, 0, 0x1000, SOF_DEBUGFS_ACCESS_ALWAYS},
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{"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
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};
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/* apollolake ops */
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const struct snd_sof_dsp_ops sof_apl_ops = {
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/* probe and remove */
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.probe = hda_dsp_probe,
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.remove = hda_dsp_remove,
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/* Register IO */
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.write = sof_io_write,
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.read = sof_io_read,
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.write64 = sof_io_write64,
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.read64 = sof_io_read64,
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/* Block IO */
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.block_read = sof_block_read,
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.block_write = sof_block_write,
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/* doorbell */
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.irq_thread = hda_dsp_ipc_irq_thread,
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/* ipc */
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.send_msg = hda_dsp_ipc_send_msg,
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.fw_ready = sof_fw_ready,
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.get_mailbox_offset = hda_dsp_ipc_get_mailbox_offset,
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.get_window_offset = hda_dsp_ipc_get_window_offset,
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.ipc_msg_data = hda_ipc_msg_data,
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.ipc_pcm_params = hda_ipc_pcm_params,
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/* debug */
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.debug_map = apl_dsp_debugfs,
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.debug_map_count = ARRAY_SIZE(apl_dsp_debugfs),
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.dbg_dump = hda_dsp_dump,
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.ipc_dump = hda_ipc_dump,
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/* stream callbacks */
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.pcm_open = hda_dsp_pcm_open,
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.pcm_close = hda_dsp_pcm_close,
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.pcm_hw_params = hda_dsp_pcm_hw_params,
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.pcm_hw_free = hda_dsp_stream_hw_free,
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.pcm_trigger = hda_dsp_pcm_trigger,
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.pcm_pointer = hda_dsp_pcm_pointer,
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/* firmware loading */
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.load_firmware = snd_sof_load_firmware_raw,
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/* firmware run */
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.run = hda_dsp_cl_boot_firmware,
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/* pre/post fw run */
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.pre_fw_run = hda_dsp_pre_fw_run,
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.post_fw_run = hda_dsp_post_fw_run,
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/* dsp core power up/down */
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.core_power_up = hda_dsp_enable_core,
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.core_power_down = hda_dsp_core_reset_power_down,
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/* trace callback */
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.trace_init = hda_dsp_trace_init,
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.trace_release = hda_dsp_trace_release,
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.trace_trigger = hda_dsp_trace_trigger,
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/* DAI drivers */
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.drv = skl_dai,
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.num_drv = SOF_SKL_NUM_DAIS,
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/* PM */
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.suspend = hda_dsp_suspend,
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.resume = hda_dsp_resume,
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.runtime_suspend = hda_dsp_runtime_suspend,
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.runtime_resume = hda_dsp_runtime_resume,
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.runtime_idle = hda_dsp_runtime_idle,
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.set_hw_params_upon_resume = hda_dsp_set_hw_params_upon_resume,
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.set_power_state = hda_dsp_set_power_state,
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/* ALSA HW info flags */
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.hw_info = SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_PAUSE |
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SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
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};
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EXPORT_SYMBOL(sof_apl_ops);
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const struct sof_intel_dsp_desc apl_chip_info = {
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/* Apollolake */
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.cores_num = 2,
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.init_core_mask = 1,
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.cores_mask = HDA_DSP_CORE_MASK(0) | HDA_DSP_CORE_MASK(1),
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.ipc_req = HDA_DSP_REG_HIPCI,
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.ipc_req_mask = HDA_DSP_REG_HIPCI_BUSY,
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.ipc_ack = HDA_DSP_REG_HIPCIE,
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.ipc_ack_mask = HDA_DSP_REG_HIPCIE_DONE,
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.ipc_ctl = HDA_DSP_REG_HIPCCTL,
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.rom_init_timeout = 150,
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.ssp_count = APL_SSP_COUNT,
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.ssp_base_offset = APL_SSP_BASE_OFFSET,
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};
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EXPORT_SYMBOL(apl_chip_info);
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