linux_dsm_epyc7002/drivers/gpu/drm/amd/display/dc/dcn20
Bhawanpreet Lakha aca935c7cc drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag
[Why]

DCN21 is stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup Renoir definitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN21 code in the following files:
    * clk_mgr/clk_mgr.c: dc_clk_mgr_create()
    * core/dc_resources.c: dc_create_resource_pool()
    * gpio/hw_factory.c: dal_hw_factory_init()
    * gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-13 15:29:44 -05:00
..
dcn20_dccg.c drm/amd/display: Revert fixup DPP programming sequence 2019-10-03 09:10:51 -05:00
dcn20_dccg.h drm/amd/display: Revert fixup DPP programming sequence 2019-10-03 09:10:51 -05:00
dcn20_dpp_cm.c drm/amd/display: Add CM_BYPASS via debug option 2019-07-18 14:27:25 -05:00
dcn20_dpp.c drm/amd/display: Use dcn1 Optimal Taps Get 2019-10-10 19:32:46 -05:00
dcn20_dpp.h drm/amd/display: Use dcn1 Optimal Taps Get 2019-10-10 19:32:46 -05:00
dcn20_dsc.c drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00
dcn20_dsc.h drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00
dcn20_dwb_scl.c drm/amd/display: Remove set but not used variables 'h_ratio_chroma', 'v_ratio_chroma' 2019-10-07 15:10:43 -05:00
dcn20_dwb.c
dcn20_dwb.h
dcn20_hubbub.c drm/amd/display: Add detile buffer size for DCN20 2019-10-03 09:10:58 -05:00
dcn20_hubbub.h drm/amd/display: Add detile buffer size for DCN20 2019-10-03 09:10:58 -05:00
dcn20_hubp.c drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00
dcn20_hubp.h drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag 2019-11-13 15:29:44 -05:00
dcn20_hwseq.c drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00
dcn20_hwseq.h drm/amd/display: add odm visual confirm 2019-10-25 16:50:07 -04:00
dcn20_link_encoder.c drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00
dcn20_link_encoder.h drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00
dcn20_mmhubbub.c
dcn20_mmhubbub.h
dcn20_mpc.c drm/amd/display: Drop CONFIG_DRM_AMD_DC_DMUB guards 2019-11-13 15:29:42 -05:00
dcn20_mpc.h drm/amd/display: wake up ogam mem pwr before programming ocsc 2019-08-15 10:56:19 -05:00
dcn20_opp.c drm/amd/display: remove unused function 2019-08-23 11:41:45 -05:00
dcn20_opp.h
dcn20_optc.c drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00
dcn20_optc.h drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00
dcn20_resource.c drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag 2019-11-13 15:29:44 -05:00
dcn20_resource.h drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00
dcn20_stream_encoder.c drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00
dcn20_stream_encoder.h drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP 2019-11-13 15:29:43 -05:00
dcn20_vmid.c drm/amd/display: Poll for GPUVM context ready (v2) 2019-07-18 14:18:09 -05:00
dcn20_vmid.h
Makefile drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED 2019-11-13 15:29:44 -05:00