mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-18 01:16:52 +07:00
6b0478fb72
Hardware may have specific restrictions on GuC WOPCM offset and size. On Gen9, the value of the GuC WOPCM size register needs to be larger than the value of GuC WOPCM offset register + a Gen9 specific offset (144KB) for reserved GuC WOPCM. Fail to enforce such a restriction on GuC WOPCM size will lead to GuC firmware execution failures. On the other hand, with current static GuC WOPCM offset and size values (512KB for both offset and size), the GuC WOPCM size verification will fail on Gen9 even if it can be fixed by lowering the GuC WOPCM offset by calculating its value based on HuC firmware size (which is likely less than 200KB on Gen9), so that we can have a GuC WOPCM size value which is large enough to pass the GuC WOPCM size check. This patch updates the reserved GuC WOPCM size for RC6 context on Gen9 to 24KB to strictly align with the Gen9 GuC WOPCM layout. It also adds support to verify the GuC WOPCM size aganist the Gen9 hardware restrictions. To meet all above requirements, let's provide dynamic partitioning of the WOPCM that will be based on platform specific HuC/GuC firmware sizes. v2: - Removed intel_wopcm_init (Ville/Sagar/Joonas) - Renamed and Moved the intel_wopcm_partition into intel_guc (Sagar) - Removed unnecessary function calls (Joonas) - Init GuC WOPCM partition as soon as firmware fetching is completed v3: - Fixed indentation issues (Chris) - Removed layering violation code (Chris/Michal) - Created separat files for GuC wopcm code (Michal) - Used inline function to avoid code duplication (Michal) v4: - Preset the GuC WOPCM top during early GuC init (Chris) - Fail intel_uc_init_hw() as soon as GuC WOPCM partitioning failed v5: - Moved GuC DMA WOPCM register updating code into intel_wopcm.c - Took care of the locking status before writing to GuC DMA Write-Once registers. (Joonas) v6: - Made sure the GuC WOPCM size to be multiple of 4K (4K aligned) v8: - Updated comments and fixed naming issues (Sagar/Joonas) - Updated commit message to include more description about the hardware restriction on GuC WOPCM size (Sagar) v9: - Minor changes variable names and code comments (Sagar) - Added detailed GuC WOPCM layout drawing (Sagar/Michal) - Refined macro definitions to be reader friendly (Michal) - Removed redundent check to valid flag (Michal) - Unified first parameter for exported GuC WOPCM functions (Michal) - Refined the name and parameter list of hardware restriction checking functions (Michal) v10: - Used shorter function name for internal functions (Joonas) - Moved init-ealry function into c file (Joonas) - Consolidated and removed redundant size checks (Joonas/Michal) - Removed unnecessary unlikely() from code which is only called once during boot (Joonas) - More fixes to kernel-doc format and content (Michal) - Avoided the use of PAGE_MASK for 4K pages (Michal) - Added error log messages to error paths (Michal) v11: - Replaced intel_guc_wopcm with more generic intel_wopcm and attached intel_wopcm to drm_i915_private instead intel_guc (Michal) - dynamic calculation of GuC non-wopcm memory start (a.k.a WOPCM Top offset from GuC WOPCM base) (Michal) - Moved WOPCM marco definitions into .c source file (Michal) - Exported WOPCM layout diagram as kernel-doc (Michal) v12: - Updated naming, function kernel-doc to align with new changes (Michal) v13: - Updated the ordering of s-o-b/cc/r-b tags (Sagar) - Corrected one tense error in comment (Sagar) - Corrected typos and removed spurious comments (Joonas) Bspec: 12690 Signed-off-by: Jackie Li <yaodong.li@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Spotswood <john.a.spotswood@intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> (v8) Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v9) Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> (v11) Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v12) Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1520987574-19351-2-git-send-email-yaodong.li@intel.com
880 lines
24 KiB
C
880 lines
24 KiB
C
/*
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* Copyright © 2011-2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Ben Widawsky <ben@bwidawsk.net>
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*
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*/
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/*
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* This file implements HW context support. On gen5+ a HW context consists of an
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* opaque GPU object which is referenced at times of context saves and restores.
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* With RC6 enabled, the context is also referenced as the GPU enters and exists
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* from RC6 (GPU has it's own internal power context, except on gen5). Though
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* something like a context does exist for the media ring, the code only
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* supports contexts for the render ring.
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*
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* In software, there is a distinction between contexts created by the user,
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* and the default HW context. The default HW context is used by GPU clients
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* that do not request setup of their own hardware context. The default
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* context's state is never restored to help prevent programming errors. This
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* would happen if a client ran and piggy-backed off another clients GPU state.
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* The default context only exists to give the GPU some offset to load as the
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* current to invoke a save of the context we actually care about. In fact, the
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* code could likely be constructed, albeit in a more complicated fashion, to
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* never use the default context, though that limits the driver's ability to
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* swap out, and/or destroy other contexts.
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*
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* All other contexts are created as a request by the GPU client. These contexts
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* store GPU state, and thus allow GPU clients to not re-emit state (and
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* potentially query certain state) at any time. The kernel driver makes
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* certain that the appropriate commands are inserted.
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*
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* The context life cycle is semi-complicated in that context BOs may live
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* longer than the context itself because of the way the hardware, and object
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* tracking works. Below is a very crude representation of the state machine
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* describing the context life.
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* refcount pincount active
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* S0: initial state 0 0 0
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* S1: context created 1 0 0
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* S2: context is currently running 2 1 X
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* S3: GPU referenced, but not current 2 0 1
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* S4: context is current, but destroyed 1 1 0
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* S5: like S3, but destroyed 1 0 1
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*
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* The most common (but not all) transitions:
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* S0->S1: client creates a context
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* S1->S2: client submits execbuf with context
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* S2->S3: other clients submits execbuf with context
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* S3->S1: context object was retired
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* S3->S2: clients submits another execbuf
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* S2->S4: context destroy called with current context
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* S3->S5->S0: destroy path
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* S4->S5->S0: destroy path on current context
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*
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* There are two confusing terms used above:
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* The "current context" means the context which is currently running on the
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* GPU. The GPU has loaded its state already and has stored away the gtt
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* offset of the BO. The GPU is not actively referencing the data at this
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* offset, but it will on the next context switch. The only way to avoid this
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* is to do a GPU reset.
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*
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* An "active context' is one which was previously the "current context" and is
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* on the active list waiting for the next context switch to occur. Until this
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* happens, the object must remain at the same gtt offset. It is therefore
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* possible to destroy a context, but it is still active.
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*
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*/
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#include <linux/log2.h>
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#include <drm/drmP.h>
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#include <drm/i915_drm.h>
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#include "i915_drv.h"
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#include "i915_trace.h"
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#define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1
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static void lut_close(struct i915_gem_context *ctx)
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{
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struct i915_lut_handle *lut, *ln;
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struct radix_tree_iter iter;
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void __rcu **slot;
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list_for_each_entry_safe(lut, ln, &ctx->handles_list, ctx_link) {
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list_del(&lut->obj_link);
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kmem_cache_free(ctx->i915->luts, lut);
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}
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rcu_read_lock();
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radix_tree_for_each_slot(slot, &ctx->handles_vma, &iter, 0) {
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struct i915_vma *vma = rcu_dereference_raw(*slot);
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radix_tree_iter_delete(&ctx->handles_vma, &iter, slot);
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__i915_gem_object_release_unless_active(vma->obj);
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}
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rcu_read_unlock();
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}
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static void i915_gem_context_free(struct i915_gem_context *ctx)
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{
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int i;
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lockdep_assert_held(&ctx->i915->drm.struct_mutex);
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GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
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i915_ppgtt_put(ctx->ppgtt);
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for (i = 0; i < I915_NUM_ENGINES; i++) {
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struct intel_context *ce = &ctx->engine[i];
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if (!ce->state)
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continue;
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WARN_ON(ce->pin_count);
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if (ce->ring)
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intel_ring_free(ce->ring);
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__i915_gem_object_release_unless_active(ce->state->obj);
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}
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kfree(ctx->name);
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put_pid(ctx->pid);
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list_del(&ctx->link);
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ida_simple_remove(&ctx->i915->contexts.hw_ida, ctx->hw_id);
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kfree_rcu(ctx, rcu);
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}
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static void contexts_free(struct drm_i915_private *i915)
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{
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struct llist_node *freed = llist_del_all(&i915->contexts.free_list);
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struct i915_gem_context *ctx, *cn;
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lockdep_assert_held(&i915->drm.struct_mutex);
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llist_for_each_entry_safe(ctx, cn, freed, free_link)
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i915_gem_context_free(ctx);
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}
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static void contexts_free_first(struct drm_i915_private *i915)
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{
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struct i915_gem_context *ctx;
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struct llist_node *freed;
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lockdep_assert_held(&i915->drm.struct_mutex);
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freed = llist_del_first(&i915->contexts.free_list);
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if (!freed)
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return;
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ctx = container_of(freed, typeof(*ctx), free_link);
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i915_gem_context_free(ctx);
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}
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static void contexts_free_worker(struct work_struct *work)
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{
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struct drm_i915_private *i915 =
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container_of(work, typeof(*i915), contexts.free_work);
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mutex_lock(&i915->drm.struct_mutex);
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contexts_free(i915);
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mutex_unlock(&i915->drm.struct_mutex);
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}
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void i915_gem_context_release(struct kref *ref)
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{
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struct i915_gem_context *ctx = container_of(ref, typeof(*ctx), ref);
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struct drm_i915_private *i915 = ctx->i915;
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trace_i915_context_free(ctx);
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if (llist_add(&ctx->free_link, &i915->contexts.free_list))
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queue_work(i915->wq, &i915->contexts.free_work);
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}
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static void context_close(struct i915_gem_context *ctx)
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{
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i915_gem_context_set_closed(ctx);
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/*
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* The LUT uses the VMA as a backpointer to unref the object,
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* so we need to clear the LUT before we close all the VMA (inside
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* the ppgtt).
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*/
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lut_close(ctx);
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if (ctx->ppgtt)
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i915_ppgtt_close(&ctx->ppgtt->base);
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ctx->file_priv = ERR_PTR(-EBADF);
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i915_gem_context_put(ctx);
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}
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static int assign_hw_id(struct drm_i915_private *dev_priv, unsigned *out)
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{
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int ret;
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unsigned int max;
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if (INTEL_GEN(dev_priv) >= 11)
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max = GEN11_MAX_CONTEXT_HW_ID;
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else
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max = MAX_CONTEXT_HW_ID;
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ret = ida_simple_get(&dev_priv->contexts.hw_ida,
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0, max, GFP_KERNEL);
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if (ret < 0) {
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/* Contexts are only released when no longer active.
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* Flush any pending retires to hopefully release some
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* stale contexts and try again.
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*/
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i915_retire_requests(dev_priv);
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ret = ida_simple_get(&dev_priv->contexts.hw_ida,
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0, max, GFP_KERNEL);
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if (ret < 0)
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return ret;
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}
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*out = ret;
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return 0;
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}
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static u32 default_desc_template(const struct drm_i915_private *i915,
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const struct i915_hw_ppgtt *ppgtt)
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{
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u32 address_mode;
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u32 desc;
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desc = GEN8_CTX_VALID | GEN8_CTX_PRIVILEGE;
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address_mode = INTEL_LEGACY_32B_CONTEXT;
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if (ppgtt && i915_vm_is_48bit(&ppgtt->base))
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address_mode = INTEL_LEGACY_64B_CONTEXT;
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desc |= address_mode << GEN8_CTX_ADDRESSING_MODE_SHIFT;
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if (IS_GEN8(i915))
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desc |= GEN8_CTX_L3LLC_COHERENT;
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/* TODO: WaDisableLiteRestore when we start using semaphore
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* signalling between Command Streamers
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* ring->ctx_desc_template |= GEN8_CTX_FORCE_RESTORE;
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*/
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return desc;
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}
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static struct i915_gem_context *
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__create_hw_context(struct drm_i915_private *dev_priv,
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struct drm_i915_file_private *file_priv)
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{
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struct i915_gem_context *ctx;
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int ret;
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (ctx == NULL)
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return ERR_PTR(-ENOMEM);
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ret = assign_hw_id(dev_priv, &ctx->hw_id);
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if (ret) {
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kfree(ctx);
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return ERR_PTR(ret);
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}
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kref_init(&ctx->ref);
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list_add_tail(&ctx->link, &dev_priv->contexts.list);
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ctx->i915 = dev_priv;
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ctx->priority = I915_PRIORITY_NORMAL;
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INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);
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INIT_LIST_HEAD(&ctx->handles_list);
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/* Default context will never have a file_priv */
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ret = DEFAULT_CONTEXT_HANDLE;
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if (file_priv) {
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ret = idr_alloc(&file_priv->context_idr, ctx,
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DEFAULT_CONTEXT_HANDLE, 0, GFP_KERNEL);
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if (ret < 0)
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goto err_lut;
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}
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ctx->user_handle = ret;
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ctx->file_priv = file_priv;
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if (file_priv) {
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ctx->pid = get_task_pid(current, PIDTYPE_PID);
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ctx->name = kasprintf(GFP_KERNEL, "%s[%d]/%x",
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current->comm,
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pid_nr(ctx->pid),
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ctx->user_handle);
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if (!ctx->name) {
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ret = -ENOMEM;
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goto err_pid;
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}
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}
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/* NB: Mark all slices as needing a remap so that when the context first
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* loads it will restore whatever remap state already exists. If there
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* is no remap info, it will be a NOP. */
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ctx->remap_slice = ALL_L3_SLICES(dev_priv);
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i915_gem_context_set_bannable(ctx);
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ctx->ring_size = 4 * PAGE_SIZE;
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ctx->desc_template =
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default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt);
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/*
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* GuC requires the ring to be placed in Non-WOPCM memory. If GuC is not
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* present or not in use we still need a small bias as ring wraparound
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* at offset 0 sometimes hangs. No idea why.
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*/
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if (USES_GUC(dev_priv))
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ctx->ggtt_offset_bias = dev_priv->guc.ggtt_pin_bias;
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else
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ctx->ggtt_offset_bias = I915_GTT_PAGE_SIZE;
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return ctx;
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err_pid:
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put_pid(ctx->pid);
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idr_remove(&file_priv->context_idr, ctx->user_handle);
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err_lut:
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context_close(ctx);
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return ERR_PTR(ret);
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}
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static void __destroy_hw_context(struct i915_gem_context *ctx,
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struct drm_i915_file_private *file_priv)
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{
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idr_remove(&file_priv->context_idr, ctx->user_handle);
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context_close(ctx);
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}
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static struct i915_gem_context *
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i915_gem_create_context(struct drm_i915_private *dev_priv,
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struct drm_i915_file_private *file_priv)
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{
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struct i915_gem_context *ctx;
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lockdep_assert_held(&dev_priv->drm.struct_mutex);
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/* Reap the most stale context */
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contexts_free_first(dev_priv);
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ctx = __create_hw_context(dev_priv, file_priv);
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if (IS_ERR(ctx))
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return ctx;
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if (USES_FULL_PPGTT(dev_priv)) {
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struct i915_hw_ppgtt *ppgtt;
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ppgtt = i915_ppgtt_create(dev_priv, file_priv, ctx->name);
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if (IS_ERR(ppgtt)) {
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DRM_DEBUG_DRIVER("PPGTT setup failed (%ld)\n",
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PTR_ERR(ppgtt));
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__destroy_hw_context(ctx, file_priv);
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return ERR_CAST(ppgtt);
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}
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ctx->ppgtt = ppgtt;
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ctx->desc_template = default_desc_template(dev_priv, ppgtt);
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}
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trace_i915_context_create(ctx);
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return ctx;
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}
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/**
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* i915_gem_context_create_gvt - create a GVT GEM context
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* @dev: drm device *
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*
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* This function is used to create a GVT specific GEM context.
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*
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* Returns:
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* pointer to i915_gem_context on success, error pointer if failed
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*
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*/
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struct i915_gem_context *
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i915_gem_context_create_gvt(struct drm_device *dev)
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{
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struct i915_gem_context *ctx;
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int ret;
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if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
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return ERR_PTR(-ENODEV);
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ret = i915_mutex_lock_interruptible(dev);
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if (ret)
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return ERR_PTR(ret);
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ctx = __create_hw_context(to_i915(dev), NULL);
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if (IS_ERR(ctx))
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goto out;
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|
|
ctx->file_priv = ERR_PTR(-EBADF);
|
|
i915_gem_context_set_closed(ctx); /* not user accessible */
|
|
i915_gem_context_clear_bannable(ctx);
|
|
i915_gem_context_set_force_single_submission(ctx);
|
|
if (!USES_GUC_SUBMISSION(to_i915(dev)))
|
|
ctx->ring_size = 512 * PAGE_SIZE; /* Max ring buffer size */
|
|
|
|
GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
|
|
out:
|
|
mutex_unlock(&dev->struct_mutex);
|
|
return ctx;
|
|
}
|
|
|
|
struct i915_gem_context *
|
|
i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)
|
|
{
|
|
struct i915_gem_context *ctx;
|
|
|
|
ctx = i915_gem_create_context(i915, NULL);
|
|
if (IS_ERR(ctx))
|
|
return ctx;
|
|
|
|
i915_gem_context_clear_bannable(ctx);
|
|
ctx->priority = prio;
|
|
ctx->ring_size = PAGE_SIZE;
|
|
|
|
GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
|
|
|
|
return ctx;
|
|
}
|
|
|
|
static void
|
|
destroy_kernel_context(struct i915_gem_context **ctxp)
|
|
{
|
|
struct i915_gem_context *ctx;
|
|
|
|
/* Keep the context ref so that we can free it immediately ourselves */
|
|
ctx = i915_gem_context_get(fetch_and_zero(ctxp));
|
|
GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
|
|
|
|
context_close(ctx);
|
|
i915_gem_context_free(ctx);
|
|
}
|
|
|
|
static bool needs_preempt_context(struct drm_i915_private *i915)
|
|
{
|
|
return HAS_LOGICAL_RING_PREEMPTION(i915);
|
|
}
|
|
|
|
int i915_gem_contexts_init(struct drm_i915_private *dev_priv)
|
|
{
|
|
struct i915_gem_context *ctx;
|
|
|
|
/* Reassure ourselves we are only called once */
|
|
GEM_BUG_ON(dev_priv->kernel_context);
|
|
GEM_BUG_ON(dev_priv->preempt_context);
|
|
|
|
INIT_LIST_HEAD(&dev_priv->contexts.list);
|
|
INIT_WORK(&dev_priv->contexts.free_work, contexts_free_worker);
|
|
init_llist_head(&dev_priv->contexts.free_list);
|
|
|
|
/* Using the simple ida interface, the max is limited by sizeof(int) */
|
|
BUILD_BUG_ON(MAX_CONTEXT_HW_ID > INT_MAX);
|
|
BUILD_BUG_ON(GEN11_MAX_CONTEXT_HW_ID > INT_MAX);
|
|
ida_init(&dev_priv->contexts.hw_ida);
|
|
|
|
/* lowest priority; idle task */
|
|
ctx = i915_gem_context_create_kernel(dev_priv, I915_PRIORITY_MIN);
|
|
if (IS_ERR(ctx)) {
|
|
DRM_ERROR("Failed to create default global context\n");
|
|
return PTR_ERR(ctx);
|
|
}
|
|
/*
|
|
* For easy recognisablity, we want the kernel context to be 0 and then
|
|
* all user contexts will have non-zero hw_id.
|
|
*/
|
|
GEM_BUG_ON(ctx->hw_id);
|
|
dev_priv->kernel_context = ctx;
|
|
|
|
/* highest priority; preempting task */
|
|
if (needs_preempt_context(dev_priv)) {
|
|
ctx = i915_gem_context_create_kernel(dev_priv, INT_MAX);
|
|
if (!IS_ERR(ctx))
|
|
dev_priv->preempt_context = ctx;
|
|
else
|
|
DRM_ERROR("Failed to create preempt context; disabling preemption\n");
|
|
}
|
|
|
|
DRM_DEBUG_DRIVER("%s context support initialized\n",
|
|
dev_priv->engine[RCS]->context_size ? "logical" :
|
|
"fake");
|
|
return 0;
|
|
}
|
|
|
|
void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
|
|
{
|
|
struct intel_engine_cs *engine;
|
|
enum intel_engine_id id;
|
|
|
|
lockdep_assert_held(&dev_priv->drm.struct_mutex);
|
|
|
|
for_each_engine(engine, dev_priv, id) {
|
|
engine->legacy_active_context = NULL;
|
|
engine->legacy_active_ppgtt = NULL;
|
|
|
|
if (!engine->last_retired_context)
|
|
continue;
|
|
|
|
engine->context_unpin(engine, engine->last_retired_context);
|
|
engine->last_retired_context = NULL;
|
|
}
|
|
}
|
|
|
|
void i915_gem_contexts_fini(struct drm_i915_private *i915)
|
|
{
|
|
lockdep_assert_held(&i915->drm.struct_mutex);
|
|
|
|
if (i915->preempt_context)
|
|
destroy_kernel_context(&i915->preempt_context);
|
|
destroy_kernel_context(&i915->kernel_context);
|
|
|
|
/* Must free all deferred contexts (via flush_workqueue) first */
|
|
ida_destroy(&i915->contexts.hw_ida);
|
|
}
|
|
|
|
static int context_idr_cleanup(int id, void *p, void *data)
|
|
{
|
|
struct i915_gem_context *ctx = p;
|
|
|
|
context_close(ctx);
|
|
return 0;
|
|
}
|
|
|
|
int i915_gem_context_open(struct drm_i915_private *i915,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
|
struct i915_gem_context *ctx;
|
|
|
|
idr_init(&file_priv->context_idr);
|
|
|
|
mutex_lock(&i915->drm.struct_mutex);
|
|
ctx = i915_gem_create_context(i915, file_priv);
|
|
mutex_unlock(&i915->drm.struct_mutex);
|
|
if (IS_ERR(ctx)) {
|
|
idr_destroy(&file_priv->context_idr);
|
|
return PTR_ERR(ctx);
|
|
}
|
|
|
|
GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
|
|
|
|
return 0;
|
|
}
|
|
|
|
void i915_gem_context_close(struct drm_file *file)
|
|
{
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
|
|
|
lockdep_assert_held(&file_priv->dev_priv->drm.struct_mutex);
|
|
|
|
idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
|
|
idr_destroy(&file_priv->context_idr);
|
|
}
|
|
|
|
static bool engine_has_idle_kernel_context(struct intel_engine_cs *engine)
|
|
{
|
|
struct i915_gem_timeline *timeline;
|
|
|
|
list_for_each_entry(timeline, &engine->i915->gt.timelines, link) {
|
|
struct intel_timeline *tl;
|
|
|
|
if (timeline == &engine->i915->gt.global_timeline)
|
|
continue;
|
|
|
|
tl = &timeline->engine[engine->id];
|
|
if (i915_gem_active_peek(&tl->last_request,
|
|
&engine->i915->drm.struct_mutex))
|
|
return false;
|
|
}
|
|
|
|
return intel_engine_has_kernel_context(engine);
|
|
}
|
|
|
|
int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv)
|
|
{
|
|
struct intel_engine_cs *engine;
|
|
struct i915_gem_timeline *timeline;
|
|
enum intel_engine_id id;
|
|
|
|
lockdep_assert_held(&dev_priv->drm.struct_mutex);
|
|
|
|
i915_retire_requests(dev_priv);
|
|
|
|
for_each_engine(engine, dev_priv, id) {
|
|
struct i915_request *rq;
|
|
|
|
if (engine_has_idle_kernel_context(engine))
|
|
continue;
|
|
|
|
rq = i915_request_alloc(engine, dev_priv->kernel_context);
|
|
if (IS_ERR(rq))
|
|
return PTR_ERR(rq);
|
|
|
|
/* Queue this switch after all other activity */
|
|
list_for_each_entry(timeline, &dev_priv->gt.timelines, link) {
|
|
struct i915_request *prev;
|
|
struct intel_timeline *tl;
|
|
|
|
tl = &timeline->engine[engine->id];
|
|
prev = i915_gem_active_raw(&tl->last_request,
|
|
&dev_priv->drm.struct_mutex);
|
|
if (prev)
|
|
i915_sw_fence_await_sw_fence_gfp(&rq->submit,
|
|
&prev->submit,
|
|
I915_FENCE_GFP);
|
|
}
|
|
|
|
/*
|
|
* Force a flush after the switch to ensure that all rendering
|
|
* and operations prior to switching to the kernel context hits
|
|
* memory. This should be guaranteed by the previous request,
|
|
* but an extra layer of paranoia before we declare the system
|
|
* idle (on suspend etc) is advisable!
|
|
*/
|
|
__i915_request_add(rq, true);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static bool client_is_banned(struct drm_i915_file_private *file_priv)
|
|
{
|
|
return atomic_read(&file_priv->context_bans) > I915_MAX_CLIENT_CONTEXT_BANS;
|
|
}
|
|
|
|
int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_i915_private *dev_priv = to_i915(dev);
|
|
struct drm_i915_gem_context_create *args = data;
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
|
struct i915_gem_context *ctx;
|
|
int ret;
|
|
|
|
if (!dev_priv->engine[RCS]->context_size)
|
|
return -ENODEV;
|
|
|
|
if (args->pad != 0)
|
|
return -EINVAL;
|
|
|
|
if (client_is_banned(file_priv)) {
|
|
DRM_DEBUG("client %s[%d] banned from creating ctx\n",
|
|
current->comm,
|
|
pid_nr(get_task_pid(current, PIDTYPE_PID)));
|
|
|
|
return -EIO;
|
|
}
|
|
|
|
ret = i915_mutex_lock_interruptible(dev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ctx = i915_gem_create_context(dev_priv, file_priv);
|
|
mutex_unlock(&dev->struct_mutex);
|
|
if (IS_ERR(ctx))
|
|
return PTR_ERR(ctx);
|
|
|
|
GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
|
|
|
|
args->ctx_id = ctx->user_handle;
|
|
DRM_DEBUG("HW context %d created\n", args->ctx_id);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_i915_gem_context_destroy *args = data;
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
|
struct i915_gem_context *ctx;
|
|
int ret;
|
|
|
|
if (args->pad != 0)
|
|
return -EINVAL;
|
|
|
|
if (args->ctx_id == DEFAULT_CONTEXT_HANDLE)
|
|
return -ENOENT;
|
|
|
|
ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
|
|
if (!ctx)
|
|
return -ENOENT;
|
|
|
|
ret = mutex_lock_interruptible(&dev->struct_mutex);
|
|
if (ret)
|
|
goto out;
|
|
|
|
__destroy_hw_context(ctx, file_priv);
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
out:
|
|
i915_gem_context_put(ctx);
|
|
return 0;
|
|
}
|
|
|
|
int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
|
struct drm_i915_gem_context_param *args = data;
|
|
struct i915_gem_context *ctx;
|
|
int ret = 0;
|
|
|
|
ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
|
|
if (!ctx)
|
|
return -ENOENT;
|
|
|
|
args->size = 0;
|
|
switch (args->param) {
|
|
case I915_CONTEXT_PARAM_BAN_PERIOD:
|
|
ret = -EINVAL;
|
|
break;
|
|
case I915_CONTEXT_PARAM_NO_ZEROMAP:
|
|
args->value = ctx->flags & CONTEXT_NO_ZEROMAP;
|
|
break;
|
|
case I915_CONTEXT_PARAM_GTT_SIZE:
|
|
if (ctx->ppgtt)
|
|
args->value = ctx->ppgtt->base.total;
|
|
else if (to_i915(dev)->mm.aliasing_ppgtt)
|
|
args->value = to_i915(dev)->mm.aliasing_ppgtt->base.total;
|
|
else
|
|
args->value = to_i915(dev)->ggtt.base.total;
|
|
break;
|
|
case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
|
|
args->value = i915_gem_context_no_error_capture(ctx);
|
|
break;
|
|
case I915_CONTEXT_PARAM_BANNABLE:
|
|
args->value = i915_gem_context_is_bannable(ctx);
|
|
break;
|
|
case I915_CONTEXT_PARAM_PRIORITY:
|
|
args->value = ctx->priority;
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
i915_gem_context_put(ctx);
|
|
return ret;
|
|
}
|
|
|
|
int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
|
struct drm_i915_gem_context_param *args = data;
|
|
struct i915_gem_context *ctx;
|
|
int ret;
|
|
|
|
ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
|
|
if (!ctx)
|
|
return -ENOENT;
|
|
|
|
ret = i915_mutex_lock_interruptible(dev);
|
|
if (ret)
|
|
goto out;
|
|
|
|
switch (args->param) {
|
|
case I915_CONTEXT_PARAM_BAN_PERIOD:
|
|
ret = -EINVAL;
|
|
break;
|
|
case I915_CONTEXT_PARAM_NO_ZEROMAP:
|
|
if (args->size) {
|
|
ret = -EINVAL;
|
|
} else {
|
|
ctx->flags &= ~CONTEXT_NO_ZEROMAP;
|
|
ctx->flags |= args->value ? CONTEXT_NO_ZEROMAP : 0;
|
|
}
|
|
break;
|
|
case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
|
|
if (args->size)
|
|
ret = -EINVAL;
|
|
else if (args->value)
|
|
i915_gem_context_set_no_error_capture(ctx);
|
|
else
|
|
i915_gem_context_clear_no_error_capture(ctx);
|
|
break;
|
|
case I915_CONTEXT_PARAM_BANNABLE:
|
|
if (args->size)
|
|
ret = -EINVAL;
|
|
else if (!capable(CAP_SYS_ADMIN) && !args->value)
|
|
ret = -EPERM;
|
|
else if (args->value)
|
|
i915_gem_context_set_bannable(ctx);
|
|
else
|
|
i915_gem_context_clear_bannable(ctx);
|
|
break;
|
|
|
|
case I915_CONTEXT_PARAM_PRIORITY:
|
|
{
|
|
s64 priority = args->value;
|
|
|
|
if (args->size)
|
|
ret = -EINVAL;
|
|
else if (!(to_i915(dev)->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
|
|
ret = -ENODEV;
|
|
else if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
|
|
priority < I915_CONTEXT_MIN_USER_PRIORITY)
|
|
ret = -EINVAL;
|
|
else if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
|
|
!capable(CAP_SYS_NICE))
|
|
ret = -EPERM;
|
|
else
|
|
ctx->priority = priority;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
out:
|
|
i915_gem_context_put(ctx);
|
|
return ret;
|
|
}
|
|
|
|
int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
|
|
void *data, struct drm_file *file)
|
|
{
|
|
struct drm_i915_private *dev_priv = to_i915(dev);
|
|
struct drm_i915_reset_stats *args = data;
|
|
struct i915_gem_context *ctx;
|
|
int ret;
|
|
|
|
if (args->flags || args->pad)
|
|
return -EINVAL;
|
|
|
|
ret = -ENOENT;
|
|
rcu_read_lock();
|
|
ctx = __i915_gem_context_lookup_rcu(file->driver_priv, args->ctx_id);
|
|
if (!ctx)
|
|
goto out;
|
|
|
|
/*
|
|
* We opt for unserialised reads here. This may result in tearing
|
|
* in the extremely unlikely event of a GPU hang on this context
|
|
* as we are querying them. If we need that extra layer of protection,
|
|
* we should wrap the hangstats with a seqlock.
|
|
*/
|
|
|
|
if (capable(CAP_SYS_ADMIN))
|
|
args->reset_count = i915_reset_count(&dev_priv->gpu_error);
|
|
else
|
|
args->reset_count = 0;
|
|
|
|
args->batch_active = atomic_read(&ctx->guilty_count);
|
|
args->batch_pending = atomic_read(&ctx->active_count);
|
|
|
|
ret = 0;
|
|
out:
|
|
rcu_read_unlock();
|
|
return ret;
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
|
|
#include "selftests/mock_context.c"
|
|
#include "selftests/i915_gem_context.c"
|
|
#endif
|