mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 05:46:47 +07:00
0231b1a074
The Ethernet on mpc8315erdb is broken since commitb6b5e8a691
("gianfar: Disable EEE autoneg by default"). The reason is that even though the rtl8211b doesn't support the MMD extended registers access, it does return some random values if we trying to access the MMD register via indirect method. This makes it seem that the EEE is supported by this phy device. And the subsequent writing to the MMD registers does cause the phy malfunction. So use the dummy stubs for the MMD register access to fix this issue. Fixes:b6b5e8a691
("gianfar: Disable EEE autoneg by default") Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
225 lines
5.3 KiB
C
225 lines
5.3 KiB
C
/*
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* drivers/net/phy/realtek.c
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*
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* Driver for Realtek PHYs
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*
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* Author: Johnson Leung <r58129@freescale.com>
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*
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/bitops.h>
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#include <linux/phy.h>
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#include <linux/module.h>
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#define RTL821x_PHYSR 0x11
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#define RTL821x_PHYSR_DUPLEX BIT(13)
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#define RTL821x_PHYSR_SPEED GENMASK(15, 14)
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#define RTL821x_INER 0x12
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#define RTL8211B_INER_INIT 0x6400
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#define RTL8211E_INER_LINK_STATUS BIT(10)
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#define RTL8211F_INER_LINK_STATUS BIT(4)
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#define RTL821x_INSR 0x13
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#define RTL821x_PAGE_SELECT 0x1f
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#define RTL8211F_INSR 0x1d
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#define RTL8211F_TX_DELAY BIT(8)
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#define RTL8201F_ISR 0x1e
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#define RTL8201F_IER 0x13
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MODULE_DESCRIPTION("Realtek PHY driver");
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MODULE_AUTHOR("Johnson Leung");
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MODULE_LICENSE("GPL");
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static int rtl821x_read_page(struct phy_device *phydev)
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{
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return __phy_read(phydev, RTL821x_PAGE_SELECT);
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}
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static int rtl821x_write_page(struct phy_device *phydev, int page)
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{
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return __phy_write(phydev, RTL821x_PAGE_SELECT, page);
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}
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static int rtl8201_ack_interrupt(struct phy_device *phydev)
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{
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int err;
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err = phy_read(phydev, RTL8201F_ISR);
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return (err < 0) ? err : 0;
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}
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static int rtl821x_ack_interrupt(struct phy_device *phydev)
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{
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int err;
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err = phy_read(phydev, RTL821x_INSR);
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return (err < 0) ? err : 0;
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}
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static int rtl8211f_ack_interrupt(struct phy_device *phydev)
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{
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int err;
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err = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
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return (err < 0) ? err : 0;
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}
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static int rtl8201_config_intr(struct phy_device *phydev)
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{
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u16 val;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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val = BIT(13) | BIT(12) | BIT(11);
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else
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val = 0;
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return phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
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}
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static int rtl8211b_config_intr(struct phy_device *phydev)
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{
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int err;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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err = phy_write(phydev, RTL821x_INER,
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RTL8211B_INER_INIT);
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else
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err = phy_write(phydev, RTL821x_INER, 0);
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return err;
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}
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static int rtl8211e_config_intr(struct phy_device *phydev)
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{
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int err;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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err = phy_write(phydev, RTL821x_INER,
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RTL8211E_INER_LINK_STATUS);
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else
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err = phy_write(phydev, RTL821x_INER, 0);
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return err;
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}
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static int rtl8211f_config_intr(struct phy_device *phydev)
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{
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u16 val;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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val = RTL8211F_INER_LINK_STATUS;
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else
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val = 0;
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return phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
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}
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static int rtl8211f_config_init(struct phy_device *phydev)
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{
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int ret;
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u16 val = 0;
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ret = genphy_config_init(phydev);
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if (ret < 0)
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return ret;
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/* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
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phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
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val = RTL8211F_TX_DELAY;
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return phy_modify_paged(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY, val);
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}
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static struct phy_driver realtek_drvs[] = {
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{
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.phy_id = 0x00008201,
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.name = "RTL8201CP Ethernet",
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.phy_id_mask = 0x0000ffff,
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.features = PHY_BASIC_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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}, {
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.phy_id = 0x001cc816,
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.name = "RTL8201F 10/100Mbps Ethernet",
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.phy_id_mask = 0x001fffff,
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.features = PHY_BASIC_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.ack_interrupt = &rtl8201_ack_interrupt,
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.config_intr = &rtl8201_config_intr,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.read_page = rtl821x_read_page,
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.write_page = rtl821x_write_page,
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}, {
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.phy_id = 0x001cc912,
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.name = "RTL8211B Gigabit Ethernet",
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.phy_id_mask = 0x001fffff,
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.ack_interrupt = &rtl821x_ack_interrupt,
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.config_intr = &rtl8211b_config_intr,
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.read_mmd = &genphy_read_mmd_unsupported,
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.write_mmd = &genphy_write_mmd_unsupported,
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}, {
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.phy_id = 0x001cc914,
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.name = "RTL8211DN Gigabit Ethernet",
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.phy_id_mask = 0x001fffff,
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.ack_interrupt = rtl821x_ack_interrupt,
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.config_intr = rtl8211e_config_intr,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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}, {
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.phy_id = 0x001cc915,
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.name = "RTL8211E Gigabit Ethernet",
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.phy_id_mask = 0x001fffff,
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.ack_interrupt = &rtl821x_ack_interrupt,
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.config_intr = &rtl8211e_config_intr,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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}, {
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.phy_id = 0x001cc916,
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.name = "RTL8211F Gigabit Ethernet",
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.phy_id_mask = 0x001fffff,
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_init = &rtl8211f_config_init,
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.ack_interrupt = &rtl8211f_ack_interrupt,
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.config_intr = &rtl8211f_config_intr,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.read_page = rtl821x_read_page,
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.write_page = rtl821x_write_page,
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},
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};
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module_phy_driver(realtek_drvs);
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static struct mdio_device_id __maybe_unused realtek_tbl[] = {
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{ 0x001cc816, 0x001fffff },
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{ 0x001cc912, 0x001fffff },
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{ 0x001cc914, 0x001fffff },
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{ 0x001cc915, 0x001fffff },
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{ 0x001cc916, 0x001fffff },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, realtek_tbl);
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