mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 13:30:57 +07:00
ca662ee7b8
The support for 81xx was never working in mainline, and the broken legacy booting support has been removed. There are patches coming to make 81xx boot with device tree, and for that we won't need any of this legacy platform code, so let's just remove it. Cc: Brian Hutchinson <b.hutchman@gmail.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
71 lines
2.2 KiB
C
71 lines
2.2 KiB
C
#include <linux/platform_data/usb-omap.h>
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/* AM35x */
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/* USB 2.0 PHY Control */
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#define CONF2_PHY_GPIOMODE (1 << 23)
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#define CONF2_OTGMODE (3 << 14)
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#define CONF2_NO_OVERRIDE (0 << 14)
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#define CONF2_FORCE_HOST (1 << 14)
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#define CONF2_FORCE_DEVICE (2 << 14)
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#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14)
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#define CONF2_SESENDEN (1 << 13)
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#define CONF2_VBDTCTEN (1 << 12)
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#define CONF2_REFFREQ_24MHZ (2 << 8)
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#define CONF2_REFFREQ_26MHZ (7 << 8)
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#define CONF2_REFFREQ_13MHZ (6 << 8)
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#define CONF2_REFFREQ (0xf << 8)
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#define CONF2_PHYCLKGD (1 << 7)
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#define CONF2_VBUSSENSE (1 << 6)
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#define CONF2_PHY_PLLON (1 << 5)
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#define CONF2_RESET (1 << 4)
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#define CONF2_PHYPWRDN (1 << 3)
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#define CONF2_OTGPWRDN (1 << 2)
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#define CONF2_DATPOL (1 << 1)
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/* TI81XX specific definitions */
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#define USBCTRL0 0x620
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#define USBSTAT0 0x624
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/* TI816X PHY controls bits */
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#define TI816X_USBPHY0_NORMAL_MODE (1 << 0)
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#define TI816X_USBPHY_REFCLK_OSC (1 << 8)
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/* TI814X PHY controls bits */
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#define USBPHY_CM_PWRDN (1 << 0)
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#define USBPHY_OTG_PWRDN (1 << 1)
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#define USBPHY_CHGDET_DIS (1 << 2)
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#define USBPHY_CHGDET_RSTRT (1 << 3)
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#define USBPHY_SRCONDM (1 << 4)
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#define USBPHY_SINKONDP (1 << 5)
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#define USBPHY_CHGISINK_EN (1 << 6)
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#define USBPHY_CHGVSRC_EN (1 << 7)
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#define USBPHY_DMPULLUP (1 << 8)
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#define USBPHY_DPPULLUP (1 << 9)
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#define USBPHY_CDET_EXTCTL (1 << 10)
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#define USBPHY_GPIO_MODE (1 << 12)
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#define USBPHY_DPOPBUFCTL (1 << 13)
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#define USBPHY_DMOPBUFCTL (1 << 14)
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#define USBPHY_DPINPUT (1 << 15)
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#define USBPHY_DMINPUT (1 << 16)
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#define USBPHY_DPGPIO_PD (1 << 17)
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#define USBPHY_DMGPIO_PD (1 << 18)
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#define USBPHY_OTGVDET_EN (1 << 19)
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#define USBPHY_OTGSESSEND_EN (1 << 20)
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#define USBPHY_DATA_POLARITY (1 << 23)
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struct usbhs_phy_data {
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int port; /* 1 indexed port number */
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int reset_gpio;
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int vcc_gpio;
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bool vcc_polarity; /* 1 active high, 0 active low */
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};
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extern void usb_musb_init(struct omap_musb_board_data *board_data);
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extern void usbhs_init(struct usbhs_omap_platform_data *pdata);
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extern int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys);
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extern void am35x_musb_reset(void);
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extern void am35x_musb_phy_power(u8 on);
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extern void am35x_musb_clear_irq(void);
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extern void am35x_set_mode(u8 musb_mode);
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