Gabriel Feceoru 8c448cadd4 drm/i915: Handle PipeC fused off on IVB/HSW/BDW ... Some Gen7/8 production parts may have the Display Pipe C fused off. In this case, the display hardware will prevent the enable bit in PIPE_CONF register (for Pipe C) from being set to 1. Fixed by adjusting pipe_count to reflect this. v2: Rename HSW_PIPE_C_DISABLE to IVB_PIPE_C_DISABLE as it already exists on ivybridge (Ville) v3: Remove unnecessary MMIO read, correct the description (Damien) v4: Be more specific in description (Patrick) Signed-off-by: Gabriel Feceoru <gabriel.feceoru@intel.com> Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1453462125-21519-1-git-send-email-gabriel.feceoru@intel.com		2016-02-10 08:29:34 +01:00
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drm	drm/i915: Handle PipeC fused off on IVB/HSW/BDW	2016-02-10 08:29:34 +01:00
host1x	gpu: host1x: Add Tegra210 support	2015-12-14 10:50:33 +01:00
ipu-v3	gpu: ipu-v3: Assign of_node of child platform devices to corresponding ports	2015-11-24 11:30:17 +01:00
vga	Merge tag 'topic/drm-misc-2016-01-17' of git://anongit.freedesktop.org/drm-intel into drm-next	2016-01-18 07:01:16 +10:00
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