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3340289ddf
The KernelPageSize entry in /proc/pid/smaps is the pagesize used by the kernel to back a VMA. This matches the size used by the MMU in the majority of cases. However, one counter-example occurs on PPC64 kernels whereby a kernel using 64K as a base pagesize may still use 4K pages for the MMU on older processor. To distinguish, this patch reports MMUPageSize as the pagesize used by the MMU in /proc/pid/smaps. Signed-off-by: Mel Gorman <mel@csn.ul.ie> Cc: "KOSAKI Motohiro" <kosaki.motohiro@jp.fujitsu.com> Cc: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
789 lines
20 KiB
C
789 lines
20 KiB
C
/*
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* PPC64 (POWER4) Huge TLB Page Support for Kernel.
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*
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* Copyright (C) 2003 David Gibson, IBM Corporation.
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*
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* Based on the IA-32 version:
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* Copyright (C) 2002, Rohit Seth <rohit.seth@intel.com>
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*/
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#include <linux/init.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/hugetlb.h>
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#include <linux/pagemap.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/sysctl.h>
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#include <asm/mman.h>
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#include <asm/pgalloc.h>
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#include <asm/tlb.h>
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#include <asm/tlbflush.h>
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#include <asm/mmu_context.h>
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#include <asm/machdep.h>
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#include <asm/cputable.h>
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#include <asm/spu.h>
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#define PAGE_SHIFT_64K 16
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#define PAGE_SHIFT_16M 24
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#define PAGE_SHIFT_16G 34
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#define NUM_LOW_AREAS (0x100000000UL >> SID_SHIFT)
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#define NUM_HIGH_AREAS (PGTABLE_RANGE >> HTLB_AREA_SHIFT)
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#define MAX_NUMBER_GPAGES 1024
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/* Tracks the 16G pages after the device tree is scanned and before the
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* huge_boot_pages list is ready. */
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static unsigned long gpage_freearray[MAX_NUMBER_GPAGES];
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static unsigned nr_gpages;
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/* Array of valid huge page sizes - non-zero value(hugepte_shift) is
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* stored for the huge page sizes that are valid.
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*/
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unsigned int mmu_huge_psizes[MMU_PAGE_COUNT] = { }; /* initialize all to 0 */
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#define hugepte_shift mmu_huge_psizes
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#define PTRS_PER_HUGEPTE(psize) (1 << hugepte_shift[psize])
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#define HUGEPTE_TABLE_SIZE(psize) (sizeof(pte_t) << hugepte_shift[psize])
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#define HUGEPD_SHIFT(psize) (mmu_psize_to_shift(psize) \
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+ hugepte_shift[psize])
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#define HUGEPD_SIZE(psize) (1UL << HUGEPD_SHIFT(psize))
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#define HUGEPD_MASK(psize) (~(HUGEPD_SIZE(psize)-1))
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/* Subtract one from array size because we don't need a cache for 4K since
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* is not a huge page size */
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#define HUGE_PGTABLE_INDEX(psize) (HUGEPTE_CACHE_NUM + psize - 1)
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#define HUGEPTE_CACHE_NAME(psize) (huge_pgtable_cache_name[psize])
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static const char *huge_pgtable_cache_name[MMU_PAGE_COUNT] = {
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"unused_4K", "hugepte_cache_64K", "unused_64K_AP",
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"hugepte_cache_1M", "hugepte_cache_16M", "hugepte_cache_16G"
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};
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/* Flag to mark huge PD pointers. This means pmd_bad() and pud_bad()
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* will choke on pointers to hugepte tables, which is handy for
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* catching screwups early. */
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#define HUGEPD_OK 0x1
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typedef struct { unsigned long pd; } hugepd_t;
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#define hugepd_none(hpd) ((hpd).pd == 0)
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static inline int shift_to_mmu_psize(unsigned int shift)
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{
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switch (shift) {
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#ifndef CONFIG_PPC_64K_PAGES
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case PAGE_SHIFT_64K:
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return MMU_PAGE_64K;
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#endif
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case PAGE_SHIFT_16M:
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return MMU_PAGE_16M;
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case PAGE_SHIFT_16G:
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return MMU_PAGE_16G;
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}
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return -1;
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}
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static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize)
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{
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if (mmu_psize_defs[mmu_psize].shift)
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return mmu_psize_defs[mmu_psize].shift;
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BUG();
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}
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static inline pte_t *hugepd_page(hugepd_t hpd)
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{
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BUG_ON(!(hpd.pd & HUGEPD_OK));
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return (pte_t *)(hpd.pd & ~HUGEPD_OK);
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}
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static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
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struct hstate *hstate)
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{
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unsigned int shift = huge_page_shift(hstate);
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int psize = shift_to_mmu_psize(shift);
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unsigned long idx = ((addr >> shift) & (PTRS_PER_HUGEPTE(psize)-1));
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pte_t *dir = hugepd_page(*hpdp);
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return dir + idx;
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}
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static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
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unsigned long address, unsigned int psize)
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{
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pte_t *new = kmem_cache_zalloc(pgtable_cache[HUGE_PGTABLE_INDEX(psize)],
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GFP_KERNEL|__GFP_REPEAT);
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if (! new)
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return -ENOMEM;
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spin_lock(&mm->page_table_lock);
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if (!hugepd_none(*hpdp))
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kmem_cache_free(pgtable_cache[HUGE_PGTABLE_INDEX(psize)], new);
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else
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hpdp->pd = (unsigned long)new | HUGEPD_OK;
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spin_unlock(&mm->page_table_lock);
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return 0;
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}
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static pud_t *hpud_offset(pgd_t *pgd, unsigned long addr, struct hstate *hstate)
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{
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if (huge_page_shift(hstate) < PUD_SHIFT)
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return pud_offset(pgd, addr);
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else
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return (pud_t *) pgd;
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}
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static pud_t *hpud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long addr,
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struct hstate *hstate)
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{
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if (huge_page_shift(hstate) < PUD_SHIFT)
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return pud_alloc(mm, pgd, addr);
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else
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return (pud_t *) pgd;
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}
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static pmd_t *hpmd_offset(pud_t *pud, unsigned long addr, struct hstate *hstate)
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{
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if (huge_page_shift(hstate) < PMD_SHIFT)
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return pmd_offset(pud, addr);
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else
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return (pmd_t *) pud;
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}
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static pmd_t *hpmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long addr,
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struct hstate *hstate)
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{
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if (huge_page_shift(hstate) < PMD_SHIFT)
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return pmd_alloc(mm, pud, addr);
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else
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return (pmd_t *) pud;
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}
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/* Build list of addresses of gigantic pages. This function is used in early
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* boot before the buddy or bootmem allocator is setup.
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*/
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void add_gpage(unsigned long addr, unsigned long page_size,
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unsigned long number_of_pages)
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{
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if (!addr)
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return;
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while (number_of_pages > 0) {
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gpage_freearray[nr_gpages] = addr;
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nr_gpages++;
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number_of_pages--;
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addr += page_size;
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}
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}
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/* Moves the gigantic page addresses from the temporary list to the
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* huge_boot_pages list.
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*/
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int alloc_bootmem_huge_page(struct hstate *hstate)
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{
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struct huge_bootmem_page *m;
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if (nr_gpages == 0)
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return 0;
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m = phys_to_virt(gpage_freearray[--nr_gpages]);
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gpage_freearray[nr_gpages] = 0;
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list_add(&m->list, &huge_boot_pages);
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m->hstate = hstate;
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return 1;
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}
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/* Modelled after find_linux_pte() */
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pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
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{
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pgd_t *pg;
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pud_t *pu;
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pmd_t *pm;
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unsigned int psize;
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unsigned int shift;
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unsigned long sz;
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struct hstate *hstate;
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psize = get_slice_psize(mm, addr);
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shift = mmu_psize_to_shift(psize);
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sz = ((1UL) << shift);
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hstate = size_to_hstate(sz);
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addr &= hstate->mask;
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pg = pgd_offset(mm, addr);
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if (!pgd_none(*pg)) {
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pu = hpud_offset(pg, addr, hstate);
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if (!pud_none(*pu)) {
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pm = hpmd_offset(pu, addr, hstate);
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if (!pmd_none(*pm))
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return hugepte_offset((hugepd_t *)pm, addr,
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hstate);
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}
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}
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return NULL;
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}
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pte_t *huge_pte_alloc(struct mm_struct *mm,
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unsigned long addr, unsigned long sz)
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{
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pgd_t *pg;
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pud_t *pu;
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pmd_t *pm;
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hugepd_t *hpdp = NULL;
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struct hstate *hstate;
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unsigned int psize;
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hstate = size_to_hstate(sz);
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psize = get_slice_psize(mm, addr);
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BUG_ON(!mmu_huge_psizes[psize]);
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addr &= hstate->mask;
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pg = pgd_offset(mm, addr);
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pu = hpud_alloc(mm, pg, addr, hstate);
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if (pu) {
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pm = hpmd_alloc(mm, pu, addr, hstate);
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if (pm)
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hpdp = (hugepd_t *)pm;
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}
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if (! hpdp)
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return NULL;
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if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, psize))
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return NULL;
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return hugepte_offset(hpdp, addr, hstate);
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}
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int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)
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{
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return 0;
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}
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static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp,
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unsigned int psize)
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{
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pte_t *hugepte = hugepd_page(*hpdp);
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hpdp->pd = 0;
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tlb->need_flush = 1;
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pgtable_free_tlb(tlb, pgtable_free_cache(hugepte,
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HUGEPTE_CACHE_NUM+psize-1,
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PGF_CACHENUM_MASK));
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}
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static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
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unsigned long addr, unsigned long end,
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unsigned long floor, unsigned long ceiling,
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unsigned int psize)
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{
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pmd_t *pmd;
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unsigned long next;
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unsigned long start;
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start = addr;
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pmd = pmd_offset(pud, addr);
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do {
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next = pmd_addr_end(addr, end);
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if (pmd_none(*pmd))
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continue;
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free_hugepte_range(tlb, (hugepd_t *)pmd, psize);
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} while (pmd++, addr = next, addr != end);
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start &= PUD_MASK;
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if (start < floor)
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return;
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if (ceiling) {
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ceiling &= PUD_MASK;
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if (!ceiling)
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return;
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}
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if (end - 1 > ceiling - 1)
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return;
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pmd = pmd_offset(pud, start);
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pud_clear(pud);
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pmd_free_tlb(tlb, pmd);
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}
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static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
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unsigned long addr, unsigned long end,
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unsigned long floor, unsigned long ceiling)
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{
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pud_t *pud;
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unsigned long next;
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unsigned long start;
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unsigned int shift;
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unsigned int psize = get_slice_psize(tlb->mm, addr);
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shift = mmu_psize_to_shift(psize);
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start = addr;
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pud = pud_offset(pgd, addr);
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do {
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next = pud_addr_end(addr, end);
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if (shift < PMD_SHIFT) {
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if (pud_none_or_clear_bad(pud))
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continue;
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hugetlb_free_pmd_range(tlb, pud, addr, next, floor,
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ceiling, psize);
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} else {
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if (pud_none(*pud))
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continue;
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free_hugepte_range(tlb, (hugepd_t *)pud, psize);
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}
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} while (pud++, addr = next, addr != end);
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start &= PGDIR_MASK;
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if (start < floor)
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return;
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if (ceiling) {
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ceiling &= PGDIR_MASK;
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if (!ceiling)
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return;
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}
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if (end - 1 > ceiling - 1)
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return;
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pud = pud_offset(pgd, start);
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pgd_clear(pgd);
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pud_free_tlb(tlb, pud);
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}
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/*
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* This function frees user-level page tables of a process.
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*
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* Must be called with pagetable lock held.
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*/
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void hugetlb_free_pgd_range(struct mmu_gather *tlb,
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unsigned long addr, unsigned long end,
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unsigned long floor, unsigned long ceiling)
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{
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pgd_t *pgd;
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unsigned long next;
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unsigned long start;
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/*
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* Comments below take from the normal free_pgd_range(). They
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* apply here too. The tests against HUGEPD_MASK below are
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* essential, because we *don't* test for this at the bottom
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* level. Without them we'll attempt to free a hugepte table
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* when we unmap just part of it, even if there are other
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* active mappings using it.
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*
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* The next few lines have given us lots of grief...
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*
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* Why are we testing HUGEPD* at this top level? Because
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* often there will be no work to do at all, and we'd prefer
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* not to go all the way down to the bottom just to discover
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* that.
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*
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* Why all these "- 1"s? Because 0 represents both the bottom
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* of the address space and the top of it (using -1 for the
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* top wouldn't help much: the masks would do the wrong thing).
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* The rule is that addr 0 and floor 0 refer to the bottom of
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* the address space, but end 0 and ceiling 0 refer to the top
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* Comparisons need to use "end - 1" and "ceiling - 1" (though
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* that end 0 case should be mythical).
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*
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* Wherever addr is brought up or ceiling brought down, we
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* must be careful to reject "the opposite 0" before it
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* confuses the subsequent tests. But what about where end is
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* brought down by HUGEPD_SIZE below? no, end can't go down to
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* 0 there.
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*
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* Whereas we round start (addr) and ceiling down, by different
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* masks at different levels, in order to test whether a table
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* now has no other vmas using it, so can be freed, we don't
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* bother to round floor or end up - the tests don't need that.
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*/
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unsigned int psize = get_slice_psize(tlb->mm, addr);
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addr &= HUGEPD_MASK(psize);
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if (addr < floor) {
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addr += HUGEPD_SIZE(psize);
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if (!addr)
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return;
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}
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if (ceiling) {
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ceiling &= HUGEPD_MASK(psize);
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if (!ceiling)
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return;
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}
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if (end - 1 > ceiling - 1)
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end -= HUGEPD_SIZE(psize);
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if (addr > end - 1)
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return;
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start = addr;
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pgd = pgd_offset(tlb->mm, addr);
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do {
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psize = get_slice_psize(tlb->mm, addr);
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BUG_ON(!mmu_huge_psizes[psize]);
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next = pgd_addr_end(addr, end);
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if (mmu_psize_to_shift(psize) < PUD_SHIFT) {
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if (pgd_none_or_clear_bad(pgd))
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continue;
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hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling);
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} else {
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if (pgd_none(*pgd))
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continue;
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free_hugepte_range(tlb, (hugepd_t *)pgd, psize);
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}
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} while (pgd++, addr = next, addr != end);
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}
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void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep, pte_t pte)
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{
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if (pte_present(*ptep)) {
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/* We open-code pte_clear because we need to pass the right
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* argument to hpte_need_flush (huge / !huge). Might not be
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* necessary anymore if we make hpte_need_flush() get the
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* page size from the slices
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*/
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unsigned int psize = get_slice_psize(mm, addr);
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unsigned int shift = mmu_psize_to_shift(psize);
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unsigned long sz = ((1UL) << shift);
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struct hstate *hstate = size_to_hstate(sz);
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pte_update(mm, addr & hstate->mask, ptep, ~0UL, 1);
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}
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*ptep = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
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}
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pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep)
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{
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unsigned long old = pte_update(mm, addr, ptep, ~0UL, 1);
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return __pte(old);
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}
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struct page *
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follow_huge_addr(struct mm_struct *mm, unsigned long address, int write)
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{
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pte_t *ptep;
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struct page *page;
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unsigned int mmu_psize = get_slice_psize(mm, address);
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|
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/* Verify it is a huge page else bail. */
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if (!mmu_huge_psizes[mmu_psize])
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return ERR_PTR(-EINVAL);
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ptep = huge_pte_offset(mm, address);
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page = pte_page(*ptep);
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if (page) {
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unsigned int shift = mmu_psize_to_shift(mmu_psize);
|
|
unsigned long sz = ((1UL) << shift);
|
|
page += (address % sz) / PAGE_SIZE;
|
|
}
|
|
|
|
return page;
|
|
}
|
|
|
|
int pmd_huge(pmd_t pmd)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int pud_huge(pud_t pud)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
struct page *
|
|
follow_huge_pmd(struct mm_struct *mm, unsigned long address,
|
|
pmd_t *pmd, int write)
|
|
{
|
|
BUG();
|
|
return NULL;
|
|
}
|
|
|
|
|
|
unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
|
|
unsigned long len, unsigned long pgoff,
|
|
unsigned long flags)
|
|
{
|
|
struct hstate *hstate = hstate_file(file);
|
|
int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate));
|
|
|
|
if (!mmu_huge_psizes[mmu_psize])
|
|
return -EINVAL;
|
|
return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0);
|
|
}
|
|
|
|
unsigned long vma_mmu_pagesize(struct vm_area_struct *vma)
|
|
{
|
|
unsigned int psize = get_slice_psize(vma->vm_mm, vma->vm_start);
|
|
|
|
return 1UL << mmu_psize_to_shift(psize);
|
|
}
|
|
|
|
/*
|
|
* Called by asm hashtable.S for doing lazy icache flush
|
|
*/
|
|
static unsigned int hash_huge_page_do_lazy_icache(unsigned long rflags,
|
|
pte_t pte, int trap, unsigned long sz)
|
|
{
|
|
struct page *page;
|
|
int i;
|
|
|
|
if (!pfn_valid(pte_pfn(pte)))
|
|
return rflags;
|
|
|
|
page = pte_page(pte);
|
|
|
|
/* page is dirty */
|
|
if (!test_bit(PG_arch_1, &page->flags) && !PageReserved(page)) {
|
|
if (trap == 0x400) {
|
|
for (i = 0; i < (sz / PAGE_SIZE); i++)
|
|
__flush_dcache_icache(page_address(page+i));
|
|
set_bit(PG_arch_1, &page->flags);
|
|
} else {
|
|
rflags |= HPTE_R_N;
|
|
}
|
|
}
|
|
return rflags;
|
|
}
|
|
|
|
int hash_huge_page(struct mm_struct *mm, unsigned long access,
|
|
unsigned long ea, unsigned long vsid, int local,
|
|
unsigned long trap)
|
|
{
|
|
pte_t *ptep;
|
|
unsigned long old_pte, new_pte;
|
|
unsigned long va, rflags, pa, sz;
|
|
long slot;
|
|
int err = 1;
|
|
int ssize = user_segment_size(ea);
|
|
unsigned int mmu_psize;
|
|
int shift;
|
|
mmu_psize = get_slice_psize(mm, ea);
|
|
|
|
if (!mmu_huge_psizes[mmu_psize])
|
|
goto out;
|
|
ptep = huge_pte_offset(mm, ea);
|
|
|
|
/* Search the Linux page table for a match with va */
|
|
va = hpt_va(ea, vsid, ssize);
|
|
|
|
/*
|
|
* If no pte found or not present, send the problem up to
|
|
* do_page_fault
|
|
*/
|
|
if (unlikely(!ptep || pte_none(*ptep)))
|
|
goto out;
|
|
|
|
/*
|
|
* Check the user's access rights to the page. If access should be
|
|
* prevented then send the problem up to do_page_fault.
|
|
*/
|
|
if (unlikely(access & ~pte_val(*ptep)))
|
|
goto out;
|
|
/*
|
|
* At this point, we have a pte (old_pte) which can be used to build
|
|
* or update an HPTE. There are 2 cases:
|
|
*
|
|
* 1. There is a valid (present) pte with no associated HPTE (this is
|
|
* the most common case)
|
|
* 2. There is a valid (present) pte with an associated HPTE. The
|
|
* current values of the pp bits in the HPTE prevent access
|
|
* because we are doing software DIRTY bit management and the
|
|
* page is currently not DIRTY.
|
|
*/
|
|
|
|
|
|
do {
|
|
old_pte = pte_val(*ptep);
|
|
if (old_pte & _PAGE_BUSY)
|
|
goto out;
|
|
new_pte = old_pte | _PAGE_BUSY | _PAGE_ACCESSED;
|
|
} while(old_pte != __cmpxchg_u64((unsigned long *)ptep,
|
|
old_pte, new_pte));
|
|
|
|
rflags = 0x2 | (!(new_pte & _PAGE_RW));
|
|
/* _PAGE_EXEC -> HW_NO_EXEC since it's inverted */
|
|
rflags |= ((new_pte & _PAGE_EXEC) ? 0 : HPTE_R_N);
|
|
shift = mmu_psize_to_shift(mmu_psize);
|
|
sz = ((1UL) << shift);
|
|
if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
|
|
/* No CPU has hugepages but lacks no execute, so we
|
|
* don't need to worry about that case */
|
|
rflags = hash_huge_page_do_lazy_icache(rflags, __pte(old_pte),
|
|
trap, sz);
|
|
|
|
/* Check if pte already has an hpte (case 2) */
|
|
if (unlikely(old_pte & _PAGE_HASHPTE)) {
|
|
/* There MIGHT be an HPTE for this pte */
|
|
unsigned long hash, slot;
|
|
|
|
hash = hpt_hash(va, shift, ssize);
|
|
if (old_pte & _PAGE_F_SECOND)
|
|
hash = ~hash;
|
|
slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
|
|
slot += (old_pte & _PAGE_F_GIX) >> 12;
|
|
|
|
if (ppc_md.hpte_updatepp(slot, rflags, va, mmu_psize,
|
|
ssize, local) == -1)
|
|
old_pte &= ~_PAGE_HPTEFLAGS;
|
|
}
|
|
|
|
if (likely(!(old_pte & _PAGE_HASHPTE))) {
|
|
unsigned long hash = hpt_hash(va, shift, ssize);
|
|
unsigned long hpte_group;
|
|
|
|
pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT;
|
|
|
|
repeat:
|
|
hpte_group = ((hash & htab_hash_mask) *
|
|
HPTES_PER_GROUP) & ~0x7UL;
|
|
|
|
/* clear HPTE slot informations in new PTE */
|
|
#ifdef CONFIG_PPC_64K_PAGES
|
|
new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HPTE_SUB0;
|
|
#else
|
|
new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE;
|
|
#endif
|
|
/* Add in WIMG bits */
|
|
rflags |= (new_pte & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
|
|
_PAGE_COHERENT | _PAGE_GUARDED));
|
|
|
|
/* Insert into the hash table, primary slot */
|
|
slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, 0,
|
|
mmu_psize, ssize);
|
|
|
|
/* Primary is full, try the secondary */
|
|
if (unlikely(slot == -1)) {
|
|
hpte_group = ((~hash & htab_hash_mask) *
|
|
HPTES_PER_GROUP) & ~0x7UL;
|
|
slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags,
|
|
HPTE_V_SECONDARY,
|
|
mmu_psize, ssize);
|
|
if (slot == -1) {
|
|
if (mftb() & 0x1)
|
|
hpte_group = ((hash & htab_hash_mask) *
|
|
HPTES_PER_GROUP)&~0x7UL;
|
|
|
|
ppc_md.hpte_remove(hpte_group);
|
|
goto repeat;
|
|
}
|
|
}
|
|
|
|
if (unlikely(slot == -2))
|
|
panic("hash_huge_page: pte_insert failed\n");
|
|
|
|
new_pte |= (slot << 12) & (_PAGE_F_SECOND | _PAGE_F_GIX);
|
|
}
|
|
|
|
/*
|
|
* No need to use ldarx/stdcx here
|
|
*/
|
|
*ptep = __pte(new_pte & ~_PAGE_BUSY);
|
|
|
|
err = 0;
|
|
|
|
out:
|
|
return err;
|
|
}
|
|
|
|
static void __init set_huge_psize(int psize)
|
|
{
|
|
/* Check that it is a page size supported by the hardware and
|
|
* that it fits within pagetable limits. */
|
|
if (mmu_psize_defs[psize].shift &&
|
|
mmu_psize_defs[psize].shift < SID_SHIFT_1T &&
|
|
(mmu_psize_defs[psize].shift > MIN_HUGEPTE_SHIFT ||
|
|
mmu_psize_defs[psize].shift == PAGE_SHIFT_64K ||
|
|
mmu_psize_defs[psize].shift == PAGE_SHIFT_16G)) {
|
|
/* Return if huge page size has already been setup or is the
|
|
* same as the base page size. */
|
|
if (mmu_huge_psizes[psize] ||
|
|
mmu_psize_defs[psize].shift == PAGE_SHIFT)
|
|
return;
|
|
hugetlb_add_hstate(mmu_psize_defs[psize].shift - PAGE_SHIFT);
|
|
|
|
switch (mmu_psize_defs[psize].shift) {
|
|
case PAGE_SHIFT_64K:
|
|
/* We only allow 64k hpages with 4k base page,
|
|
* which was checked above, and always put them
|
|
* at the PMD */
|
|
hugepte_shift[psize] = PMD_SHIFT;
|
|
break;
|
|
case PAGE_SHIFT_16M:
|
|
/* 16M pages can be at two different levels
|
|
* of pagestables based on base page size */
|
|
if (PAGE_SHIFT == PAGE_SHIFT_64K)
|
|
hugepte_shift[psize] = PMD_SHIFT;
|
|
else /* 4k base page */
|
|
hugepte_shift[psize] = PUD_SHIFT;
|
|
break;
|
|
case PAGE_SHIFT_16G:
|
|
/* 16G pages are always at PGD level */
|
|
hugepte_shift[psize] = PGDIR_SHIFT;
|
|
break;
|
|
}
|
|
hugepte_shift[psize] -= mmu_psize_defs[psize].shift;
|
|
} else
|
|
hugepte_shift[psize] = 0;
|
|
}
|
|
|
|
static int __init hugepage_setup_sz(char *str)
|
|
{
|
|
unsigned long long size;
|
|
int mmu_psize;
|
|
int shift;
|
|
|
|
size = memparse(str, &str);
|
|
|
|
shift = __ffs(size);
|
|
mmu_psize = shift_to_mmu_psize(shift);
|
|
if (mmu_psize >= 0 && mmu_psize_defs[mmu_psize].shift)
|
|
set_huge_psize(mmu_psize);
|
|
else
|
|
printk(KERN_WARNING "Invalid huge page size specified(%llu)\n", size);
|
|
|
|
return 1;
|
|
}
|
|
__setup("hugepagesz=", hugepage_setup_sz);
|
|
|
|
static int __init hugetlbpage_init(void)
|
|
{
|
|
unsigned int psize;
|
|
|
|
if (!cpu_has_feature(CPU_FTR_16M_PAGE))
|
|
return -ENODEV;
|
|
|
|
/* Add supported huge page sizes. Need to change HUGE_MAX_HSTATE
|
|
* and adjust PTE_NONCACHE_NUM if the number of supported huge page
|
|
* sizes changes.
|
|
*/
|
|
set_huge_psize(MMU_PAGE_16M);
|
|
set_huge_psize(MMU_PAGE_16G);
|
|
|
|
/* Temporarily disable support for 64K huge pages when 64K SPU local
|
|
* store support is enabled as the current implementation conflicts.
|
|
*/
|
|
#ifndef CONFIG_SPU_FS_64K_LS
|
|
set_huge_psize(MMU_PAGE_64K);
|
|
#endif
|
|
|
|
for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
|
|
if (mmu_huge_psizes[psize]) {
|
|
pgtable_cache[HUGE_PGTABLE_INDEX(psize)] =
|
|
kmem_cache_create(
|
|
HUGEPTE_CACHE_NAME(psize),
|
|
HUGEPTE_TABLE_SIZE(psize),
|
|
HUGEPTE_TABLE_SIZE(psize),
|
|
0,
|
|
NULL);
|
|
if (!pgtable_cache[HUGE_PGTABLE_INDEX(psize)])
|
|
panic("hugetlbpage_init(): could not create %s"\
|
|
"\n", HUGEPTE_CACHE_NAME(psize));
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
module_init(hugetlbpage_init);
|