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c156633f13
Ethernet AVB includes an Gigabit Ethernet controller (E-MAC) that is basically compatible with SuperH Gigabit Ethernet E-MAC. Ethernet AVB has a dedicated direct memory access controller (AVB-DMAC) that is a new design compared to the SuperH E-DMAC. The AVB-DMAC is compliant with 3 standards formulated for IEEE 802.1BA: IEEE 802.1AS timing and synchronization protocol, IEEE 802.1Qav real- time transfer, and the IEEE 802.1Qat stream reservation protocol. The driver only supports device tree probing, so the binding document is included in this patch. Based on the original patches by Mitsuhiro Kimura. Signed-off-by: Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
49 lines
1.7 KiB
Plaintext
49 lines
1.7 KiB
Plaintext
* Renesas Electronics Ethernet AVB
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This file provides information on what the device node for the Ethernet AVB
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interface contains.
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Required properties:
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- compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC.
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"renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC.
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- reg: offset and length of (1) the register block and (2) the stream buffer.
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- interrupts: interrupt specifier for the sole interrupt.
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- phy-mode: see ethernet.txt file in the same directory.
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- phy-handle: see ethernet.txt file in the same directory.
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- #address-cells: number of address cells for the MDIO bus, must be equal to 1.
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- #size-cells: number of size cells on the MDIO bus, must be equal to 0.
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- clocks: clock phandle and specifier pair.
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- pinctrl-0: phandle, referring to a default pin configuration node.
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Optional properties:
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- interrupt-parent: the phandle for the interrupt controller that services
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interrupts for this device.
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- pinctrl-names: pin configuration state name ("default").
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- renesas,no-ether-link: boolean, specify when a board does not provide a proper
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AVB_LINK signal.
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- renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is
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active-low instead of normal active-high.
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Example:
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ethernet@e6800000 {
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compatible = "renesas,etheravb-r8a7790";
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reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
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interrupt-parent = <&gic>;
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interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
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phy-mode = "rmii";
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phy-handle = <&phy0>;
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pinctrl-0 = <ðer_pins>;
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pinctrl-names = "default";
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renesas,no-ether-link;
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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interrupt-parent = <&gpio2>;
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interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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