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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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74a497fae7
VMCS12 fields that are not handled through shadow VMCS are rarely written, and thus they are also almost constant in the vmcs02. We can thus optimize prepare_vmcs02 by skipping all the work for non-shadowed fields in the common case. This patch introduces the (pretty simple) tracking infrastructure; the next patches will move work to prepare_vmcs02_full and save a few hundred clock cycles per VMRESUME on a Haswell Xeon E5 system: before after cpuid 14159 13869 vmcall 15290 14951 inl_from_kernel 17703 17447 outl_to_kernel 16011 14692 self_ipi_sti_nop 16763 15825 self_ipi_tpr_sti_nop 17341 15935 wr_tsc_adjust_msr 14510 14264 rd_tsc_adjust_msr 15018 14311 mmio-wildcard-eventfd:pci-mem 16381 14947 mmio-datamatch-eventfd:pci-mem 18620 17858 portio-wildcard-eventfd:pci-io 15121 14769 portio-datamatch-eventfd:pci-io 15761 14831 (average savings 748, stdev 460). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
78 lines
2.3 KiB
C
78 lines
2.3 KiB
C
#ifndef SHADOW_FIELD_RO
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#define SHADOW_FIELD_RO(x)
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#endif
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#ifndef SHADOW_FIELD_RW
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#define SHADOW_FIELD_RW(x)
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#endif
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/*
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* We do NOT shadow fields that are modified when L0
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* traps and emulates any vmx instruction (e.g. VMPTRLD,
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* VMXON...) executed by L1.
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* For example, VM_INSTRUCTION_ERROR is read
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* by L1 if a vmx instruction fails (part of the error path).
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* Note the code assumes this logic. If for some reason
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* we start shadowing these fields then we need to
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* force a shadow sync when L0 emulates vmx instructions
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* (e.g. force a sync if VM_INSTRUCTION_ERROR is modified
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* by nested_vmx_failValid)
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*
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* When adding or removing fields here, note that shadowed
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* fields must always be synced by prepare_vmcs02, not just
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* prepare_vmcs02_full.
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*/
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/*
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* Keeping the fields ordered by size is an attempt at improving
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* branch prediction in vmcs_read_any and vmcs_write_any.
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*/
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/* 16-bits */
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SHADOW_FIELD_RW(GUEST_CS_SELECTOR)
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SHADOW_FIELD_RW(GUEST_INTR_STATUS)
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SHADOW_FIELD_RW(GUEST_PML_INDEX)
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SHADOW_FIELD_RW(HOST_FS_SELECTOR)
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SHADOW_FIELD_RW(HOST_GS_SELECTOR)
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/* 32-bits */
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SHADOW_FIELD_RO(VM_EXIT_REASON)
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SHADOW_FIELD_RO(VM_EXIT_INTR_INFO)
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SHADOW_FIELD_RO(VM_EXIT_INSTRUCTION_LEN)
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SHADOW_FIELD_RO(IDT_VECTORING_INFO_FIELD)
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SHADOW_FIELD_RO(IDT_VECTORING_ERROR_CODE)
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SHADOW_FIELD_RO(VM_EXIT_INTR_ERROR_CODE)
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SHADOW_FIELD_RW(CPU_BASED_VM_EXEC_CONTROL)
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SHADOW_FIELD_RW(EXCEPTION_BITMAP)
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SHADOW_FIELD_RW(VM_ENTRY_EXCEPTION_ERROR_CODE)
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SHADOW_FIELD_RW(VM_ENTRY_INTR_INFO_FIELD)
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SHADOW_FIELD_RW(VM_ENTRY_INSTRUCTION_LEN)
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SHADOW_FIELD_RW(TPR_THRESHOLD)
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SHADOW_FIELD_RW(GUEST_CS_LIMIT)
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SHADOW_FIELD_RW(GUEST_CS_AR_BYTES)
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SHADOW_FIELD_RW(GUEST_INTERRUPTIBILITY_INFO)
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SHADOW_FIELD_RW(VMX_PREEMPTION_TIMER_VALUE)
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/* Natural width */
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SHADOW_FIELD_RO(EXIT_QUALIFICATION)
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SHADOW_FIELD_RO(GUEST_LINEAR_ADDRESS)
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SHADOW_FIELD_RW(GUEST_RIP)
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SHADOW_FIELD_RW(GUEST_RSP)
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SHADOW_FIELD_RW(GUEST_CR0)
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SHADOW_FIELD_RW(GUEST_CR3)
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SHADOW_FIELD_RW(GUEST_CR4)
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SHADOW_FIELD_RW(GUEST_RFLAGS)
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SHADOW_FIELD_RW(GUEST_CS_BASE)
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SHADOW_FIELD_RW(GUEST_ES_BASE)
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SHADOW_FIELD_RW(CR0_GUEST_HOST_MASK)
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SHADOW_FIELD_RW(CR0_READ_SHADOW)
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SHADOW_FIELD_RW(CR4_READ_SHADOW)
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SHADOW_FIELD_RW(HOST_FS_BASE)
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SHADOW_FIELD_RW(HOST_GS_BASE)
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/* 64-bit */
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SHADOW_FIELD_RO(GUEST_PHYSICAL_ADDRESS)
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SHADOW_FIELD_RO(GUEST_PHYSICAL_ADDRESS_HIGH)
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#undef SHADOW_FIELD_RO
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#undef SHADOW_FIELD_RW
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