mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 14:44:31 +07:00
7b6d864b48
Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum. [akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: Robin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
772 lines
14 KiB
C
772 lines
14 KiB
C
/*
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* linux/arch/arm/mach-footbridge/netwinder-hw.c
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*
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* Netwinder machine fixup
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*
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* Copyright (C) 1998, 1999 Russell King, Phil Blundell
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*/
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/spinlock.h>
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#include <linux/slab.h>
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#include <linux/leds.h>
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#include <asm/hardware/dec21285.h>
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#include <asm/mach-types.h>
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#include <asm/setup.h>
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#include <asm/system_misc.h>
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#include <asm/mach/arch.h>
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#include "common.h"
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#define IRDA_IO_BASE 0x180
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#define GP1_IO_BASE 0x338
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#define GP2_IO_BASE 0x33a
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/*
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* Winbond WB83977F accessibility stuff
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*/
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static inline void wb977_open(void)
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{
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outb(0x87, 0x370);
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outb(0x87, 0x370);
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}
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static inline void wb977_close(void)
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{
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outb(0xaa, 0x370);
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}
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static inline void wb977_wb(int reg, int val)
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{
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outb(reg, 0x370);
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outb(val, 0x371);
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}
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static inline void wb977_ww(int reg, int val)
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{
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outb(reg, 0x370);
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outb(val >> 8, 0x371);
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outb(reg + 1, 0x370);
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outb(val & 255, 0x371);
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}
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#define wb977_device_select(dev) wb977_wb(0x07, dev)
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#define wb977_device_disable() wb977_wb(0x30, 0x00)
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#define wb977_device_enable() wb977_wb(0x30, 0x01)
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/*
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* This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
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*/
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DEFINE_RAW_SPINLOCK(nw_gpio_lock);
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EXPORT_SYMBOL(nw_gpio_lock);
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static unsigned int current_gpio_op;
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static unsigned int current_gpio_io;
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static unsigned int current_cpld;
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void nw_gpio_modify_op(unsigned int mask, unsigned int set)
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{
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unsigned int new_gpio, changed;
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new_gpio = (current_gpio_op & ~mask) | set;
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changed = new_gpio ^ current_gpio_op;
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current_gpio_op = new_gpio;
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if (changed & 0xff)
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outb(new_gpio, GP1_IO_BASE);
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if (changed & 0xff00)
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outb(new_gpio >> 8, GP2_IO_BASE);
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}
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EXPORT_SYMBOL(nw_gpio_modify_op);
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static inline void __gpio_modify_io(int mask, int in)
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{
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unsigned int new_gpio, changed;
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int port;
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new_gpio = (current_gpio_io & ~mask) | in;
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changed = new_gpio ^ current_gpio_io;
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current_gpio_io = new_gpio;
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changed >>= 1;
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new_gpio >>= 1;
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wb977_device_select(7);
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for (port = 0xe1; changed && port < 0xe8; changed >>= 1) {
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wb977_wb(port, new_gpio & 1);
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port += 1;
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new_gpio >>= 1;
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}
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wb977_device_select(8);
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for (port = 0xe8; changed && port < 0xec; changed >>= 1) {
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wb977_wb(port, new_gpio & 1);
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port += 1;
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new_gpio >>= 1;
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}
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}
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void nw_gpio_modify_io(unsigned int mask, unsigned int in)
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{
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/* Open up the SuperIO chip */
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wb977_open();
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__gpio_modify_io(mask, in);
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/* Close up the EFER gate */
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wb977_close();
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}
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EXPORT_SYMBOL(nw_gpio_modify_io);
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unsigned int nw_gpio_read(void)
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{
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return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8;
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}
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EXPORT_SYMBOL(nw_gpio_read);
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/*
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* Initialise the Winbond W83977F global registers
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*/
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static inline void wb977_init_global(void)
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{
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/*
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* Enable R/W config registers
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*/
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wb977_wb(0x26, 0x40);
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/*
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* Power down FDC (not used)
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*/
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wb977_wb(0x22, 0xfe);
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/*
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* GP12, GP11, CIRRX, IRRXH, GP10
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*/
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wb977_wb(0x2a, 0xc1);
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/*
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* GP23, GP22, GP21, GP20, GP13
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*/
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wb977_wb(0x2b, 0x6b);
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/*
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* GP17, GP16, GP15, GP14
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*/
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wb977_wb(0x2c, 0x55);
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}
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/*
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* Initialise the Winbond W83977F printer port
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*/
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static inline void wb977_init_printer(void)
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{
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wb977_device_select(1);
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/*
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* mode 1 == EPP
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*/
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wb977_wb(0xf0, 0x01);
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}
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/*
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* Initialise the Winbond W83977F keyboard controller
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*/
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static inline void wb977_init_keyboard(void)
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{
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wb977_device_select(5);
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/*
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* Keyboard controller address
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*/
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wb977_ww(0x60, 0x0060);
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wb977_ww(0x62, 0x0064);
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/*
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* Keyboard IRQ 1, active high, edge trigger
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*/
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wb977_wb(0x70, 1);
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wb977_wb(0x71, 0x02);
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/*
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* Mouse IRQ 5, active high, edge trigger
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*/
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wb977_wb(0x72, 5);
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wb977_wb(0x73, 0x02);
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/*
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* KBC 8MHz
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*/
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wb977_wb(0xf0, 0x40);
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/*
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* Enable device
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*/
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wb977_device_enable();
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}
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/*
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* Initialise the Winbond W83977F Infra-Red device
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*/
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static inline void wb977_init_irda(void)
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{
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wb977_device_select(6);
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/*
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* IR base address
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*/
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wb977_ww(0x60, IRDA_IO_BASE);
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/*
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* IRDA IRQ 6, active high, edge trigger
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*/
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wb977_wb(0x70, 6);
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wb977_wb(0x71, 0x02);
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/*
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* RX DMA - ISA DMA 0
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*/
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wb977_wb(0x74, 0x00);
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/*
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* TX DMA - Disable Tx DMA
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*/
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wb977_wb(0x75, 0x04);
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/*
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* Append CRC, Enable bank selection
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*/
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wb977_wb(0xf0, 0x03);
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/*
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* Enable device
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*/
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wb977_device_enable();
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}
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/*
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* Initialise Winbond W83977F general purpose IO
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*/
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static inline void wb977_init_gpio(void)
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{
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unsigned long flags;
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/*
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* Set up initial I/O definitions
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*/
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current_gpio_io = -1;
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__gpio_modify_io(-1, GPIO_DONE | GPIO_WDTIMER);
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wb977_device_select(7);
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/*
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* Group1 base address
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*/
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wb977_ww(0x60, GP1_IO_BASE);
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wb977_ww(0x62, 0);
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wb977_ww(0x64, 0);
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/*
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* GP10 (Orage button) IRQ 10, active high, edge trigger
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*/
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wb977_wb(0x70, 10);
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wb977_wb(0x71, 0x02);
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/*
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* GP10: Debounce filter enabled, IRQ, input
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*/
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wb977_wb(0xe0, 0x19);
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/*
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* Enable Group1
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*/
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wb977_device_enable();
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wb977_device_select(8);
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/*
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* Group2 base address
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*/
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wb977_ww(0x60, GP2_IO_BASE);
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/*
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* Clear watchdog timer regs
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* - timer disable
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*/
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wb977_wb(0xf2, 0x00);
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/*
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* - disable LED, no mouse nor keyboard IRQ
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*/
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wb977_wb(0xf3, 0x00);
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/*
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* - timer counting, disable power LED, disable timeouot
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*/
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wb977_wb(0xf4, 0x00);
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/*
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* Enable group2
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*/
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wb977_device_enable();
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/*
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* Set Group1/Group2 outputs
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*/
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raw_spin_lock_irqsave(&nw_gpio_lock, flags);
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nw_gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
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raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
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}
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/*
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* Initialise the Winbond W83977F chip.
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*/
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static void __init wb977_init(void)
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{
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request_region(0x370, 2, "W83977AF configuration");
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/*
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* Open up the SuperIO chip
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*/
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wb977_open();
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/*
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* Initialise the global registers
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*/
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wb977_init_global();
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/*
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* Initialise the various devices in
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* the multi-IO chip.
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*/
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wb977_init_printer();
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wb977_init_keyboard();
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wb977_init_irda();
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wb977_init_gpio();
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/*
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* Close up the EFER gate
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*/
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wb977_close();
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}
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void nw_cpld_modify(unsigned int mask, unsigned int set)
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{
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int msk;
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current_cpld = (current_cpld & ~mask) | set;
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nw_gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
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nw_gpio_modify_op(GPIO_IOLOAD, 0);
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for (msk = 8; msk; msk >>= 1) {
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int bit = current_cpld & msk;
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nw_gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
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nw_gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
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}
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nw_gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
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nw_gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
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nw_gpio_modify_op(GPIO_IOLOAD, 0);
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}
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EXPORT_SYMBOL(nw_cpld_modify);
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static void __init cpld_init(void)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&nw_gpio_lock, flags);
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nw_cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
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raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
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}
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static unsigned char rwa_unlock[] __initdata =
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{ 0x00, 0x00, 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b,
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0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74,
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0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 };
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#ifndef DEBUG
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#define dprintk(x...)
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#else
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#define dprintk(x...) printk(x)
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#endif
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#define WRITE_RWA(r,v) do { outb((r), 0x279); udelay(10); outb((v), 0xa79); } while (0)
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static inline void rwa010_unlock(void)
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{
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int i;
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WRITE_RWA(2, 2);
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mdelay(10);
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for (i = 0; i < sizeof(rwa_unlock); i++) {
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outb(rwa_unlock[i], 0x279);
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udelay(10);
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}
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}
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static inline void rwa010_read_ident(void)
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{
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unsigned char si[9];
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int i, j;
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WRITE_RWA(3, 0);
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WRITE_RWA(0, 128);
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outb(1, 0x279);
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mdelay(1);
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dprintk("Identifier: ");
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for (i = 0; i < 9; i++) {
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si[i] = 0;
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for (j = 0; j < 8; j++) {
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int bit;
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udelay(250);
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inb(0x203);
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udelay(250);
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bit = inb(0x203);
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dprintk("%02X ", bit);
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bit = (bit == 0xaa) ? 1 : 0;
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si[i] |= bit << j;
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}
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dprintk("(%02X) ", si[i]);
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}
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dprintk("\n");
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}
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static inline void rwa010_global_init(void)
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{
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WRITE_RWA(6, 2); // Assign a card no = 2
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dprintk("Card no = %d\n", inb(0x203));
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/* disable the modem section of the chip */
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WRITE_RWA(7, 3);
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WRITE_RWA(0x30, 0);
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/* disable the cdrom section of the chip */
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WRITE_RWA(7, 4);
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WRITE_RWA(0x30, 0);
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/* disable the MPU-401 section of the chip */
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WRITE_RWA(7, 2);
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WRITE_RWA(0x30, 0);
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}
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static inline void rwa010_game_port_init(void)
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{
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int i;
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WRITE_RWA(7, 5);
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dprintk("Slider base: ");
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WRITE_RWA(0x61, 1);
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i = inb(0x203);
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WRITE_RWA(0x60, 2);
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dprintk("%02X%02X (201)\n", inb(0x203), i);
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WRITE_RWA(0x30, 1);
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}
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static inline void rwa010_waveartist_init(int base, int irq, int dma)
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{
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int i;
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WRITE_RWA(7, 0);
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dprintk("WaveArtist base: ");
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WRITE_RWA(0x61, base & 255);
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i = inb(0x203);
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WRITE_RWA(0x60, base >> 8);
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dprintk("%02X%02X (%X),", inb(0x203), i, base);
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WRITE_RWA(0x70, irq);
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dprintk(" irq: %d (%d),", inb(0x203), irq);
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WRITE_RWA(0x74, dma);
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dprintk(" dma: %d (%d)\n", inb(0x203), dma);
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WRITE_RWA(0x30, 1);
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}
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static inline void rwa010_soundblaster_init(int sb_base, int al_base, int irq, int dma)
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{
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int i;
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WRITE_RWA(7, 1);
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dprintk("SoundBlaster base: ");
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WRITE_RWA(0x61, sb_base & 255);
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i = inb(0x203);
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WRITE_RWA(0x60, sb_base >> 8);
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dprintk("%02X%02X (%X),", inb(0x203), i, sb_base);
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dprintk(" irq: ");
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WRITE_RWA(0x70, irq);
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dprintk("%d (%d),", inb(0x203), irq);
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dprintk(" 8-bit DMA: ");
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WRITE_RWA(0x74, dma);
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dprintk("%d (%d)\n", inb(0x203), dma);
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dprintk("AdLib base: ");
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WRITE_RWA(0x63, al_base & 255);
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i = inb(0x203);
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WRITE_RWA(0x62, al_base >> 8);
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dprintk("%02X%02X (%X)\n", inb(0x203), i, al_base);
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WRITE_RWA(0x30, 1);
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}
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static void rwa010_soundblaster_reset(void)
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{
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int i;
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outb(1, 0x226);
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udelay(3);
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outb(0, 0x226);
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for (i = 0; i < 5; i++) {
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if (inb(0x22e) & 0x80)
|
|
break;
|
|
mdelay(1);
|
|
}
|
|
if (i == 5)
|
|
printk("SoundBlaster: DSP reset failed\n");
|
|
|
|
dprintk("SoundBlaster DSP reset: %02X (AA)\n", inb(0x22a));
|
|
|
|
for (i = 0; i < 5; i++) {
|
|
if ((inb(0x22c) & 0x80) == 0)
|
|
break;
|
|
mdelay(1);
|
|
}
|
|
|
|
if (i == 5)
|
|
printk("SoundBlaster: DSP not ready\n");
|
|
else {
|
|
outb(0xe1, 0x22c);
|
|
|
|
dprintk("SoundBlaster DSP id: ");
|
|
i = inb(0x22a);
|
|
udelay(1);
|
|
i |= inb(0x22a) << 8;
|
|
dprintk("%04X\n", i);
|
|
|
|
for (i = 0; i < 5; i++) {
|
|
if ((inb(0x22c) & 0x80) == 0)
|
|
break;
|
|
mdelay(1);
|
|
}
|
|
|
|
if (i == 5)
|
|
printk("SoundBlaster: could not turn speaker off\n");
|
|
|
|
outb(0xd3, 0x22c);
|
|
}
|
|
|
|
/* turn on OPL3 */
|
|
outb(5, 0x38a);
|
|
outb(1, 0x38b);
|
|
}
|
|
|
|
static void __init rwa010_init(void)
|
|
{
|
|
rwa010_unlock();
|
|
rwa010_read_ident();
|
|
rwa010_global_init();
|
|
rwa010_game_port_init();
|
|
rwa010_waveartist_init(0x250, 3, 7);
|
|
rwa010_soundblaster_init(0x220, 0x388, 3, 1);
|
|
rwa010_soundblaster_reset();
|
|
}
|
|
|
|
/*
|
|
* Initialise any other hardware after we've got the PCI bus
|
|
* initialised. We may need the PCI bus to talk to this other
|
|
* hardware.
|
|
*/
|
|
static int __init nw_hw_init(void)
|
|
{
|
|
if (machine_is_netwinder()) {
|
|
wb977_init();
|
|
cpld_init();
|
|
rwa010_init();
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
__initcall(nw_hw_init);
|
|
|
|
/*
|
|
* Older NeTTroms either do not provide a parameters
|
|
* page, or they don't supply correct information in
|
|
* the parameter page.
|
|
*/
|
|
static void __init
|
|
fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi)
|
|
{
|
|
#ifdef CONFIG_ISAPNP
|
|
extern int isapnp_disable;
|
|
|
|
/*
|
|
* We must not use the kernels ISAPnP code
|
|
* on the NetWinder - it will reset the settings
|
|
* for the WaveArtist chip and render it inoperable.
|
|
*/
|
|
isapnp_disable = 1;
|
|
#endif
|
|
}
|
|
|
|
static void netwinder_restart(enum reboot_mode mode, const char *cmd)
|
|
{
|
|
if (mode == REBOOT_SOFT) {
|
|
/* Jump into the ROM */
|
|
soft_restart(0x41000000);
|
|
} else {
|
|
local_irq_disable();
|
|
local_fiq_disable();
|
|
|
|
/* open up the SuperIO chip */
|
|
outb(0x87, 0x370);
|
|
outb(0x87, 0x370);
|
|
|
|
/* aux function group 1 (logical device 7) */
|
|
outb(0x07, 0x370);
|
|
outb(0x07, 0x371);
|
|
|
|
/* set GP16 for WD-TIMER output */
|
|
outb(0xe6, 0x370);
|
|
outb(0x00, 0x371);
|
|
|
|
/* set a RED LED and toggle WD_TIMER for rebooting */
|
|
outb(0xc4, 0x338);
|
|
}
|
|
}
|
|
|
|
/* LEDs */
|
|
#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
|
|
struct netwinder_led {
|
|
struct led_classdev cdev;
|
|
u8 mask;
|
|
};
|
|
|
|
/*
|
|
* The triggers lines up below will only be used if the
|
|
* LED triggers are compiled in.
|
|
*/
|
|
static const struct {
|
|
const char *name;
|
|
const char *trigger;
|
|
} netwinder_leds[] = {
|
|
{ "netwinder:green", "heartbeat", },
|
|
{ "netwinder:red", "cpu0", },
|
|
};
|
|
|
|
/*
|
|
* The LED control in Netwinder is reversed:
|
|
* - setting bit means turn off LED
|
|
* - clearing bit means turn on LED
|
|
*/
|
|
static void netwinder_led_set(struct led_classdev *cdev,
|
|
enum led_brightness b)
|
|
{
|
|
struct netwinder_led *led = container_of(cdev,
|
|
struct netwinder_led, cdev);
|
|
unsigned long flags;
|
|
u32 reg;
|
|
|
|
spin_lock_irqsave(&nw_gpio_lock, flags);
|
|
reg = nw_gpio_read();
|
|
if (b != LED_OFF)
|
|
reg &= ~led->mask;
|
|
else
|
|
reg |= led->mask;
|
|
nw_gpio_modify_op(led->mask, reg);
|
|
spin_unlock_irqrestore(&nw_gpio_lock, flags);
|
|
}
|
|
|
|
static enum led_brightness netwinder_led_get(struct led_classdev *cdev)
|
|
{
|
|
struct netwinder_led *led = container_of(cdev,
|
|
struct netwinder_led, cdev);
|
|
unsigned long flags;
|
|
u32 reg;
|
|
|
|
spin_lock_irqsave(&nw_gpio_lock, flags);
|
|
reg = nw_gpio_read();
|
|
spin_unlock_irqrestore(&nw_gpio_lock, flags);
|
|
|
|
return (reg & led->mask) ? LED_OFF : LED_FULL;
|
|
}
|
|
|
|
static int __init netwinder_leds_init(void)
|
|
{
|
|
int i;
|
|
|
|
if (!machine_is_netwinder())
|
|
return -ENODEV;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(netwinder_leds); i++) {
|
|
struct netwinder_led *led;
|
|
|
|
led = kzalloc(sizeof(*led), GFP_KERNEL);
|
|
if (!led)
|
|
break;
|
|
|
|
led->cdev.name = netwinder_leds[i].name;
|
|
led->cdev.brightness_set = netwinder_led_set;
|
|
led->cdev.brightness_get = netwinder_led_get;
|
|
led->cdev.default_trigger = netwinder_leds[i].trigger;
|
|
|
|
if (i == 0)
|
|
led->mask = GPIO_GREEN_LED;
|
|
else
|
|
led->mask = GPIO_RED_LED;
|
|
|
|
if (led_classdev_register(NULL, &led->cdev) < 0) {
|
|
kfree(led);
|
|
break;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Since we may have triggers on any subsystem, defer registration
|
|
* until after subsystem_init.
|
|
*/
|
|
fs_initcall(netwinder_leds_init);
|
|
#endif
|
|
|
|
MACHINE_START(NETWINDER, "Rebel-NetWinder")
|
|
/* Maintainer: Russell King/Rebel.com */
|
|
.atag_offset = 0x100,
|
|
.video_start = 0x000a0000,
|
|
.video_end = 0x000bffff,
|
|
.reserve_lp0 = 1,
|
|
.reserve_lp2 = 1,
|
|
.fixup = fixup_netwinder,
|
|
.map_io = footbridge_map_io,
|
|
.init_irq = footbridge_init_irq,
|
|
.init_time = isa_timer_init,
|
|
.restart = netwinder_restart,
|
|
MACHINE_END
|