mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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fba4e9f989
Starting with commit <8947e396a829> ("Documentation: dt: mtd:
replace "nor-jedec" binding with "jedec, spi-nor"") we have
"jedec,spi-nor" binding indicating support for JEDEC identification.
Use it for all flashes that are supposed to support READ ID op
according to the datasheets.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
Signed-off-by: Scott Wood <oss@buserror.net>
114 lines
3.1 KiB
Plaintext
114 lines
3.1 KiB
Plaintext
/*
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* BSC9132 QDS Device Tree Source stub (no addresses or top-level ranges)
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*
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* Copyright 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&ifc {
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x8000000>;
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bank-width = <2>;
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device-width = <1>;
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};
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nand@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,ifc-nand";
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reg = <0x1 0x0 0x4000>;
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};
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};
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&soc {
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spi@7000 {
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,s25sl12801", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <30000000>;
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};
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};
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i2c@3000 {
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fpga: fpga@66 {
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compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
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reg = <0x66>;
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};
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};
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usb@22000 {
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phy_type = "ulpi";
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};
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mdio@24000 {
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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};
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phy1: ethernet-phy@1 {
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reg = <0x1>;
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};
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tbi0: tbi-phy@11 {
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reg = <0x1f>;
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device_type = "tbi-phy";
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};
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};
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ptp_clock@b0e00 {
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compatible = "fsl,etsec-ptp";
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reg = <0xb0e00 0xb0>;
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interrupts = <68 2 0 0 69 2 0 0>;
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fsl,tclk-period = <5>;
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fsl,tmr-prsc = <2>;
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fsl,tmr-add = <0xcccccccd>;
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fsl,tmr-fiper1 = <999999995>;
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fsl,tmr-fiper2 = <99990>;
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fsl,max-adj = <249999999>;
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};
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enet0: ethernet@b0000 {
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phy-handle = <&phy0>;
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tbi-handle = <&tbi0>;
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phy-connection-type = "sgmii";
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};
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enet1: ethernet@b1000 {
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phy-handle = <&phy1>;
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tbi-handle = <&tbi0>;
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phy-connection-type = "sgmii";
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};
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};
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