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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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20a004e7b0
In many cases, page tables can be accessed concurrently by either another CPU (due to things like fast gup) or by the hardware page table walker itself, which may set access/dirty bits. In such cases, it is important to use READ_ONCE/WRITE_ONCE when accessing page table entries so that entries cannot be torn, merged or subject to apparent loss of coherence due to compiler transformations. Whilst there are some scenarios where this cannot happen (e.g. pinned kernel mappings for the linear region), the overhead of using READ_ONCE /WRITE_ONCE everywhere is minimal and makes the code an awful lot easier to reason about. This patch consistently uses these macros in the arch code, as well as explicitly namespacing pointers to page table entries from the entries themselves by using adopting a 'p' suffix for the former (as is sometimes used elsewhere in the kernel source). Tested-by: Yury Norov <ynorov@caviumnetworks.com> Tested-by: Richard Ruigrok <rruigrok@codeaurora.org> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
156 lines
3.8 KiB
C
156 lines
3.8 KiB
C
/*
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* Based on arch/arm/include/asm/pgalloc.h
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*
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* Copyright (C) 2000-2001 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_PGALLOC_H
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#define __ASM_PGALLOC_H
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#include <asm/pgtable-hwdef.h>
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#include <asm/processor.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#define check_pgt_cache() do { } while (0)
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#define PGALLOC_GFP (GFP_KERNEL | __GFP_ZERO)
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#define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
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#if CONFIG_PGTABLE_LEVELS > 2
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static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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return (pmd_t *)__get_free_page(PGALLOC_GFP);
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}
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static inline void pmd_free(struct mm_struct *mm, pmd_t *pmdp)
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{
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BUG_ON((unsigned long)pmdp & (PAGE_SIZE-1));
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free_page((unsigned long)pmdp);
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}
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static inline void __pud_populate(pud_t *pudp, phys_addr_t pmdp, pudval_t prot)
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{
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set_pud(pudp, __pud(__phys_to_pud_val(pmdp) | prot));
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}
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static inline void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmdp)
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{
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__pud_populate(pudp, __pa(pmdp), PMD_TYPE_TABLE);
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}
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#else
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static inline void __pud_populate(pud_t *pudp, phys_addr_t pmdp, pudval_t prot)
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{
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BUILD_BUG();
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}
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#endif /* CONFIG_PGTABLE_LEVELS > 2 */
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#if CONFIG_PGTABLE_LEVELS > 3
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static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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return (pud_t *)__get_free_page(PGALLOC_GFP);
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}
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static inline void pud_free(struct mm_struct *mm, pud_t *pudp)
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{
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BUG_ON((unsigned long)pudp & (PAGE_SIZE-1));
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free_page((unsigned long)pudp);
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}
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static inline void __pgd_populate(pgd_t *pgdp, phys_addr_t pudp, pgdval_t prot)
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{
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set_pgd(pgdp, __pgd(__phys_to_pgd_val(pudp) | prot));
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}
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static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgdp, pud_t *pudp)
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{
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__pgd_populate(pgdp, __pa(pudp), PUD_TYPE_TABLE);
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}
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#else
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static inline void __pgd_populate(pgd_t *pgdp, phys_addr_t pudp, pgdval_t prot)
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{
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BUILD_BUG();
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}
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#endif /* CONFIG_PGTABLE_LEVELS > 3 */
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extern pgd_t *pgd_alloc(struct mm_struct *mm);
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extern void pgd_free(struct mm_struct *mm, pgd_t *pgdp);
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static inline pte_t *
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pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
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{
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return (pte_t *)__get_free_page(PGALLOC_GFP);
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}
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static inline pgtable_t
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pte_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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struct page *pte;
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pte = alloc_pages(PGALLOC_GFP, 0);
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if (!pte)
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return NULL;
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if (!pgtable_page_ctor(pte)) {
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__free_page(pte);
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return NULL;
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}
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return pte;
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}
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/*
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* Free a PTE table.
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*/
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static inline void pte_free_kernel(struct mm_struct *mm, pte_t *ptep)
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{
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if (ptep)
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free_page((unsigned long)ptep);
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}
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static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
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{
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pgtable_page_dtor(pte);
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__free_page(pte);
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}
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static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t ptep,
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pmdval_t prot)
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{
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set_pmd(pmdp, __pmd(__phys_to_pmd_val(ptep) | prot));
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}
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/*
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* Populate the pmdp entry with a pointer to the pte. This pmd is part
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* of the mm address space.
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*/
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static inline void
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pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
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{
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/*
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* The pmd must be loaded with the physical address of the PTE table
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*/
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__pmd_populate(pmdp, __pa(ptep), PMD_TYPE_TABLE);
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}
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static inline void
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pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep)
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{
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__pmd_populate(pmdp, page_to_phys(ptep), PMD_TYPE_TABLE);
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}
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#define pmd_pgtable(pmd) pmd_page(pmd)
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#endif
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