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8a9a982767
The CS pre-parser can pre-fetch commands across memory sync points and starting from gen12 it is able to pre-fetch across BB_START and BB_END boundaries as well, so when we emit gpu relocs the pre-parser might fetch the target location of the reloc before the memory write lands. The parser can't pre-fetch across the ctx switch, so we use a separate context to guarantee that the memory is synchronized before the parser can get to it. Note that there is no risk of the CS doing a lite restore from the reloc context to the user context, even if the two have the same hw_id, because since gen11 the CS also checks the LRCA when deciding if it can lite-restore. v2: limit new context to gen12+, release in eb_destroy, add a comment in emit_fini_breadcrumb (Chris). Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190827185805.21799-1-daniele.ceraolospurio@intel.com |
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.. | ||
selftests | ||
i915_gem_busy.c | ||
i915_gem_clflush.c | ||
i915_gem_clflush.h | ||
i915_gem_client_blt.c | ||
i915_gem_client_blt.h | ||
i915_gem_context_types.h | ||
i915_gem_context.c | ||
i915_gem_context.h | ||
i915_gem_dmabuf.c | ||
i915_gem_domain.c | ||
i915_gem_execbuffer.c | ||
i915_gem_fence.c | ||
i915_gem_internal.c | ||
i915_gem_ioctls.h | ||
i915_gem_mman.c | ||
i915_gem_object_blt.c | ||
i915_gem_object_blt.h | ||
i915_gem_object_types.h | ||
i915_gem_object.c | ||
i915_gem_object.h | ||
i915_gem_pages.c | ||
i915_gem_phys.c | ||
i915_gem_pm.c | ||
i915_gem_pm.h | ||
i915_gem_shmem.c | ||
i915_gem_shrinker.c | ||
i915_gem_shrinker.h | ||
i915_gem_stolen.c | ||
i915_gem_stolen.h | ||
i915_gem_throttle.c | ||
i915_gem_tiling.c | ||
i915_gem_userptr.c | ||
i915_gem_wait.c | ||
i915_gemfs.c | ||
i915_gemfs.h | ||
Makefile |