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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d6748066ad
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (37 commits) MIPS: O32: Provide definition of registers ta0 .. ta3. MIPS: perf: Add Octeon support for hardware perf. MIPS: perf: Add support for 64-bit perf counters. MIPS: perf: Reorganize contents of perf support files. MIPS: perf: Cleanup formatting in arch/mips/kernel/perf_event.c MIPS: Add accessor macros for 64-bit performance counter registers. MIPS: Add probes for more Octeon II CPUs. MIPS: Add more CPU identifiers for Octeon II CPUs. MIPS: XLR, XLS: Add comment for smp setup MIPS: JZ4740: GPIO: Check correct IRQ in demux handler MIPS: JZ4740: GPIO: Simplify IRQ demuxer MIPS: JZ4740: Use generic irq chip MIPS: Alchemy: remove all CONFIG_SOC_AU1??? defines MIPS: Alchemy: kill au1xxx.h header MIPS: Alchemy: clean DMA code of CONFIG_SOC_AU1??? defines MIPS, IDE: Alchem, au1xxx-ide: Remove pb1200/db1200 header dep MIPS: Alchemy: Redo PCI as platform driver MIPS: Alchemy: more base address cleanup MIPS: Alchemy: rewrite USB platform setup. MIPS: Alchemy: abstract USB block control register access ... Fix up trivial conflicts in: arch/mips/alchemy/devboards/db1x00/platform.c drivers/ide/Kconfig drivers/mmc/host/au1xmmc.c drivers/video/Kconfig sound/mips/Kconfig
267 lines
6.4 KiB
C
267 lines
6.4 KiB
C
/*
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* EHCI HCD (Host Controller Driver) for USB.
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*
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* Bus Glue for AMD Alchemy Au1xxx
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*
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* Based on "ohci-au1xxx.c" by Matt Porter <mporter@kernel.crashing.org>
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*
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* Modified for AMD Alchemy Au1200 EHC
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* by K.Boge <karsten.boge@amd.com>
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*
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* This file is licenced under the GPL.
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*/
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#include <linux/platform_device.h>
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#include <asm/mach-au1x00/au1000.h>
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extern int usb_disabled(void);
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static int au1xxx_ehci_setup(struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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int ret = ehci_init(hcd);
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ehci->need_io_watchdog = 0;
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return ret;
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}
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static const struct hc_driver ehci_au1xxx_hc_driver = {
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.description = hcd_name,
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.product_desc = "Au1xxx EHCI",
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.hcd_priv_size = sizeof(struct ehci_hcd),
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/*
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* generic hardware linkage
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*/
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.irq = ehci_irq,
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.flags = HCD_MEMORY | HCD_USB2,
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/*
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* basic lifecycle operations
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*
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* FIXME -- ehci_init() doesn't do enough here.
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* See ehci-ppc-soc for a complete implementation.
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*/
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.reset = au1xxx_ehci_setup,
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.start = ehci_run,
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.stop = ehci_stop,
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.shutdown = ehci_shutdown,
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/*
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* managing i/o requests and associated device resources
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*/
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.urb_enqueue = ehci_urb_enqueue,
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.urb_dequeue = ehci_urb_dequeue,
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.endpoint_disable = ehci_endpoint_disable,
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.endpoint_reset = ehci_endpoint_reset,
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/*
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* scheduling support
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*/
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.get_frame_number = ehci_get_frame,
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/*
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* root hub support
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*/
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.hub_status_data = ehci_hub_status_data,
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.hub_control = ehci_hub_control,
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.bus_suspend = ehci_bus_suspend,
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.bus_resume = ehci_bus_resume,
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.relinquish_port = ehci_relinquish_port,
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.port_handed_over = ehci_port_handed_over,
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.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
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};
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static int ehci_hcd_au1xxx_drv_probe(struct platform_device *pdev)
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{
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struct usb_hcd *hcd;
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struct ehci_hcd *ehci;
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struct resource *res;
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int ret;
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if (usb_disabled())
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return -ENODEV;
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if (pdev->resource[1].flags != IORESOURCE_IRQ) {
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pr_debug("resource[1] is not IORESOURCE_IRQ");
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return -ENOMEM;
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}
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hcd = usb_create_hcd(&ehci_au1xxx_hc_driver, &pdev->dev, "Au1xxx");
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if (!hcd)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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hcd->rsrc_start = res->start;
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hcd->rsrc_len = resource_size(res);
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if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
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pr_debug("request_mem_region failed");
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ret = -EBUSY;
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goto err1;
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}
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hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
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if (!hcd->regs) {
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pr_debug("ioremap failed");
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ret = -ENOMEM;
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goto err2;
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}
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if (alchemy_usb_control(ALCHEMY_USB_EHCI0, 1)) {
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printk(KERN_INFO "%s: controller init failed!\n", pdev->name);
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ret = -ENODEV;
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goto err3;
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}
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ehci = hcd_to_ehci(hcd);
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ehci->caps = hcd->regs;
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ehci->regs = hcd->regs +
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HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
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/* cache this readonly data; minimize chip reads */
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ehci->hcs_params = readl(&ehci->caps->hcs_params);
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ret = usb_add_hcd(hcd, pdev->resource[1].start,
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IRQF_SHARED);
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if (ret == 0) {
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platform_set_drvdata(pdev, hcd);
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return ret;
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}
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alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
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err3:
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iounmap(hcd->regs);
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err2:
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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err1:
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usb_put_hcd(hcd);
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return ret;
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}
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static int ehci_hcd_au1xxx_drv_remove(struct platform_device *pdev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(pdev);
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usb_remove_hcd(hcd);
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alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
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iounmap(hcd->regs);
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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usb_put_hcd(hcd);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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#ifdef CONFIG_PM
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static int ehci_hcd_au1xxx_drv_suspend(struct device *dev)
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{
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struct usb_hcd *hcd = dev_get_drvdata(dev);
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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unsigned long flags;
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int rc = 0;
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if (time_before(jiffies, ehci->next_statechange))
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msleep(10);
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/* Root hub was already suspended. Disable irq emission and
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* mark HW unaccessible. The PM and USB cores make sure that
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* the root hub is either suspended or stopped.
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*/
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ehci_prepare_ports_for_controller_suspend(ehci, device_may_wakeup(dev));
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spin_lock_irqsave(&ehci->lock, flags);
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ehci_writel(ehci, 0, &ehci->regs->intr_enable);
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(void)ehci_readl(ehci, &ehci->regs->intr_enable);
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clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
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spin_unlock_irqrestore(&ehci->lock, flags);
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// could save FLADJ in case of Vaux power loss
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// ... we'd only use it to handle clock skew
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alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
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return rc;
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}
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static int ehci_hcd_au1xxx_drv_resume(struct device *dev)
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{
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struct usb_hcd *hcd = dev_get_drvdata(dev);
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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alchemy_usb_control(ALCHEMY_USB_EHCI0, 1);
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// maybe restore FLADJ
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if (time_before(jiffies, ehci->next_statechange))
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msleep(100);
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/* Mark hardware accessible again as we are out of D3 state by now */
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set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
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/* If CF is still set, we maintained PCI Vaux power.
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* Just undo the effect of ehci_pci_suspend().
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*/
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if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF) {
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int mask = INTR_MASK;
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ehci_prepare_ports_for_controller_resume(ehci);
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if (!hcd->self.root_hub->do_remote_wakeup)
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mask &= ~STS_PCD;
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ehci_writel(ehci, mask, &ehci->regs->intr_enable);
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ehci_readl(ehci, &ehci->regs->intr_enable);
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return 0;
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}
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ehci_dbg(ehci, "lost power, restarting\n");
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usb_root_hub_lost_power(hcd->self.root_hub);
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/* Else reset, to cope with power loss or flush-to-storage
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* style "resume" having let BIOS kick in during reboot.
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*/
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(void) ehci_halt(ehci);
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(void) ehci_reset(ehci);
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/* emptying the schedule aborts any urbs */
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spin_lock_irq(&ehci->lock);
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if (ehci->reclaim)
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end_unlink_async(ehci);
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ehci_work(ehci);
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spin_unlock_irq(&ehci->lock);
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
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ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
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/* here we "know" root ports should always stay powered */
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ehci_port_power(ehci, 1);
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ehci->rh_state = EHCI_RH_SUSPENDED;
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return 0;
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}
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static const struct dev_pm_ops au1xxx_ehci_pmops = {
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.suspend = ehci_hcd_au1xxx_drv_suspend,
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.resume = ehci_hcd_au1xxx_drv_resume,
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};
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#define AU1XXX_EHCI_PMOPS &au1xxx_ehci_pmops
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#else
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#define AU1XXX_EHCI_PMOPS NULL
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#endif
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static struct platform_driver ehci_hcd_au1xxx_driver = {
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.probe = ehci_hcd_au1xxx_drv_probe,
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.remove = ehci_hcd_au1xxx_drv_remove,
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.shutdown = usb_hcd_platform_shutdown,
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.driver = {
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.name = "au1xxx-ehci",
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.owner = THIS_MODULE,
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.pm = AU1XXX_EHCI_PMOPS,
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}
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};
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MODULE_ALIAS("platform:au1xxx-ehci");
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