mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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41bb38fc53
This change uses the TRIO IOMMU to map the PCI DMA space and physical memory at different addresses. We also now use the dma_mapping_ops to provide support for non-PCI DMA, PCIe DMA (64-bit) and legacy PCI DMA (32-bit). We use the kernel's software I/O TLB framework (i.e. bounce buffers) for the legacy 32-bit PCI device support since there are a limited number of TLB entries in the IOMMU and it is non-trivial to handle indexing, searching, matching, etc. For 32-bit devices the performance impact of bounce buffers should not be a concern. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
145 lines
3.8 KiB
C
145 lines
3.8 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_DMA_MAPPING_H
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#define _ASM_TILE_DMA_MAPPING_H
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#include <linux/mm.h>
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#include <linux/scatterlist.h>
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#include <linux/cache.h>
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#include <linux/io.h>
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extern struct dma_map_ops *tile_dma_map_ops;
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extern struct dma_map_ops *gx_pci_dma_map_ops;
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extern struct dma_map_ops *gx_legacy_pci_dma_map_ops;
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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if (dev && dev->archdata.dma_ops)
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return dev->archdata.dma_ops;
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else
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return tile_dma_map_ops;
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}
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static inline dma_addr_t get_dma_offset(struct device *dev)
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{
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return dev->archdata.dma_offset;
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}
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static inline void set_dma_offset(struct device *dev, dma_addr_t off)
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{
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dev->archdata.dma_offset = off;
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}
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static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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return paddr + get_dma_offset(dev);
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}
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static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
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{
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return daddr - get_dma_offset(dev);
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}
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static inline void dma_mark_clean(void *addr, size_t size) {}
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#include <asm-generic/dma-mapping-common.h>
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static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
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{
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dev->archdata.dma_ops = ops;
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}
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static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
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{
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if (!dev->dma_mask)
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return 0;
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return addr + size - 1 <= *dev->dma_mask;
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}
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static inline int
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dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return get_dma_ops(dev)->mapping_error(dev, dma_addr);
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}
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static inline int
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dma_supported(struct device *dev, u64 mask)
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{
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return get_dma_ops(dev)->dma_supported(dev, mask);
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}
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static inline int
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dma_set_mask(struct device *dev, u64 mask)
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{
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struct dma_map_ops *dma_ops = get_dma_ops(dev);
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/* Handle legacy PCI devices with limited memory addressability. */
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if ((dma_ops == gx_pci_dma_map_ops) && (mask <= DMA_BIT_MASK(32))) {
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set_dma_ops(dev, gx_legacy_pci_dma_map_ops);
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set_dma_offset(dev, 0);
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if (mask > dev->archdata.max_direct_dma_addr)
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mask = dev->archdata.max_direct_dma_addr;
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}
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if (!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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*dev->dma_mask = mask;
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return 0;
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}
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static inline void *dma_alloc_attrs(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *dma_ops = get_dma_ops(dev);
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void *cpu_addr;
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cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs);
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debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
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return cpu_addr;
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}
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static inline void dma_free_attrs(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *dma_ops = get_dma_ops(dev);
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debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
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dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
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}
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#define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
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#define dma_free_coherent(d, s, v, h) dma_free_attrs(d, s, v, h, NULL)
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#define dma_free_noncoherent(d, s, v, h) dma_free_attrs(d, s, v, h, NULL)
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/*
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* dma_alloc_noncoherent() is #defined to return coherent memory,
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* so there's no need to do any flushing here.
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*/
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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}
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#endif /* _ASM_TILE_DMA_MAPPING_H */
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