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ca1eb73207
Allocate CSA for the given sdma ring. Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
86 lines
2.4 KiB
C
86 lines
2.4 KiB
C
/*
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* Copyright 2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <drm/drmP.h>
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#include "amdgpu.h"
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#include "amdgpu_sdma.h"
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#define AMDGPU_CSA_SDMA_SIZE 64
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/* SDMA CSA reside in the 3rd page of CSA */
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#define AMDGPU_CSA_SDMA_OFFSET (4096 * 2)
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/*
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* GPU SDMA IP block helpers function.
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*/
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struct amdgpu_sdma_instance *amdgpu_sdma_get_instance_from_ring(struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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int i;
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for (i = 0; i < adev->sdma.num_instances; i++)
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if (ring == &adev->sdma.instance[i].ring ||
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ring == &adev->sdma.instance[i].page)
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return &adev->sdma.instance[i];
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return NULL;
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}
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int amdgpu_sdma_get_index_from_ring(struct amdgpu_ring *ring, uint32_t *index)
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{
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struct amdgpu_device *adev = ring->adev;
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int i;
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for (i = 0; i < adev->sdma.num_instances; i++) {
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if (ring == &adev->sdma.instance[i].ring ||
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ring == &adev->sdma.instance[i].page) {
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*index = i;
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return 0;
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}
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}
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return -EINVAL;
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}
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uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring,
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unsigned vmid)
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{
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struct amdgpu_device *adev = ring->adev;
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uint64_t csa_mc_addr;
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uint32_t index = 0;
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int r;
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if (vmid == 0 || !amdgpu_mcbp)
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return 0;
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r = amdgpu_sdma_get_index_from_ring(ring, &index);
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if (r || index > 31)
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csa_mc_addr = 0;
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else
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csa_mc_addr = amdgpu_csa_vaddr(adev) +
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AMDGPU_CSA_SDMA_OFFSET +
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index * AMDGPU_CSA_SDMA_SIZE;
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return csa_mc_addr;
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}
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