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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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The DRM subsystem graphics drivers require more granular definition of the connection between display drivers and panels, and a proper panel compatible. This utilizes the bindings merged to the DRM subsystem to properly define the display on the NSPIRE devices. We also do away with the undocumented DT binding "lcd-type". We add both the clocks to the CLCD block so the driver have full control over its clocking. Link: https://lore.kernel.org/r/20190810074230.6492-1-linus.walleij@linaro.org Cc: Daniel Tang <dt.tangr@gmail.com> Cc: Fabian Vogt <fabian@ritter-vogt.de> Tested-by: Fabian Vogt <fabian@ritter-vogt.de> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
126 lines
2.4 KiB
Plaintext
126 lines
2.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/boot/nspire-cx.dts
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*
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* Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
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*/
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/dts-v1/;
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/include/ "nspire.dtsi"
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&lcd {
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port {
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clcd_pads: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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&fast_timer {
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/* compatible = "arm,sp804", "arm,primecell"; */
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};
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&uart {
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compatible = "arm,pl011", "arm,primecell";
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clocks = <&uart_clk>, <&apb_pclk>;
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clock-names = "uart_clk", "apb_pclk";
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};
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&timer0 {
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compatible = "arm,sp804", "arm,primecell";
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};
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&timer1 {
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compatible = "arm,sp804", "arm,primecell";
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};
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&base_clk {
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compatible = "lsi,nspire-cx-clock";
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};
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&ahb_clk {
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compatible = "lsi,nspire-cx-ahb-divider";
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};
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&keypad {
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linux,keymap = <
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0x0000001c 0x0001001c 0x00040039
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0x0005002c 0x00060015 0x0007000b
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0x0008000f 0x0100002d 0x01010011
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0x0102002f 0x01030004 0x01040016
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0x01050014 0x0106001f 0x01070002
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0x010a006a 0x02000013 0x02010010
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0x02020019 0x02030007 0x02040018
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0x02050031 0x02060032 0x02070005
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0x02080028 0x0209006c 0x03000026
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0x03010025 0x03020024 0x0303000a
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0x03040017 0x03050023 0x03060022
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0x03070008 0x03080035 0x03090069
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0x04000021 0x04010012 0x04020020
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0x0404002e 0x04050030 0x0406001e
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0x0407000d 0x04080037 0x04090067
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0x05010038 0x0502000c 0x0503001b
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0x05040034 0x0505001a 0x05060006
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0x05080027 0x0509000e 0x050a006f
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0x0600002b 0x0602004e 0x06030068
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0x06040003 0x0605006d 0x06060009
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0x06070001 0x0609000f 0x0708002a
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0x0709001d 0x070a0033 >;
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};
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&vbus_reg {
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gpio = <&gpio 2 0>;
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};
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/ {
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model = "TI-NSPIRE CX";
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compatible = "ti,nspire-cx";
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memory {
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device_type = "memory";
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reg = <0x10000000 0x4000000>; /* 64 MB */
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};
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uart_clk: uart_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <12000000>;
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};
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ahb {
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#address-cells = <1>;
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#size-cells = <1>;
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intc: interrupt-controller@DC000000 {
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compatible = "arm,pl190-vic";
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interrupt-controller;
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reg = <0xDC000000 0x1000>;
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#interrupt-cells = <1>;
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};
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apb@90000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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i2c@90050000 {
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compatible = "snps,designware-i2c";
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reg = <0x90050000 0x1000>;
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interrupts = <20>;
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};
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};
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};
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panel {
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compatible = "ti,nspire-cx-lcd-panel";
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port {
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panel_in: endpoint {
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remote-endpoint = <&clcd_pads>;
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};
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};
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};
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chosen {
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bootargs = "debug earlyprintk console=tty0 console=ttyAMA0,115200n8 root=/dev/ram0";
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};
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};
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