mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 18:26:47 +07:00
5cbb80d523
Since commitbcf3440c6d("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") the networking is broken on the imx7d-zii-rmu2 board. The end result is that network receive behaviour is marginal with lots of RX CRC errors experienced and NFS frequently failing. Quoting the explanation from Andrew Lunn in commit0672d22a19("ARM: dts: imx: Fix the AR803X phy-mode"): "The problem here is, all the DTs were broken since day 0. However, because the PHY driver was also broken, nobody noticed and it worked. Now that the PHY driver has been fixed, all the bugs in the DTs now become an issue" Fix it by switching to phy-mode = "rgmii-id". Fixes:bcf3440c6d("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
358 lines
7.3 KiB
Plaintext
358 lines
7.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Device tree file for ZII's RMU2 board
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*
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* RMU - Remote Modem Unit
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*
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* Copyright (C) 2019 Zodiac Inflight Innovations
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*/
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/dts-v1/;
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#include <dt-bindings/thermal/thermal.h>
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#include "imx7d.dtsi"
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/ {
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model = "ZII RMU2 Board";
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compatible = "zii,imx7d-rmu2", "fsl,imx7d";
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chosen {
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stdout-path = &uart2;
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&pinctrl_leds_debug>;
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pinctrl-names = "default";
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debug {
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label = "zii:green:debug1";
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gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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};
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&cpu0 {
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cpu-supply = <&sw1a_reg>;
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <20000000>;
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1>;
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assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
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<&clks IMX7D_ENET1_TIME_ROOT_CLK>;
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assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
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assigned-clock-rates = <0>, <100000000>;
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phy-mode = "rgmii-id";
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phy-handle = <&fec1_phy>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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fec1_phy: ethernet-phy@0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1_phy_reset>,
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<&pinctrl_enet1_phy_interrupt>;
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reg = <0>;
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interrupt-parent = <&gpio1>;
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pmic@8 {
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compatible = "fsl,pfuze3000";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1a {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1b {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1475000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3a_reg: sw3 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1650000>;
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regulator-boot-on;
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regulator-always-on;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vldo1 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen2_reg: vldo2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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regulator-always-on;
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};
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vgen3_reg: vccsd {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen4_reg: v33 {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen5_reg: vldo3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vldo4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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eeprom@50 {
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compatible = "atmel,24c04";
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reg = <0x50>;
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};
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eeprom@52 {
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compatible = "atmel,24c04";
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reg = <0x52>;
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};
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};
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&snvs_rtc {
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status = "disabled";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
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assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
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assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
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status = "okay";
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rave-sp {
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compatible = "zii,rave-sp-rdu2";
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current-speed = <1000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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watchdog {
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compatible = "zii,rave-sp-watchdog";
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};
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eeprom@a3 {
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compatible = "zii,rave-sp-eeprom";
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reg = <0xa3 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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zii,eeprom-name = "main-eeprom";
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};
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};
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};
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&usbotg2 {
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dr_mode = "host";
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disable-over-current;
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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bus-width = <4>;
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no-1-8-v;
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no-sdio;
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keep-power-in-suspend;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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bus-width = <8>;
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no-1-8-v;
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non-removable;
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no-sdio;
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no-sd;
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keep-power-in-suspend;
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status = "okay";
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};
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&wdog1 {
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status = "disabled";
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};
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&iomuxc {
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x2
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MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x2
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MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x2
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MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x59
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>;
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};
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pinctrl_enet1: enet1grp {
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fsl,pins = <
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MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3
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MX7D_PAD_SD2_WP__ENET1_MDC 0x3
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MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
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MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
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MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
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MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
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MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
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MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
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MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
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MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
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MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
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MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
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MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
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MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
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>;
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};
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pinctrl_enet1_phy_reset: enet1phyresetgrp {
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fsl,pins = <
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MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
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MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
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>;
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};
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pinctrl_leds_debug: ledsgrp {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x59
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX 0x79
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MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX 0x79
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>;
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};
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pinctrl_uart4: uart4grp {
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fsl,pins = <
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MX7D_PAD_SD2_DATA0__UART4_DCE_RX 0x79
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MX7D_PAD_SD2_DATA1__UART4_DCE_TX 0x79
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX7D_PAD_SD1_CMD__SD1_CMD 0x59
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MX7D_PAD_SD1_CLK__SD1_CLK 0x19
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MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
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MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
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MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
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MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x59
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MX7D_PAD_SD3_CLK__SD3_CLK 0x19
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
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MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x59
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>;
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};
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};
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&iomuxc_lpsr {
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pinctrl_enet1_phy_interrupt: enet1phyinterruptgrp {
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fsl,phy = <
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MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x08
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>;
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};
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};
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