mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 18:46:45 +07:00
13efd80aca
Add nodes for GPU (Mali 400) to Exynos4210 and Exynos4412. Describe the GPU as much as possible however still few elements are missing: 1. Exynos4210 bus clock is not described in hardware manual therefore the IP gate clock was provided, 2. Exynos4412: Not sure what to do with CLK_G3D clock responsible for gating entire IP block (it is now being disabled as unused), 3. Regulator supplies on Trats board. Limited testing on Odroid U3 (Exynos4412). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
48 lines
959 B
Plaintext
48 lines
959 B
Plaintext
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Samsung's Exynos4412 Prime SoC device tree source
|
|
*
|
|
* Copyright (c) 2016 Samsung Electronics Co., Ltd.
|
|
* http://www.samsung.com
|
|
*/
|
|
|
|
/*
|
|
* Exynos4412 Prime SoC revision supports higher CPU frequencies than
|
|
* non-Prime version. Therefore we need to update OPPs table and
|
|
* thermal maps accordingly.
|
|
*/
|
|
|
|
&cpu0_opp_1500 {
|
|
/delete-property/turbo-mode;
|
|
};
|
|
|
|
&cpu0_opp_table {
|
|
opp-1600000000 {
|
|
opp-hz = /bits/ 64 <1600000000>;
|
|
opp-microvolt = <1350000>;
|
|
clock-latency-ns = <200000>;
|
|
};
|
|
opp-1704000000 {
|
|
opp-hz = /bits/ 64 <1704000000>;
|
|
opp-microvolt = <1350000>;
|
|
clock-latency-ns = <200000>;
|
|
};
|
|
};
|
|
|
|
&cooling_map0 {
|
|
cooling-device = <&cpu0 9 9>, <&cpu1 9 9>,
|
|
<&cpu2 9 9>, <&cpu3 9 9>;
|
|
};
|
|
|
|
&cooling_map1 {
|
|
cooling-device = <&cpu0 15 15>, <&cpu1 15 15>,
|
|
<&cpu2 15 15>, <&cpu3 15 15>;
|
|
};
|
|
|
|
&gpu_opp_table {
|
|
opp-533000000 {
|
|
opp-hz = /bits/ 64 <533000000>;
|
|
opp-microvolt = <1075000>;
|
|
};
|
|
};
|