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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 07:46:53 +07:00
fa18f477d0
Timer overrides are normally disabled on Nvidia board because they are commonly wrong, except on new ones with HPET support. Unfortunately there are quite some Asus boards around that don't have HPET, but need a timer override. We don't know yet how to handle this transparently, but at least add a command line option to force the timer override and let them boot. Cc: len.brown@intel.com Signed-off-by: Andi Kleen <ak@suse.de>
87 lines
2.1 KiB
C
87 lines
2.1 KiB
C
/*
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* Do early PCI probing for bug detection when the main PCI subsystem is
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* not up yet.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <asm/pci-direct.h>
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#include <asm/acpi.h>
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#include <asm/apic.h>
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#ifdef CONFIG_ACPI
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static int nvidia_hpet_detected __initdata;
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static int __init nvidia_hpet_check(unsigned long phys, unsigned long size)
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{
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nvidia_hpet_detected = 1;
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return 0;
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}
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#endif
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static int __init check_bridge(int vendor, int device)
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{
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#ifdef CONFIG_ACPI
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/* According to Nvidia all timer overrides are bogus unless HPET
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is enabled. */
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if (!acpi_use_timer_override && vendor == PCI_VENDOR_ID_NVIDIA) {
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nvidia_hpet_detected = 0;
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acpi_table_parse(ACPI_HPET, nvidia_hpet_check);
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if (nvidia_hpet_detected == 0) {
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acpi_skip_timer_override = 1;
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printk(KERN_INFO "Nvidia board "
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"detected. Ignoring ACPI "
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"timer override.\n");
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printk(KERN_INFO "If you got timer trouble "
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"try acpi_use_timer_override\n");
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}
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}
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#endif
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if (vendor == PCI_VENDOR_ID_ATI && timer_over_8254 == 1) {
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timer_over_8254 = 0;
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printk(KERN_INFO "ATI board detected. Disabling timer routing "
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"over 8254.\n");
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}
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return 0;
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}
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void __init check_acpi_pci(void)
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{
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int num, slot, func;
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/* Assume the machine supports type 1. If not it will
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always read ffffffff and should not have any side effect.
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Actually a few buggy systems can machine check. Allow the user
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to disable it by command line option at least -AK */
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if (!early_pci_allowed())
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return;
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/* Poor man's PCI discovery */
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for (num = 0; num < 32; num++) {
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for (slot = 0; slot < 32; slot++) {
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for (func = 0; func < 8; func++) {
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u32 class;
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u32 vendor;
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class = read_pci_config(num, slot, func,
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PCI_CLASS_REVISION);
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if (class == 0xffffffff)
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break;
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if ((class >> 16) != PCI_CLASS_BRIDGE_PCI)
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continue;
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vendor = read_pci_config(num, slot, func,
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PCI_VENDOR_ID);
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if (check_bridge(vendor & 0xffff, vendor >> 16))
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return;
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}
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}
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}
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}
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