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5f307be18b
Provide a generic tlb_flush() implementation that relies on flush_tlb_range(). This is a little awkward because flush_tlb_range() assumes a VMA for range invalidation, but we no longer have one. Audit of all flush_tlb_range() implementations shows only vma->vm_mm and vma->vm_flags are used, and of the latter only VM_EXEC (I-TLB invalidates) and VM_HUGETLB (large TLB invalidate) are used. Therefore, track VM_EXEC and VM_HUGETLB in two more bits, and create a 'fake' VMA. This allows architectures that have a reasonably efficient flush_tlb_range() to not require any additional effort. No change in behavior intended. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Nick Piggin <npiggin@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org>
98 lines
2.5 KiB
C
98 lines
2.5 KiB
C
/*
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* TLB shootdown specifics for powerpc
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*
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* Copyright (C) 2002 Anton Blanchard, IBM Corp.
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* Copyright (C) 2002 Paul Mackerras, IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_POWERPC_TLB_H
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#define _ASM_POWERPC_TLB_H
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#ifdef __KERNEL__
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#ifndef __powerpc64__
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#include <asm/pgtable.h>
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#endif
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#include <asm/pgalloc.h>
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#ifndef __powerpc64__
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#include <asm/page.h>
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#include <asm/mmu.h>
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#endif
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#include <linux/pagemap.h>
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#define tlb_start_vma(tlb, vma) do { } while (0)
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#define tlb_end_vma(tlb, vma) do { } while (0)
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#define __tlb_remove_tlb_entry __tlb_remove_tlb_entry
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#define tlb_flush tlb_flush
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extern void tlb_flush(struct mmu_gather *tlb);
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/* Get the generic bits... */
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#include <asm-generic/tlb.h>
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extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
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unsigned long address);
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static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
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unsigned long address)
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{
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#ifdef CONFIG_PPC_BOOK3S_32
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if (pte_val(*ptep) & _PAGE_HASHPTE)
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flush_hash_entry(tlb->mm, ptep, address);
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#endif
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}
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#ifdef CONFIG_SMP
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static inline int mm_is_core_local(struct mm_struct *mm)
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{
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return cpumask_subset(mm_cpumask(mm),
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topology_sibling_cpumask(smp_processor_id()));
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}
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#ifdef CONFIG_PPC_BOOK3S_64
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static inline int mm_is_thread_local(struct mm_struct *mm)
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{
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if (atomic_read(&mm->context.active_cpus) > 1)
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return false;
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return cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm));
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}
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static inline void mm_reset_thread_local(struct mm_struct *mm)
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{
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WARN_ON(atomic_read(&mm->context.copros) > 0);
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/*
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* It's possible for mm_access to take a reference on mm_users to
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* access the remote mm from another thread, but it's not allowed
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* to set mm_cpumask, so mm_users may be > 1 here.
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*/
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WARN_ON(current->mm != mm);
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atomic_set(&mm->context.active_cpus, 1);
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cpumask_clear(mm_cpumask(mm));
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
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}
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#else /* CONFIG_PPC_BOOK3S_64 */
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static inline int mm_is_thread_local(struct mm_struct *mm)
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{
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return cpumask_equal(mm_cpumask(mm),
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cpumask_of(smp_processor_id()));
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}
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#endif /* !CONFIG_PPC_BOOK3S_64 */
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#else /* CONFIG_SMP */
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static inline int mm_is_core_local(struct mm_struct *mm)
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{
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return 1;
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}
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static inline int mm_is_thread_local(struct mm_struct *mm)
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{
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return 1;
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}
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_POWERPC_TLB_H */
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