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5080332c2c
POWER9 DD2.1 and earlier has an issue where some cache inhibited vector load will return bad data. The workaround is two part, one firmware/microcode part triggers HMI interrupts when hitting such loads, the other part is this patch which then emulates the instructions in Linux. The affected instructions are limited to lxvd2x, lxvw4x, lxvb16x and lxvh8x. When an instruction triggers the HMI, all threads in the core will be sent to the HMI handler, not just the one running the vector load. In general, these spurious HMIs are detected by the emulation code and we just return back to the running process. Unfortunately, if a spurious interrupt occurs on a vector load that's to normal memory we have no way to detect that it's spurious (unless we walk the page tables, which is very expensive). In this case we emulate the load but we need do so using a vector load itself to ensure 128bit atomicity is preserved. Some additional debugfs emulated instruction counters are added also. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [mpe: Switch CONFIG_PPC_BOOK3S_64 to CONFIG_VSX to unbreak the build] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
97 lines
2.6 KiB
C
97 lines
2.6 KiB
C
/*
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* Copyright 2007 Sony Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _ASM_POWERPC_EMULATED_OPS_H
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#define _ASM_POWERPC_EMULATED_OPS_H
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#include <linux/atomic.h>
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#include <linux/perf_event.h>
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#ifdef CONFIG_PPC_EMULATED_STATS
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struct ppc_emulated_entry {
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const char *name;
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atomic_t val;
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};
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extern struct ppc_emulated {
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#ifdef CONFIG_ALTIVEC
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struct ppc_emulated_entry altivec;
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#endif
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struct ppc_emulated_entry dcba;
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struct ppc_emulated_entry dcbz;
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struct ppc_emulated_entry fp_pair;
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struct ppc_emulated_entry isel;
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struct ppc_emulated_entry mcrxr;
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struct ppc_emulated_entry mfpvr;
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struct ppc_emulated_entry multiple;
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struct ppc_emulated_entry popcntb;
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struct ppc_emulated_entry spe;
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struct ppc_emulated_entry string;
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struct ppc_emulated_entry sync;
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struct ppc_emulated_entry unaligned;
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#ifdef CONFIG_MATH_EMULATION
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struct ppc_emulated_entry math;
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#endif
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#ifdef CONFIG_VSX
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struct ppc_emulated_entry vsx;
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#endif
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#ifdef CONFIG_PPC64
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struct ppc_emulated_entry mfdscr;
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struct ppc_emulated_entry mtdscr;
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struct ppc_emulated_entry lq_stq;
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struct ppc_emulated_entry lxvw4x;
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struct ppc_emulated_entry lxvh8x;
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struct ppc_emulated_entry lxvd2x;
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struct ppc_emulated_entry lxvb16x;
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#endif
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} ppc_emulated;
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extern u32 ppc_warn_emulated;
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extern void ppc_warn_emulated_print(const char *type);
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#define __PPC_WARN_EMULATED(type) \
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do { \
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atomic_inc(&ppc_emulated.type.val); \
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if (ppc_warn_emulated) \
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ppc_warn_emulated_print(ppc_emulated.type.name); \
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} while (0)
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#else /* !CONFIG_PPC_EMULATED_STATS */
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#define __PPC_WARN_EMULATED(type) do { } while (0)
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#endif /* !CONFIG_PPC_EMULATED_STATS */
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#define PPC_WARN_EMULATED(type, regs) \
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do { \
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, \
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1, regs, 0); \
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__PPC_WARN_EMULATED(type); \
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} while (0)
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#define PPC_WARN_ALIGNMENT(type, regs) \
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do { \
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, \
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1, regs, regs->dar); \
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__PPC_WARN_EMULATED(type); \
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} while (0)
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#endif /* _ASM_POWERPC_EMULATED_OPS_H */
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