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7034228792
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
66 lines
2.1 KiB
C
66 lines
2.1 KiB
C
/*
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* Definitions for timer registers
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*
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* Copyright 2004 Philip Rischel <rischelp@idt.com>
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* Copyright 2008 Florian Fainelli <florian@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#ifndef __ASM_RC32434_TIMER_H
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#define __ASM_RC32434_TIMER_H
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#include <asm/mach-rc32434/rb.h>
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#define TIMER0_BASE_ADDR 0x18028000
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#define TIMER_COUNT 3
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struct timer_counter {
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u32 count;
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u32 compare;
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u32 ctc; /*use CTC_ */
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};
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struct timer {
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struct timer_counter tim[TIMER_COUNT];
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u32 rcount; /* use RCOUNT_ */
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u32 rcompare; /* use RCOMPARE_ */
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u32 rtc; /* use RTC_ */
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};
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#define RC32434_CTC_EN_BIT 0
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#define RC32434_CTC_TO_BIT 1
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/* Real time clock registers */
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#define RC32434_RTC_MSK(x) BIT_TO_MASK(x)
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#define RC32434_RTC_CE_BIT 0
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#define RC32434_RTC_TO_BIT 1
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#define RC32434_RTC_RQE_BIT 2
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/* Counter registers */
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#define RC32434_RCOUNT_BIT 0
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#define RC32434_RCOUNT_MSK 0x0000ffff
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#define RC32434_RCOMP_BIT 0
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#define RC32434_RCOMP_MSK 0x0000ffff
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#endif /* __ASM_RC32434_TIMER_H */
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