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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8953aab1e8
ARM previously stored the msi_controller pointer in its sysdata, struct pci_sys_data, and implemented pcibios_msi_controller() to retrieve it. That made PCI host controller drivers specific to ARM because they had to put the msi_controller pointer in the ARM-specific pci_sys_data. There is now a generic mechanism, pci_scan_root_bus_msi(), for giving the msi_controller pointer to the PCI core. Use this for all ARM systems and for the DesignWare and Xilinx PCI host controller drivers. This removes an ARM dependency from the DesignWare, DRA7xx, EXYNOS, i.MX6, Keystone, Layerscape, SPEAr13xx, and Xilinx drivers. [bhelgaas: changelog, split into separate patch] Suggested-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> CC: Pratyush Anand <pratyush.anand@gmail.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Simon Horman <horms@verge.net.au> CC: Russell King <linux@arm.linux.org.uk> CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> CC: Thierry Reding <thierry.reding@gmail.com> CC: Michal Simek <michal.simek@xilinx.com> CC: Marc Zyngier <marc.zyngier@arm.com>
104 lines
2.7 KiB
C
104 lines
2.7 KiB
C
/*
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* arch/arm/include/asm/mach/pci.h
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*
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* Copyright (C) 2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_MACH_PCI_H
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#define __ASM_MACH_PCI_H
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#include <linux/ioport.h>
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struct pci_sys_data;
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struct pci_ops;
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struct pci_bus;
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struct device;
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struct hw_pci {
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struct msi_controller *msi_ctrl;
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struct pci_ops *ops;
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int nr_controllers;
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void **private_data;
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int (*setup)(int nr, struct pci_sys_data *);
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struct pci_bus *(*scan)(int nr, struct pci_sys_data *);
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void (*preinit)(void);
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void (*postinit)(void);
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u8 (*swizzle)(struct pci_dev *dev, u8 *pin);
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int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
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resource_size_t (*align_resource)(struct pci_dev *dev,
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const struct resource *res,
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resource_size_t start,
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resource_size_t size,
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resource_size_t align);
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};
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/*
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* Per-controller structure
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*/
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struct pci_sys_data {
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#ifdef CONFIG_PCI_MSI
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struct msi_controller *msi_ctrl;
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#endif
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struct list_head node;
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int busnr; /* primary bus number */
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u64 mem_offset; /* bus->cpu memory mapping offset */
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unsigned long io_offset; /* bus->cpu IO mapping offset */
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struct pci_bus *bus; /* PCI bus */
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struct list_head resources; /* root bus resources (apertures) */
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struct resource io_res;
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char io_res_name[12];
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/* Bridge swizzling */
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u8 (*swizzle)(struct pci_dev *, u8 *);
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/* IRQ mapping */
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int (*map_irq)(const struct pci_dev *, u8, u8);
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/* Resource alignement requirements */
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resource_size_t (*align_resource)(struct pci_dev *dev,
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const struct resource *res,
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resource_size_t start,
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resource_size_t size,
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resource_size_t align);
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void *private_data; /* platform controller private data */
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};
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/*
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* Call this with your hw_pci struct to initialise the PCI system.
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*/
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void pci_common_init_dev(struct device *, struct hw_pci *);
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/*
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* Compatibility wrapper for older platforms that do not care about
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* passing the parent device.
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*/
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static inline void pci_common_init(struct hw_pci *hw)
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{
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pci_common_init_dev(NULL, hw);
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}
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/*
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* Setup early fixed I/O mapping.
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*/
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#if defined(CONFIG_PCI)
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extern void pci_map_io_early(unsigned long pfn);
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#else
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static inline void pci_map_io_early(unsigned long pfn) {}
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#endif
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/*
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* PCI controllers
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*/
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extern struct pci_ops iop3xx_ops;
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extern int iop3xx_pci_setup(int nr, struct pci_sys_data *);
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extern void iop3xx_pci_preinit(void);
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extern void iop3xx_pci_preinit_cond(void);
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extern struct pci_ops dc21285_ops;
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extern int dc21285_setup(int nr, struct pci_sys_data *);
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extern void dc21285_preinit(void);
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extern void dc21285_postinit(void);
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#endif /* __ASM_MACH_PCI_H */
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