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9c719d87e9
Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Andrei Pistirica <andrei.pistirica@microchip.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13267/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
30 lines
984 B
Plaintext
30 lines
984 B
Plaintext
* Microchip Universal Asynchronous Receiver Transmitter (UART)
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Required properties:
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- compatible: Should be "microchip,pic32mzda-uart"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt
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- clocks: Phandle to the clock.
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See: Documentation/devicetree/bindings/clock/clock-bindings.txt
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- pinctrl-names: A pinctrl state names "default" must be defined.
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- pinctrl-0: Phandle referencing pin configuration of the UART peripheral.
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See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt
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Optional properties:
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- cts-gpios: CTS pin for UART
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Example:
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uart1: serial@1f822000 {
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compatible = "microchip,pic32mzda-uart";
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reg = <0x1f822000 0x50>;
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interrupts = <112 IRQ_TYPE_LEVEL_HIGH>,
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<113 IRQ_TYPE_LEVEL_HIGH>,
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<114 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rootclk PB2CLK>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1
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&pinctrl_uart1_cts
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&pinctrl_uart1_rts>;
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cts-gpios = <&gpio1 15 0>;
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};
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