Nathan Lynch e4a9288942 ARM: zynq: reserve space for jump target in secondary trampoline ... Add a zero argument to the .word directive in zynq_secondary_trampoline. Without an expression the assembler emits nothing for the .word directive. This makes it so that the intended range is communicated to ioremap and outer_flush_range in zynq_cpun_start; e.g. for LE trampoline_code_size evaluates to 12 now instead of 8. Found by inspection. I'm not aware of any real problem this fixes. Tested by doing on online/offline loop on ZC702. Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>		2015-07-31 10:24:41 +02:00
..
common.c	ARM: zynq: Set bit 22 in PL310 AuxCtrl register (6395/1)	2015-07-22 09:37:58 +02:00
common.h	ARM: SoC: platform support for v4.2	2015-06-26 11:34:35 -07:00
headsmp.S	ARM: zynq: reserve space for jump target in secondary trampoline	2015-07-31 10:24:41 +02:00
Kconfig	ARM: zynq: Enable pinctrl	2015-01-12 08:29:17 +01:00
Makefile	ARM: zynq: Actually remove hotplug.c	2014-10-20 20:53:26 +02:00
Makefile.boot	ARM: 7022/1: allow to detect conflicting zreladdrs	2011-10-17 09:12:40 +01:00
platsmp.c	ARM: v7 setup function should invalidate L1 cache	2015-06-01 11:30:26 +01:00
pm.c	ARM: zynq: PM: Fixed simple typo.	2015-01-29 15:38:09 +01:00
slcr.c	ARM: zynq: Drop use of slcr_unlock in zynq_slcr_system_restart	2015-05-18 14:46:37 +02:00