mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 10:06:42 +07:00
fa6b7fe992
Add a new capability, KVM_CAP_S390_CSS_SUPPORT, which will pass intercepts for channel I/O instructions to userspace. Only I/O instructions interacting with I/O interrupts need to be handled in-kernel: - TEST PENDING INTERRUPTION (tpi) dequeues and stores pending interrupts entirely in-kernel. - TEST SUBCHANNEL (tsch) dequeues pending interrupts in-kernel and exits via KVM_EXIT_S390_TSCH to userspace for subchannel- related processing. Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
641 lines
16 KiB
C
641 lines
16 KiB
C
/*
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* handling privileged instructions
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*
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* Copyright IBM Corp. 2008
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License (version 2 only)
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* as published by the Free Software Foundation.
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*
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* Author(s): Carsten Otte <cotte@de.ibm.com>
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* Christian Borntraeger <borntraeger@de.ibm.com>
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*/
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#include <linux/kvm.h>
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#include <linux/gfp.h>
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#include <linux/errno.h>
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#include <asm/current.h>
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#include <asm/debug.h>
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#include <asm/ebcdic.h>
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#include <asm/sysinfo.h>
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#include <asm/ptrace.h>
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#include <asm/compat.h>
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#include "gaccess.h"
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#include "kvm-s390.h"
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#include "trace.h"
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static int handle_set_prefix(struct kvm_vcpu *vcpu)
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{
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u64 operand2;
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u32 address = 0;
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u8 tmp;
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vcpu->stat.instruction_spx++;
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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/* must be word boundary */
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if (operand2 & 3) {
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kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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goto out;
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}
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/* get the value */
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if (get_guest_u32(vcpu, operand2, &address)) {
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kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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goto out;
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}
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address = address & 0x7fffe000u;
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/* make sure that the new value is valid memory */
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if (copy_from_guest_absolute(vcpu, &tmp, address, 1) ||
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(copy_from_guest_absolute(vcpu, &tmp, address + PAGE_SIZE, 1))) {
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kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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goto out;
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}
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kvm_s390_set_prefix(vcpu, address);
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VCPU_EVENT(vcpu, 5, "setting prefix to %x", address);
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trace_kvm_s390_handle_prefix(vcpu, 1, address);
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out:
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return 0;
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}
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static int handle_store_prefix(struct kvm_vcpu *vcpu)
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{
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u64 operand2;
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u32 address;
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vcpu->stat.instruction_stpx++;
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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/* must be word boundary */
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if (operand2 & 3) {
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kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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goto out;
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}
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address = vcpu->arch.sie_block->prefix;
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address = address & 0x7fffe000u;
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/* get the value */
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if (put_guest_u32(vcpu, operand2, address)) {
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kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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goto out;
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}
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VCPU_EVENT(vcpu, 5, "storing prefix to %x", address);
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trace_kvm_s390_handle_prefix(vcpu, 0, address);
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out:
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return 0;
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}
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static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
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{
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u64 useraddr;
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int rc;
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vcpu->stat.instruction_stap++;
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useraddr = kvm_s390_get_base_disp_s(vcpu);
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if (useraddr & 1) {
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kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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goto out;
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}
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rc = put_guest_u16(vcpu, useraddr, vcpu->vcpu_id);
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if (rc == -EFAULT) {
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kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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goto out;
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}
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VCPU_EVENT(vcpu, 5, "storing cpu address to %llx", useraddr);
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trace_kvm_s390_handle_stap(vcpu, useraddr);
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out:
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return 0;
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}
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static int handle_skey(struct kvm_vcpu *vcpu)
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{
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vcpu->stat.instruction_storage_key++;
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vcpu->arch.sie_block->gpsw.addr -= 4;
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VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
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return 0;
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}
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static int handle_tpi(struct kvm_vcpu *vcpu)
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{
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u64 addr;
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struct kvm_s390_interrupt_info *inti;
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int cc;
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addr = kvm_s390_get_base_disp_s(vcpu);
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inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->run->s.regs.crs[6], 0);
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if (inti) {
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if (addr) {
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/*
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* Store the two-word I/O interruption code into the
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* provided area.
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*/
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put_guest_u16(vcpu, addr, inti->io.subchannel_id);
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put_guest_u16(vcpu, addr + 2, inti->io.subchannel_nr);
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put_guest_u32(vcpu, addr + 4, inti->io.io_int_parm);
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} else {
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/*
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* Store the three-word I/O interruption code into
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* the appropriate lowcore area.
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*/
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put_guest_u16(vcpu, 184, inti->io.subchannel_id);
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put_guest_u16(vcpu, 186, inti->io.subchannel_nr);
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put_guest_u32(vcpu, 188, inti->io.io_int_parm);
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put_guest_u32(vcpu, 192, inti->io.io_int_word);
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}
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cc = 1;
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} else
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cc = 0;
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kfree(inti);
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/* Set condition code and we're done. */
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vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44);
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vcpu->arch.sie_block->gpsw.mask |= (cc & 3ul) << 44;
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return 0;
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}
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static int handle_tsch(struct kvm_vcpu *vcpu)
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{
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struct kvm_s390_interrupt_info *inti;
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inti = kvm_s390_get_io_int(vcpu->kvm, 0,
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vcpu->run->s.regs.gprs[1]);
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/*
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* Prepare exit to userspace.
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* We indicate whether we dequeued a pending I/O interrupt
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* so that userspace can re-inject it if the instruction gets
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* a program check. While this may re-order the pending I/O
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* interrupts, this is no problem since the priority is kept
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* intact.
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*/
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vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
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vcpu->run->s390_tsch.dequeued = !!inti;
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if (inti) {
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vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
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vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
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vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
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vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
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}
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vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
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kfree(inti);
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return -EREMOTE;
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}
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static int handle_io_inst(struct kvm_vcpu *vcpu)
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{
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VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
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if (vcpu->kvm->arch.css_support) {
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/*
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* Most I/O instructions will be handled by userspace.
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* Exceptions are tpi and the interrupt portion of tsch.
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*/
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if (vcpu->arch.sie_block->ipa == 0xb236)
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return handle_tpi(vcpu);
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if (vcpu->arch.sie_block->ipa == 0xb235)
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return handle_tsch(vcpu);
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/* Handle in userspace. */
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return -EOPNOTSUPP;
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} else {
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/*
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* Set condition code 3 to stop the guest from issueing channel
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* I/O instructions.
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*/
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vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44);
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vcpu->arch.sie_block->gpsw.mask |= (3 & 3ul) << 44;
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return 0;
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}
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}
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static int handle_stfl(struct kvm_vcpu *vcpu)
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{
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unsigned int facility_list;
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int rc;
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vcpu->stat.instruction_stfl++;
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/* only pass the facility bits, which we can handle */
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facility_list = S390_lowcore.stfl_fac_list & 0xff00fff3;
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rc = copy_to_guest(vcpu, offsetof(struct _lowcore, stfl_fac_list),
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&facility_list, sizeof(facility_list));
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if (rc == -EFAULT)
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kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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else {
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VCPU_EVENT(vcpu, 5, "store facility list value %x",
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facility_list);
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trace_kvm_s390_handle_stfl(vcpu, facility_list);
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}
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return 0;
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}
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static void handle_new_psw(struct kvm_vcpu *vcpu)
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{
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/* Check whether the new psw is enabled for machine checks. */
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_MCHECK)
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kvm_s390_deliver_pending_machine_checks(vcpu);
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}
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#define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
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#define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
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#define PSW_ADDR_24 0x00000000000fffffUL
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#define PSW_ADDR_31 0x000000007fffffffUL
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int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
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{
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u64 addr;
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psw_compat_t new_psw;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu,
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PGM_PRIVILEGED_OPERATION);
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addr = kvm_s390_get_base_disp_s(vcpu);
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if (addr & 7) {
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kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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goto out;
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}
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if (copy_from_guest(vcpu, &new_psw, addr, sizeof(new_psw))) {
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kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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goto out;
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}
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if (!(new_psw.mask & PSW32_MASK_BASE)) {
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kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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goto out;
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}
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vcpu->arch.sie_block->gpsw.mask =
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(new_psw.mask & ~PSW32_MASK_BASE) << 32;
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vcpu->arch.sie_block->gpsw.addr = new_psw.addr;
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if ((vcpu->arch.sie_block->gpsw.mask & PSW_MASK_UNASSIGNED) ||
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(!(vcpu->arch.sie_block->gpsw.mask & PSW_MASK_ADDR_MODE) &&
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(vcpu->arch.sie_block->gpsw.addr & ~PSW_ADDR_24)) ||
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((vcpu->arch.sie_block->gpsw.mask & PSW_MASK_ADDR_MODE) ==
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PSW_MASK_EA)) {
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kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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goto out;
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}
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handle_new_psw(vcpu);
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out:
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return 0;
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}
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static int handle_lpswe(struct kvm_vcpu *vcpu)
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{
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u64 addr;
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psw_t new_psw;
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addr = kvm_s390_get_base_disp_s(vcpu);
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if (addr & 7) {
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kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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goto out;
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}
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if (copy_from_guest(vcpu, &new_psw, addr, sizeof(new_psw))) {
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kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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goto out;
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}
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vcpu->arch.sie_block->gpsw.mask = new_psw.mask;
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vcpu->arch.sie_block->gpsw.addr = new_psw.addr;
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if ((vcpu->arch.sie_block->gpsw.mask & PSW_MASK_UNASSIGNED) ||
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(((vcpu->arch.sie_block->gpsw.mask & PSW_MASK_ADDR_MODE) ==
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PSW_MASK_BA) &&
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(vcpu->arch.sie_block->gpsw.addr & ~PSW_ADDR_31)) ||
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(!(vcpu->arch.sie_block->gpsw.mask & PSW_MASK_ADDR_MODE) &&
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(vcpu->arch.sie_block->gpsw.addr & ~PSW_ADDR_24)) ||
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((vcpu->arch.sie_block->gpsw.mask & PSW_MASK_ADDR_MODE) ==
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PSW_MASK_EA)) {
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kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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goto out;
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}
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handle_new_psw(vcpu);
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out:
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return 0;
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}
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static int handle_stidp(struct kvm_vcpu *vcpu)
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{
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u64 operand2;
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int rc;
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vcpu->stat.instruction_stidp++;
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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if (operand2 & 7) {
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kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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goto out;
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}
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rc = put_guest_u64(vcpu, operand2, vcpu->arch.stidp_data);
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if (rc == -EFAULT) {
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kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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goto out;
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}
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VCPU_EVENT(vcpu, 5, "%s", "store cpu id");
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out:
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return 0;
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}
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static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
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{
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struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int;
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int cpus = 0;
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int n;
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spin_lock(&fi->lock);
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for (n = 0; n < KVM_MAX_VCPUS; n++)
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if (fi->local_int[n])
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cpus++;
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spin_unlock(&fi->lock);
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/* deal with other level 3 hypervisors */
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if (stsi(mem, 3, 2, 2))
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mem->count = 0;
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if (mem->count < 8)
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mem->count++;
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for (n = mem->count - 1; n > 0 ; n--)
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memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
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mem->vm[0].cpus_total = cpus;
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mem->vm[0].cpus_configured = cpus;
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mem->vm[0].cpus_standby = 0;
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mem->vm[0].cpus_reserved = 0;
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mem->vm[0].caf = 1000;
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memcpy(mem->vm[0].name, "KVMguest", 8);
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ASCEBC(mem->vm[0].name, 8);
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memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
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ASCEBC(mem->vm[0].cpi, 16);
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}
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static int handle_stsi(struct kvm_vcpu *vcpu)
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{
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int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
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int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
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int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
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u64 operand2;
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unsigned long mem;
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vcpu->stat.instruction_stsi++;
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VCPU_EVENT(vcpu, 4, "stsi: fc: %x sel1: %x sel2: %x", fc, sel1, sel2);
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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if (operand2 & 0xfff && fc > 0)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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switch (fc) {
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case 0:
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vcpu->run->s.regs.gprs[0] = 3 << 28;
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vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44);
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return 0;
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case 1: /* same handling for 1 and 2 */
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case 2:
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mem = get_zeroed_page(GFP_KERNEL);
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if (!mem)
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goto out_fail;
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if (stsi((void *) mem, fc, sel1, sel2))
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goto out_mem;
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break;
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case 3:
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if (sel1 != 2 || sel2 != 2)
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goto out_fail;
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mem = get_zeroed_page(GFP_KERNEL);
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if (!mem)
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goto out_fail;
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handle_stsi_3_2_2(vcpu, (void *) mem);
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break;
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default:
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goto out_fail;
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}
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if (copy_to_guest_absolute(vcpu, operand2, (void *) mem, PAGE_SIZE)) {
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kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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goto out_mem;
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}
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trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
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free_page(mem);
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vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44);
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vcpu->run->s.regs.gprs[0] = 0;
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return 0;
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out_mem:
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free_page(mem);
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out_fail:
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/* condition code 3 */
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vcpu->arch.sie_block->gpsw.mask |= 3ul << 44;
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return 0;
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}
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static const intercept_handler_t b2_handlers[256] = {
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[0x02] = handle_stidp,
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[0x10] = handle_set_prefix,
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[0x11] = handle_store_prefix,
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[0x12] = handle_store_cpu_address,
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[0x29] = handle_skey,
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[0x2a] = handle_skey,
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[0x2b] = handle_skey,
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[0x30] = handle_io_inst,
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[0x31] = handle_io_inst,
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|
[0x32] = handle_io_inst,
|
|
[0x33] = handle_io_inst,
|
|
[0x34] = handle_io_inst,
|
|
[0x35] = handle_io_inst,
|
|
[0x36] = handle_io_inst,
|
|
[0x37] = handle_io_inst,
|
|
[0x38] = handle_io_inst,
|
|
[0x39] = handle_io_inst,
|
|
[0x3a] = handle_io_inst,
|
|
[0x3b] = handle_io_inst,
|
|
[0x3c] = handle_io_inst,
|
|
[0x5f] = handle_io_inst,
|
|
[0x74] = handle_io_inst,
|
|
[0x76] = handle_io_inst,
|
|
[0x7d] = handle_stsi,
|
|
[0xb1] = handle_stfl,
|
|
[0xb2] = handle_lpswe,
|
|
};
|
|
|
|
int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
/*
|
|
* a lot of B2 instructions are priviledged. We first check for
|
|
* the privileged ones, that we can handle in the kernel. If the
|
|
* kernel can handle this instruction, we check for the problem
|
|
* state bit and (a) handle the instruction or (b) send a code 2
|
|
* program check.
|
|
* Anything else goes to userspace.*/
|
|
handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
|
|
if (handler) {
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu,
|
|
PGM_PRIVILEGED_OPERATION);
|
|
else
|
|
return handler(vcpu);
|
|
}
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static int handle_epsw(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1, reg2;
|
|
|
|
reg1 = (vcpu->arch.sie_block->ipb & 0x00f00000) >> 24;
|
|
reg2 = (vcpu->arch.sie_block->ipb & 0x000f0000) >> 16;
|
|
|
|
/* This basically extracts the mask half of the psw. */
|
|
vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000;
|
|
vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
|
|
if (reg2) {
|
|
vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000;
|
|
vcpu->run->s.regs.gprs[reg2] |=
|
|
vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffff;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static const intercept_handler_t b9_handlers[256] = {
|
|
[0x8d] = handle_epsw,
|
|
[0x9c] = handle_io_inst,
|
|
};
|
|
|
|
int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
/* This is handled just as for the B2 instructions. */
|
|
handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
|
|
if (handler) {
|
|
if ((handler != handle_epsw) &&
|
|
(vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE))
|
|
return kvm_s390_inject_program_int(vcpu,
|
|
PGM_PRIVILEGED_OPERATION);
|
|
else
|
|
return handler(vcpu);
|
|
}
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static const intercept_handler_t eb_handlers[256] = {
|
|
[0x8a] = handle_io_inst,
|
|
};
|
|
|
|
int kvm_s390_handle_priv_eb(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
/* All eb instructions that end up here are privileged. */
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu,
|
|
PGM_PRIVILEGED_OPERATION);
|
|
handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff];
|
|
if (handler)
|
|
return handler(vcpu);
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static int handle_tprot(struct kvm_vcpu *vcpu)
|
|
{
|
|
u64 address1, address2;
|
|
struct vm_area_struct *vma;
|
|
unsigned long user_address;
|
|
|
|
vcpu->stat.instruction_tprot++;
|
|
|
|
kvm_s390_get_base_disp_sse(vcpu, &address1, &address2);
|
|
|
|
/* we only handle the Linux memory detection case:
|
|
* access key == 0
|
|
* guest DAT == off
|
|
* everything else goes to userspace. */
|
|
if (address2 & 0xf0)
|
|
return -EOPNOTSUPP;
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
|
|
return -EOPNOTSUPP;
|
|
|
|
|
|
/* we must resolve the address without holding the mmap semaphore.
|
|
* This is ok since the userspace hypervisor is not supposed to change
|
|
* the mapping while the guest queries the memory. Otherwise the guest
|
|
* might crash or get wrong info anyway. */
|
|
user_address = (unsigned long) __guestaddr_to_user(vcpu, address1);
|
|
|
|
down_read(¤t->mm->mmap_sem);
|
|
vma = find_vma(current->mm, user_address);
|
|
if (!vma) {
|
|
up_read(¤t->mm->mmap_sem);
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
}
|
|
|
|
vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44);
|
|
if (!(vma->vm_flags & VM_WRITE) && (vma->vm_flags & VM_READ))
|
|
vcpu->arch.sie_block->gpsw.mask |= (1ul << 44);
|
|
if (!(vma->vm_flags & VM_WRITE) && !(vma->vm_flags & VM_READ))
|
|
vcpu->arch.sie_block->gpsw.mask |= (2ul << 44);
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
return 0;
|
|
}
|
|
|
|
int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
|
|
{
|
|
/* For e5xx... instructions we only handle TPROT */
|
|
if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01)
|
|
return handle_tprot(vcpu);
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static int handle_sckpf(struct kvm_vcpu *vcpu)
|
|
{
|
|
u32 value;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu,
|
|
PGM_PRIVILEGED_OPERATION);
|
|
|
|
if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
|
|
return kvm_s390_inject_program_int(vcpu,
|
|
PGM_SPECIFICATION);
|
|
|
|
value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
|
|
vcpu->arch.sie_block->todpr = value;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const intercept_handler_t x01_handlers[256] = {
|
|
[0x07] = handle_sckpf,
|
|
};
|
|
|
|
int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
|
|
if (handler)
|
|
return handler(vcpu);
|
|
return -EOPNOTSUPP;
|
|
}
|