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87e1bed406
The changes needed to migrate the mach-mvebu (Armada 370 and Armada XP) to the mvebu-mbus driver are fairly minimal, since not many devices currently supported on those SoCs use address decoding windows. The only one being the BootROM window, used to bring up secondary CPUs. However, this BootROM window needed for SMP brings an important requirement: the mvebu-mbus driver must be initialized at the ->early_init() time, otherwise the BootROM window cannot be setup early enough to be ready before the secondary CPUs are started. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
182 lines
3.9 KiB
Plaintext
182 lines
3.9 KiB
Plaintext
/*
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* Device Tree Include file for Marvell Armada 370 and Armada XP SoC
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*
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* Copyright (C) 2012 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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* Ben Dooks <ben.dooks@codethink.co.uk>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* This file contains the definitions that are common to the Armada
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* 370 and Armada XP SoC.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Marvell Armada 370 and XP SoC";
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compatible = "marvell,armada-370-xp";
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cpus {
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cpu@0 {
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compatible = "marvell,sheeva-v7";
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};
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};
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mpic: interrupt-controller@d0020000 {
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compatible = "marvell,mpic";
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#interrupt-cells = <1>;
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#size-cells = <1>;
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interrupt-controller;
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};
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coherency-fabric@d0020200 {
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compatible = "marvell,coherency-fabric";
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reg = <0xd0020200 0xb0>,
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<0xd0021810 0x1c>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&mpic>;
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ranges;
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serial@d0012000 {
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compatible = "snps,dw-apb-uart";
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reg = <0xd0012000 0x100>;
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reg-shift = <2>;
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interrupts = <41>;
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reg-io-width = <1>;
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status = "disabled";
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};
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serial@d0012100 {
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compatible = "snps,dw-apb-uart";
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reg = <0xd0012100 0x100>;
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reg-shift = <2>;
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interrupts = <42>;
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reg-io-width = <1>;
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status = "disabled";
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};
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timer@d0020300 {
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compatible = "marvell,armada-370-xp-timer";
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reg = <0xd0020300 0x30>,
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<0xd0021040 0x30>;
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interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
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clocks = <&coreclk 2>;
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};
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sata@d00a0000 {
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compatible = "marvell,orion-sata";
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reg = <0xd00a0000 0x2400>;
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interrupts = <55>;
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clocks = <&gateclk 15>, <&gateclk 30>;
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clock-names = "0", "1";
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status = "disabled";
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "marvell,orion-mdio";
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reg = <0xd0072004 0x4>;
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};
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ethernet@d0070000 {
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compatible = "marvell,armada-370-neta";
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reg = <0xd0070000 0x2500>;
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interrupts = <8>;
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clocks = <&gateclk 4>;
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status = "disabled";
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};
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ethernet@d0074000 {
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compatible = "marvell,armada-370-neta";
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reg = <0xd0074000 0x2500>;
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interrupts = <10>;
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clocks = <&gateclk 3>;
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status = "disabled";
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};
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i2c0: i2c@d0011000 {
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compatible = "marvell,mv64xxx-i2c";
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reg = <0xd0011000 0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <31>;
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timeout-ms = <1000>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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i2c1: i2c@d0011100 {
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compatible = "marvell,mv64xxx-i2c";
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reg = <0xd0011100 0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <32>;
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timeout-ms = <1000>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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rtc@10300 {
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compatible = "marvell,orion-rtc";
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reg = <0xd0010300 0x20>;
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interrupts = <50>;
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};
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mvsdio@d00d4000 {
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compatible = "marvell,orion-sdio";
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reg = <0xd00d4000 0x200>;
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interrupts = <54>;
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clocks = <&gateclk 17>;
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status = "disabled";
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};
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usb@d0050000 {
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compatible = "marvell,orion-ehci";
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reg = <0xd0050000 0x500>;
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interrupts = <45>;
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status = "disabled";
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};
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usb@d0051000 {
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compatible = "marvell,orion-ehci";
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reg = <0xd0051000 0x500>;
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interrupts = <46>;
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status = "disabled";
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};
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spi0: spi@d0010600 {
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compatible = "marvell,orion-spi";
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reg = <0xd0010600 0x28>;
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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interrupts = <30>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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spi1: spi@d0010680 {
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compatible = "marvell,orion-spi";
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reg = <0xd0010680 0x28>;
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <1>;
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interrupts = <92>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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};
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};
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