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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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45e4728b87
Move all the DPLL params->DPLL frequency conversion functions to intel_dpll_mgr.c where the corresponding inverse conversions are. The GEN11+ TBT PLL outputs multiple frequencies and for selecting the one in use we need to check the DDI CLK mux. As part of the DDI clock logic this selection is kept in intel_ddi.c. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200226203455.23032-7-imre.deak@intel.com
50 lines
2.0 KiB
C
50 lines
2.0 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_DDI_H__
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#define __INTEL_DDI_H__
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#include "intel_display.h"
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struct drm_connector_state;
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struct drm_i915_private;
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struct intel_connector;
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struct intel_crtc;
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struct intel_crtc_state;
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struct intel_dp;
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struct intel_dpll_hw_state;
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struct intel_encoder;
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void intel_ddi_fdi_post_disable(struct intel_encoder *intel_encoder,
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const struct intel_crtc_state *old_crtc_state,
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const struct drm_connector_state *old_conn_state);
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void hsw_fdi_link_train(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
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bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
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void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state);
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void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
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void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state);
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void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state);
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void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
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void intel_ddi_get_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config);
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void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,
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bool state);
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void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
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struct intel_crtc_state *crtc_state);
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u32 bxt_signal_levels(struct intel_dp *intel_dp);
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u32 ddi_signal_levels(struct intel_dp *intel_dp);
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u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder);
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u8 intel_ddi_dp_pre_emphasis_max(struct intel_encoder *encoder,
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u8 voltage_swing);
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int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
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bool enable);
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void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
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#endif /* __INTEL_DDI_H__ */
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