mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 08:36:40 +07:00
581 lines
16 KiB
C
581 lines
16 KiB
C
/*
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* linux/drivers/video/igafb.c -- Frame buffer device for IGA 1682
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*
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* Copyright (C) 1998 Vladimir Roganov and Gleb Raiko
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*
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* This driver is partly based on the Frame buffer device for ATI Mach64
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* and partially on VESA-related code.
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*
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* Copyright (C) 1997-1998 Geert Uytterhoeven
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* Copyright (C) 1998 Bernd Harries
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* Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*/
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/******************************************************************************
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TODO:
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Despite of IGA Card has advanced graphic acceleration,
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initial version is almost dummy and does not support it.
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Support for video modes and acceleration must be added
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together with accelerated X-Windows driver implementation.
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Most important thing at this moment is that we have working
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JavaEngine1 console & X with new console interface.
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******************************************************************************/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/nvram.h>
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#include <asm/io.h>
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#ifdef CONFIG_SPARC
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#include <asm/prom.h>
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#include <asm/pcic.h>
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#endif
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#include <video/iga.h>
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struct pci_mmap_map {
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unsigned long voff;
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unsigned long poff;
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unsigned long size;
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unsigned long prot_flag;
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unsigned long prot_mask;
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};
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struct iga_par {
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struct pci_mmap_map *mmap_map;
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unsigned long frame_buffer_phys;
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unsigned long io_base;
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};
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struct fb_info fb_info;
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struct fb_fix_screeninfo igafb_fix __initdata = {
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.id = "IGA 1682",
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.type = FB_TYPE_PACKED_PIXELS,
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.mmio_len = 1000
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};
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struct fb_var_screeninfo default_var = {
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/* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
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.xres = 640,
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.yres = 480,
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.xres_virtual = 640,
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.yres_virtual = 480,
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.bits_per_pixel = 8,
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.red = {0, 8, 0 },
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.green = {0, 8, 0 },
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.blue = {0, 8, 0 },
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.height = -1,
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.width = -1,
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.accel_flags = FB_ACCEL_NONE,
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.pixclock = 39722,
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.left_margin = 48,
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.right_margin = 16,
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.upper_margin = 33,
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.lower_margin = 10,
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.hsync_len = 96,
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.vsync_len = 2,
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.vmode = FB_VMODE_NONINTERLACED
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};
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#ifdef CONFIG_SPARC
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struct fb_var_screeninfo default_var_1024x768 __initdata = {
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/* 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) */
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.xres = 1024,
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.yres = 768,
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.xres_virtual = 1024,
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.yres_virtual = 768,
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.bits_per_pixel = 8,
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.red = {0, 8, 0 },
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.green = {0, 8, 0 },
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.blue = {0, 8, 0 },
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.height = -1,
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.width = -1,
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.accel_flags = FB_ACCEL_NONE,
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.pixclock = 12699,
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.left_margin = 176,
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.right_margin = 16,
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.upper_margin = 28,
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.lower_margin = 1,
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.hsync_len = 96,
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.vsync_len = 3,
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.vmode = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
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};
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struct fb_var_screeninfo default_var_1152x900 __initdata = {
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/* 1152x900, 76 Hz, Non-Interlaced (110.0 MHz dotclock) */
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.xres = 1152,
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.yres = 900,
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.xres_virtual = 1152,
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.yres_virtual = 900,
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.bits_per_pixel = 8,
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.red = { 0, 8, 0 },
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.green = { 0, 8, 0 },
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.blue = { 0, 8, 0 },
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.height = -1,
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.width = -1,
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.accel_flags = FB_ACCEL_NONE,
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.pixclock = 9091,
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.left_margin = 234,
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.right_margin = 24,
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.upper_margin = 34,
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.lower_margin = 3,
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.hsync_len = 100,
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.vsync_len = 3,
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.vmode = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
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};
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struct fb_var_screeninfo default_var_1280x1024 __initdata = {
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/* 1280x1024, 75 Hz, Non-Interlaced (135.00 MHz dotclock) */
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.xres = 1280,
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.yres = 1024,
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.xres_virtual = 1280,
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.yres_virtual = 1024,
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.bits_per_pixel = 8,
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.red = {0, 8, 0 },
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.green = {0, 8, 0 },
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.blue = {0, 8, 0 },
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.height = -1,
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.width = -1,
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.accel_flags = 0,
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.pixclock = 7408,
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.left_margin = 248,
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.right_margin = 16,
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.upper_margin = 38,
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.lower_margin = 1,
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.hsync_len = 144,
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.vsync_len = 3,
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.vmode = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
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};
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/*
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* Memory-mapped I/O functions for Sparc PCI
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*
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* On sparc we happen to access I/O with memory mapped functions too.
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*/
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#define pci_inb(par, reg) readb(par->io_base+(reg))
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#define pci_outb(par, val, reg) writeb(val, par->io_base+(reg))
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static inline unsigned int iga_inb(struct iga_par *par, unsigned int reg,
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unsigned int idx)
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{
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pci_outb(par, idx, reg);
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return pci_inb(par, reg + 1);
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}
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static inline void iga_outb(struct iga_par *par, unsigned char val,
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unsigned int reg, unsigned int idx )
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{
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pci_outb(par, idx, reg);
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pci_outb(par, val, reg+1);
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}
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#endif /* CONFIG_SPARC */
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/*
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* Very important functionality for the JavaEngine1 computer:
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* make screen border black (usign special IGA registers)
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*/
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static void iga_blank_border(struct iga_par *par)
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{
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int i;
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#if 0
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/*
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* PROM does this for us, so keep this code as a reminder
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* about required read from 0x3DA and writing of 0x20 in the end.
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*/
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(void) pci_inb(par, 0x3DA); /* required for every access */
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pci_outb(par, IGA_IDX_VGA_OVERSCAN, IGA_ATTR_CTL);
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(void) pci_inb(par, IGA_ATTR_CTL+1);
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pci_outb(par, 0x38, IGA_ATTR_CTL);
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pci_outb(par, 0x20, IGA_ATTR_CTL); /* re-enable visual */
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#endif
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/*
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* This does not work as it was designed because the overscan
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* color is looked up in the palette. Therefore, under X11
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* overscan changes color.
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*/
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for (i=0; i < 3; i++)
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iga_outb(par, 0, IGA_EXT_CNTRL, IGA_IDX_OVERSCAN_COLOR + i);
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}
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#ifdef CONFIG_SPARC
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static int igafb_mmap(struct fb_info *info,
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struct vm_area_struct *vma)
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{
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struct iga_par *par = (struct iga_par *)info->par;
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unsigned int size, page, map_size = 0;
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unsigned long map_offset = 0;
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int i;
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if (!par->mmap_map)
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return -ENXIO;
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size = vma->vm_end - vma->vm_start;
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/* Each page, see which map applies */
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for (page = 0; page < size; ) {
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map_size = 0;
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for (i = 0; par->mmap_map[i].size; i++) {
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unsigned long start = par->mmap_map[i].voff;
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unsigned long end = start + par->mmap_map[i].size;
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unsigned long offset = (vma->vm_pgoff << PAGE_SHIFT) + page;
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if (start > offset)
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continue;
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if (offset >= end)
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continue;
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map_size = par->mmap_map[i].size - (offset - start);
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map_offset = par->mmap_map[i].poff + (offset - start);
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break;
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}
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if (!map_size) {
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page += PAGE_SIZE;
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continue;
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}
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if (page + map_size > size)
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map_size = size - page;
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pgprot_val(vma->vm_page_prot) &= ~(par->mmap_map[i].prot_mask);
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pgprot_val(vma->vm_page_prot) |= par->mmap_map[i].prot_flag;
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if (remap_pfn_range(vma, vma->vm_start + page,
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map_offset >> PAGE_SHIFT, map_size, vma->vm_page_prot))
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return -EAGAIN;
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page += map_size;
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}
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if (!map_size)
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return -EINVAL;
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vma->vm_flags |= VM_IO;
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return 0;
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}
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#endif /* CONFIG_SPARC */
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static int igafb_setcolreg(unsigned regno, unsigned red, unsigned green,
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unsigned blue, unsigned transp,
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struct fb_info *info)
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{
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/*
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* Set a single color register. The values supplied are
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* already rounded down to the hardware's capabilities
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* (according to the entries in the `var' structure). Return
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* != 0 for invalid regno.
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*/
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struct iga_par *par = (struct iga_par *)info->par;
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if (regno >= info->cmap.len)
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return 1;
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pci_outb(par, regno, DAC_W_INDEX);
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pci_outb(par, red, DAC_DATA);
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pci_outb(par, green, DAC_DATA);
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pci_outb(par, blue, DAC_DATA);
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if (regno < 16) {
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switch (info->var.bits_per_pixel) {
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case 16:
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((u16*)(info->pseudo_palette))[regno] =
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(regno << 10) | (regno << 5) | regno;
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break;
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case 24:
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((u32*)(info->pseudo_palette))[regno] =
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(regno << 16) | (regno << 8) | regno;
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break;
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case 32:
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{ int i;
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i = (regno << 8) | regno;
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((u32*)(info->pseudo_palette))[regno] = (i << 16) | i;
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}
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break;
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}
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}
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return 0;
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}
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/*
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* Framebuffer option structure
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*/
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static struct fb_ops igafb_ops = {
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.owner = THIS_MODULE,
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.fb_setcolreg = igafb_setcolreg,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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#ifdef CONFIG_SPARC
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.fb_mmap = igafb_mmap,
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#endif
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};
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static int __init iga_init(struct fb_info *info, struct iga_par *par)
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{
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char vramsz = iga_inb(par, IGA_EXT_CNTRL, IGA_IDX_EXT_BUS_CNTL)
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& MEM_SIZE_ALIAS;
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int video_cmap_len;
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switch (vramsz) {
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case MEM_SIZE_1M:
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info->fix.smem_len = 0x100000;
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break;
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case MEM_SIZE_2M:
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info->fix.smem_len = 0x200000;
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break;
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case MEM_SIZE_4M:
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case MEM_SIZE_RESERVED:
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info->fix.smem_len = 0x400000;
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break;
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}
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if (info->var.bits_per_pixel > 8)
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video_cmap_len = 16;
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else
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video_cmap_len = 256;
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info->fbops = &igafb_ops;
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info->flags = FBINFO_DEFAULT;
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fb_alloc_cmap(&info->cmap, video_cmap_len, 0);
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if (register_framebuffer(info) < 0)
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return 0;
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printk("fb%d: %s frame buffer device at 0x%08lx [%dMB VRAM]\n",
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info->node, info->fix.id,
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par->frame_buffer_phys, info->fix.smem_len >> 20);
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iga_blank_border(par);
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return 1;
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}
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int __init igafb_init(void)
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{
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struct fb_info *info;
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struct pci_dev *pdev;
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struct iga_par *par;
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unsigned long addr;
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int size, iga2000 = 0;
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if (fb_get_options("igafb", NULL))
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return -ENODEV;
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/* Do not attach when we have a serial console. */
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if (!con_is_present())
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return -ENXIO;
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pdev = pci_get_device(PCI_VENDOR_ID_INTERG,
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PCI_DEVICE_ID_INTERG_1682, 0);
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if (pdev == NULL) {
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/*
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* XXX We tried to use cyber2000fb.c for IGS 2000.
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* But it does not initialize the chip in JavaStation-E, alas.
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*/
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pdev = pci_get_device(PCI_VENDOR_ID_INTERG, 0x2000, 0);
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if(pdev == NULL) {
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return -ENXIO;
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}
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iga2000 = 1;
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}
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/* We leak a reference here but as it cannot be unloaded this is
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fine. If you write unload code remember to free it in unload */
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size = sizeof(struct fb_info) + sizeof(struct iga_par) + sizeof(u32)*16;
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info = kzalloc(size, GFP_ATOMIC);
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if (!info) {
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printk("igafb_init: can't alloc fb_info\n");
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return -ENOMEM;
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}
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par = (struct iga_par *) (info + 1);
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if ((addr = pdev->resource[0].start) == 0) {
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printk("igafb_init: no memory start\n");
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kfree(info);
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return -ENXIO;
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}
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if ((info->screen_base = ioremap(addr, 1024*1024*2)) == 0) {
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printk("igafb_init: can't remap %lx[2M]\n", addr);
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kfree(info);
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return -ENXIO;
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}
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par->frame_buffer_phys = addr & PCI_BASE_ADDRESS_MEM_MASK;
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#ifdef CONFIG_SPARC
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/*
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* The following is sparc specific and this is why:
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*
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* IGS2000 has its I/O memory mapped and we want
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* to generate memory cycles on PCI, e.g. do ioremap(),
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* then readb/writeb() as in Documentation/IO-mapping.txt.
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*
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* IGS1682 is more traditional, it responds to PCI I/O
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* cycles, so we want to access it with inb()/outb().
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*
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* On sparc, PCIC converts CPU memory access within
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* phys window 0x3000xxxx into PCI I/O cycles. Therefore
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* we may use readb/writeb to access them with IGS1682.
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*
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* We do not take io_base_phys from resource[n].start
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* on IGS1682 because that chip is BROKEN. It does not
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* have a base register for I/O. We just "know" what its
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* I/O addresses are.
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*/
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if (iga2000) {
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igafb_fix.mmio_start = par->frame_buffer_phys | 0x00800000;
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} else {
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igafb_fix.mmio_start = 0x30000000; /* XXX */
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}
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if ((par->io_base = (int) ioremap(igafb_fix.mmio_start, igafb_fix.smem_len)) == 0) {
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printk("igafb_init: can't remap %lx[4K]\n", igafb_fix.mmio_start);
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iounmap((void *)info->screen_base);
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kfree(info);
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return -ENXIO;
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}
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/*
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* Figure mmap addresses from PCI config space.
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* We need two regions: for video memory and for I/O ports.
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* Later one can add region for video coprocessor registers.
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* However, mmap routine loops until size != 0, so we put
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* one additional region with size == 0.
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*/
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par->mmap_map = kzalloc(4 * sizeof(*par->mmap_map), GFP_ATOMIC);
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if (!par->mmap_map) {
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printk("igafb_init: can't alloc mmap_map\n");
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iounmap((void *)par->io_base);
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iounmap(info->screen_base);
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kfree(info);
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return -ENOMEM;
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}
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|
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/*
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* Set default vmode and cmode from PROM properties.
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*/
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{
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struct device_node *dp = pci_device_to_OF_node(pdev);
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int node = dp->node;
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int width = prom_getintdefault(node, "width", 1024);
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int height = prom_getintdefault(node, "height", 768);
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int depth = prom_getintdefault(node, "depth", 8);
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switch (width) {
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case 1024:
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if (height == 768)
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default_var = default_var_1024x768;
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break;
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case 1152:
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if (height == 900)
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default_var = default_var_1152x900;
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break;
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case 1280:
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if (height == 1024)
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default_var = default_var_1280x1024;
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break;
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default:
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break;
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}
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switch (depth) {
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case 8:
|
|
default_var.bits_per_pixel = 8;
|
|
break;
|
|
case 16:
|
|
default_var.bits_per_pixel = 16;
|
|
break;
|
|
case 24:
|
|
default_var.bits_per_pixel = 24;
|
|
break;
|
|
case 32:
|
|
default_var.bits_per_pixel = 32;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
#endif
|
|
igafb_fix.smem_start = (unsigned long) info->screen_base;
|
|
igafb_fix.line_length = default_var.xres*(default_var.bits_per_pixel/8);
|
|
igafb_fix.visual = default_var.bits_per_pixel <= 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
|
|
|
|
info->var = default_var;
|
|
info->fix = igafb_fix;
|
|
info->pseudo_palette = (void *)(par + 1);
|
|
info->device = &pdev->dev;
|
|
|
|
if (!iga_init(info, par)) {
|
|
iounmap((void *)par->io_base);
|
|
iounmap(info->screen_base);
|
|
kfree(par->mmap_map);
|
|
kfree(info);
|
|
}
|
|
|
|
#ifdef CONFIG_SPARC
|
|
/*
|
|
* Add /dev/fb mmap values.
|
|
*/
|
|
|
|
/* First region is for video memory */
|
|
par->mmap_map[0].voff = 0x0;
|
|
par->mmap_map[0].poff = par->frame_buffer_phys & PAGE_MASK;
|
|
par->mmap_map[0].size = info->fix.smem_len & PAGE_MASK;
|
|
par->mmap_map[0].prot_mask = SRMMU_CACHE;
|
|
par->mmap_map[0].prot_flag = SRMMU_WRITE;
|
|
|
|
/* Second region is for I/O ports */
|
|
par->mmap_map[1].voff = par->frame_buffer_phys & PAGE_MASK;
|
|
par->mmap_map[1].poff = info->fix.smem_start & PAGE_MASK;
|
|
par->mmap_map[1].size = PAGE_SIZE * 2; /* X wants 2 pages */
|
|
par->mmap_map[1].prot_mask = SRMMU_CACHE;
|
|
par->mmap_map[1].prot_flag = SRMMU_WRITE;
|
|
#endif /* CONFIG_SPARC */
|
|
|
|
return 0;
|
|
}
|
|
|
|
int __init igafb_setup(char *options)
|
|
{
|
|
char *this_opt;
|
|
|
|
if (!options || !*options)
|
|
return 0;
|
|
|
|
while ((this_opt = strsep(&options, ",")) != NULL) {
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
module_init(igafb_init);
|
|
MODULE_LICENSE("GPL");
|
|
static struct pci_device_id igafb_pci_tbl[] __devinitdata = {
|
|
{ PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_1682,
|
|
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
|
|
{ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, igafb_pci_tbl);
|