mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 21:15:44 +07:00
db06f826ec
We've added duty cycle support to the clk API so that clk signal duty cycle ratios can be adjusted while taking into account things like clk dividers and clk tree hierarchy. So far only one SoC has implemented support for this, but I expect there will be more to come in the future. Outside of the core, we have the usual pile of clk driver updates and additions. The Amlogic meson driver got the most lines in the diffstat this time around because it added support for a whole bunch of hardware and duty cycle configuration. After that the Rockchip PX30, Qualcomm SDM845, and Renesas SoC drivers fill in a majority of the diff. We're left with the collection of non-critical fixes after that. Overall it looks pretty quiet this time. Core: - Clk duty cycle support - Proper CLK_SET_RATE_GATE support throughout the tree New Drivers: - Actions Semi Owl series S700 SoC clk driver - Qualcomm SDM845 display clock controller - i.MX6SX ocram_s clk support - Uniphier NAND, USB3 PHY, and SPI clk support - Qualcomm RPMh clk driver - i.MX7D mailbox clk support - Maxim 9485 Programmable Clock Generator - Expose 32 kHz PLL on PXA SoCs - imx6sll GPIO clk gate support - Atmel at91 I2S audio clk support - SI544/SI514 clk on/off support - i.MX6UL GPIO clock gates in CCM CCGR - Renesas Crypto Engine clocks on R-Car H3 - Renesas clk support for the new RZ/N1D SoC - Allwinner A64 display engine clock support - Support for Rockchip's PX30 SoC - Amlogic Meson axg PCIe and audio clocks - Amlogic Meson GEN CLK on gxbb, gxl and axg Updates: - Remove an unused variable from Exynos4412 ISP driver - Fix a thinko bug in SCMI clk division logic - Add missing of_node_put()s in some i.MX clk drivers - Tegra SDMMC clk jitter improvements with high speed signaling modes - SPDX tagging for qcom and cs2000-cp drivers - Stop leaking con ids in __clk_put() - Fix a corner case in fixed factor clk probing where node is in DT but parent clk is registered much later - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return value - i.MX clk init arrays removed in place of CLK_IS_CRITICAL - Convert to CLK_IS_CRITICAL for i.MX51/53 driver - Fix Tegra BPMP driver oops when xlating a NULL clk - Proper default configuration for vic03 and vde clks on Tegra124 - Mark Tegra memory controller clks as critical - Fix array bounds clamp in Tegra's emc determine_rate() op - Ingenic i2s bit update and allow UDC clk to gate - Fix name of aspeed SDC clk define to have only one 'CLK' - Fix i.MX6QDL video clk parent - Critical clk markings for qcom SDM845 - Fix Stratix10 mpu_free_clk and sdmmc_free_clk parents - Mark Rockchip's pclk_rkpwm_pmu as critical clock, due to it supplying the pwm used to drive the logic supply of the rk3399 core. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlt0WD0RHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSX5jBAAlMLb0fqnuAGNJeXZDk5rsCa496LMyGWx ku7uLA2H68SlbSQqq8FUPoCjDZkmsu2CbOX1U2/H4HFDS0pqpPiV3mZNtSeacedp 4Wf8yUB5G3xdq9QUCSX5LxMmEQoGeJ+gaTspBvM6sNvEMBR2kEMGBqUy768tnDTR qCQ8Q1jOU6l8IdFV0SZGssmZ+oFqOyQoJVquPWPkw1+p/2f1KyYIyG5J5FXGxgcR 1XQITY/I/dShQ2wd+ZeDdt+GjZqIXQ06Pt3ruRG7HVP79Zt1XCRJd5dZ2lf+Wj8T 1ul3TWCAMYZ8gCPebLMbBGzKvQJQJcDU6DpIZsrUDN+C6z7KCS9vqeCxP9cF+3jJ LOmA6cWE7z9Vkk9s0I0KJJ2Sw7wRoXzE5OJcwa/yousSz3s9cX+F8SAkdZs77oUF 0XnzPsvwdHI/egQ4UrsStPHM/gOFhsQqo8vvm5xaaTR2AxLKBHuPa9oUv9YpO/P5 J6FCst3qeY3Wp69fJ5/Z058OFOAt81dKXij2fZJBOO4KJy7Kse8Sz5ApybXVAbY5 lfvx+KGMITFqLYrcRIQZmlCuoHcMwI0FtHr9Ens5GXdbrJ+W+FlvP43eLCA0ZmRx 9DidemChj3k3PC3H6tbax/jzV4IIxZdyUoBJ1imL4uyhhaXp/qr45A/aGwNp8Q8a WvkIGm3epK4= =Mcn+ -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The new and exciting feature this time around is in the clk core. We've added duty cycle support to the clk API so that clk signal duty cycle ratios can be adjusted while taking into account things like clk dividers and clk tree hierarchy. So far only one SoC has implemented support for this, but I expect there will be more to come in the future. Outside of the core, we have the usual pile of clk driver updates and additions. The Amlogic meson driver got the most lines in the diffstat this time around because it added support for a whole bunch of hardware and duty cycle configuration. After that the Rockchip PX30, Qualcomm SDM845, and Renesas SoC drivers fill in a majority of the diff. We're left with the collection of non-critical fixes after that. Overall it looks pretty quiet this time. Core: - Clk duty cycle support - Proper CLK_SET_RATE_GATE support throughout the tree New Drivers: - Actions Semi Owl series S700 SoC clk driver - Qualcomm SDM845 display clock controller - i.MX6SX ocram_s clk support - Uniphier NAND, USB3 PHY, and SPI clk support - Qualcomm RPMh clk driver - i.MX7D mailbox clk support - Maxim 9485 Programmable Clock Generator - expose 32 kHz PLL on PXA SoCs - imx6sll GPIO clk gate support - Atmel at91 I2S audio clk support - SI544/SI514 clk on/off support - i.MX6UL GPIO clock gates in CCM CCGR - Renesas Crypto Engine clocks on R-Car H3 - Renesas clk support for the new RZ/N1D SoC - Allwinner A64 display engine clock support - support for Rockchip's PX30 SoC - Amlogic Meson axg PCIe and audio clocks - Amlogic Meson GEN CLK on gxbb, gxl and axg Updates: - remove an unused variable from Exynos4412 ISP driver - fix a thinko bug in SCMI clk division logic - add missing of_node_put()s in some i.MX clk drivers - Tegra SDMMC clk jitter improvements with high speed signaling modes - SPDX tagging for qcom and cs2000-cp drivers - stop leaking con ids in __clk_put() - fix a corner case in fixed factor clk probing where node is in DT but parent clk is registered much later - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return value - i.MX clk init arrays removed in place of CLK_IS_CRITICAL - convert to CLK_IS_CRITICAL for i.MX51/53 driver - fix Tegra BPMP driver oops when xlating a NULL clk - proper default configuration for vic03 and vde clks on Tegra124 - mark Tegra memory controller clks as critical - fix array bounds clamp in Tegra's emc determine_rate() op - Ingenic i2s bit update and allow UDC clk to gate - fix name of aspeed SDC clk define to have only one 'CLK' - fix i.MX6QDL video clk parent - critical clk markings for qcom SDM845 - fix Stratix10 mpu_free_clk and sdmmc_free_clk parents - mark Rockchip's pclk_rkpwm_pmu as critical clock, due to it supplying the pwm used to drive the logic supply of the rk3399 core" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (85 commits) clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399 clk: cs2000-cp: convert to SPDX identifiers clk: scmi: Fix the rounding of clock rate clk: qcom: Add display clock controller driver for SDM845 clk: mvebu: armada-37xx-periph: Remove unused var num_parents clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable clk: actions: Add S700 SoC clock support dt-bindings: clock: Add S700 support for Actions Semi Soc's clk: actions: Add missing REGMAP_MMIO dependency clk: uniphier: add clock frequency support for SPI clk: uniphier: add more USB3 PHY clocks clk: uniphier: add NAND 200MHz clock clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks clk: tegra: Add sdmmc mux divider clock clk: tegra: Refactor fractional divider calculation clk: tegra: Fix includes required by fence_udelay() clk: imx6sll: fix missing of_node_put() clk: imx6ul: fix missing of_node_put() clk: imx: add ocram_s clock for i.mx6sx clk: mvebu: armada-37xx-periph: Fix wrong return value in get_parent ...
4180 lines
101 KiB
C
4180 lines
101 KiB
C
/*
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* Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
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* Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/clk/clk-conf.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/spinlock.h>
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#include <linux/err.h>
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#include <linux/list.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/pm_runtime.h>
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#include <linux/sched.h>
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#include <linux/clkdev.h>
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#include "clk.h"
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static DEFINE_SPINLOCK(enable_lock);
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static DEFINE_MUTEX(prepare_lock);
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static struct task_struct *prepare_owner;
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static struct task_struct *enable_owner;
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static int prepare_refcnt;
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static int enable_refcnt;
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static HLIST_HEAD(clk_root_list);
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static HLIST_HEAD(clk_orphan_list);
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static LIST_HEAD(clk_notifier_list);
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/*** private data structures ***/
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struct clk_core {
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const char *name;
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const struct clk_ops *ops;
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struct clk_hw *hw;
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struct module *owner;
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struct device *dev;
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struct clk_core *parent;
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const char **parent_names;
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struct clk_core **parents;
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u8 num_parents;
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u8 new_parent_index;
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unsigned long rate;
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unsigned long req_rate;
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unsigned long new_rate;
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struct clk_core *new_parent;
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struct clk_core *new_child;
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unsigned long flags;
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bool orphan;
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unsigned int enable_count;
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unsigned int prepare_count;
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unsigned int protect_count;
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unsigned long min_rate;
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unsigned long max_rate;
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unsigned long accuracy;
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int phase;
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struct clk_duty duty;
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struct hlist_head children;
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struct hlist_node child_node;
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struct hlist_head clks;
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unsigned int notifier_count;
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#ifdef CONFIG_DEBUG_FS
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struct dentry *dentry;
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struct hlist_node debug_node;
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#endif
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struct kref ref;
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};
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#define CREATE_TRACE_POINTS
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#include <trace/events/clk.h>
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struct clk {
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struct clk_core *core;
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const char *dev_id;
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const char *con_id;
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unsigned long min_rate;
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unsigned long max_rate;
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unsigned int exclusive_count;
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struct hlist_node clks_node;
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};
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/*** runtime pm ***/
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static int clk_pm_runtime_get(struct clk_core *core)
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{
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int ret = 0;
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if (!core->dev)
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return 0;
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ret = pm_runtime_get_sync(core->dev);
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return ret < 0 ? ret : 0;
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}
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static void clk_pm_runtime_put(struct clk_core *core)
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{
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if (!core->dev)
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return;
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pm_runtime_put_sync(core->dev);
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}
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/*** locking ***/
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static void clk_prepare_lock(void)
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{
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if (!mutex_trylock(&prepare_lock)) {
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if (prepare_owner == current) {
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prepare_refcnt++;
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return;
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}
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mutex_lock(&prepare_lock);
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}
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WARN_ON_ONCE(prepare_owner != NULL);
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WARN_ON_ONCE(prepare_refcnt != 0);
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prepare_owner = current;
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prepare_refcnt = 1;
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}
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static void clk_prepare_unlock(void)
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{
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WARN_ON_ONCE(prepare_owner != current);
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WARN_ON_ONCE(prepare_refcnt == 0);
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if (--prepare_refcnt)
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return;
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prepare_owner = NULL;
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mutex_unlock(&prepare_lock);
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}
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static unsigned long clk_enable_lock(void)
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__acquires(enable_lock)
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{
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unsigned long flags;
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/*
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* On UP systems, spin_trylock_irqsave() always returns true, even if
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* we already hold the lock. So, in that case, we rely only on
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* reference counting.
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*/
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if (!IS_ENABLED(CONFIG_SMP) ||
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!spin_trylock_irqsave(&enable_lock, flags)) {
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if (enable_owner == current) {
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enable_refcnt++;
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__acquire(enable_lock);
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if (!IS_ENABLED(CONFIG_SMP))
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local_save_flags(flags);
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return flags;
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}
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spin_lock_irqsave(&enable_lock, flags);
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}
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WARN_ON_ONCE(enable_owner != NULL);
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WARN_ON_ONCE(enable_refcnt != 0);
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enable_owner = current;
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enable_refcnt = 1;
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return flags;
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}
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static void clk_enable_unlock(unsigned long flags)
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__releases(enable_lock)
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{
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WARN_ON_ONCE(enable_owner != current);
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WARN_ON_ONCE(enable_refcnt == 0);
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if (--enable_refcnt) {
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__release(enable_lock);
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return;
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}
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enable_owner = NULL;
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spin_unlock_irqrestore(&enable_lock, flags);
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}
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static bool clk_core_rate_is_protected(struct clk_core *core)
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{
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return core->protect_count;
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}
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static bool clk_core_is_prepared(struct clk_core *core)
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{
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bool ret = false;
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/*
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* .is_prepared is optional for clocks that can prepare
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* fall back to software usage counter if it is missing
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*/
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if (!core->ops->is_prepared)
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return core->prepare_count;
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if (!clk_pm_runtime_get(core)) {
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ret = core->ops->is_prepared(core->hw);
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clk_pm_runtime_put(core);
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}
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return ret;
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}
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static bool clk_core_is_enabled(struct clk_core *core)
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{
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bool ret = false;
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/*
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* .is_enabled is only mandatory for clocks that gate
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* fall back to software usage counter if .is_enabled is missing
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*/
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if (!core->ops->is_enabled)
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return core->enable_count;
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/*
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* Check if clock controller's device is runtime active before
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* calling .is_enabled callback. If not, assume that clock is
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* disabled, because we might be called from atomic context, from
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* which pm_runtime_get() is not allowed.
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* This function is called mainly from clk_disable_unused_subtree,
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* which ensures proper runtime pm activation of controller before
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* taking enable spinlock, but the below check is needed if one tries
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* to call it from other places.
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*/
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if (core->dev) {
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pm_runtime_get_noresume(core->dev);
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if (!pm_runtime_active(core->dev)) {
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ret = false;
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goto done;
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}
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}
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ret = core->ops->is_enabled(core->hw);
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done:
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if (core->dev)
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pm_runtime_put(core->dev);
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return ret;
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}
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/*** helper functions ***/
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const char *__clk_get_name(const struct clk *clk)
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{
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return !clk ? NULL : clk->core->name;
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}
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EXPORT_SYMBOL_GPL(__clk_get_name);
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const char *clk_hw_get_name(const struct clk_hw *hw)
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{
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return hw->core->name;
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}
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EXPORT_SYMBOL_GPL(clk_hw_get_name);
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struct clk_hw *__clk_get_hw(struct clk *clk)
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{
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return !clk ? NULL : clk->core->hw;
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}
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EXPORT_SYMBOL_GPL(__clk_get_hw);
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unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
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{
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return hw->core->num_parents;
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}
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EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
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struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
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{
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return hw->core->parent ? hw->core->parent->hw : NULL;
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}
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EXPORT_SYMBOL_GPL(clk_hw_get_parent);
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static struct clk_core *__clk_lookup_subtree(const char *name,
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struct clk_core *core)
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{
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struct clk_core *child;
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struct clk_core *ret;
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if (!strcmp(core->name, name))
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return core;
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hlist_for_each_entry(child, &core->children, child_node) {
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ret = __clk_lookup_subtree(name, child);
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if (ret)
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return ret;
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}
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return NULL;
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}
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static struct clk_core *clk_core_lookup(const char *name)
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{
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struct clk_core *root_clk;
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struct clk_core *ret;
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if (!name)
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return NULL;
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/* search the 'proper' clk tree first */
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hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
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ret = __clk_lookup_subtree(name, root_clk);
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if (ret)
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return ret;
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}
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/* if not found, then search the orphan tree */
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hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
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ret = __clk_lookup_subtree(name, root_clk);
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if (ret)
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return ret;
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}
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return NULL;
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}
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static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
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u8 index)
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{
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if (!core || index >= core->num_parents)
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return NULL;
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if (!core->parents[index])
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core->parents[index] =
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clk_core_lookup(core->parent_names[index]);
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return core->parents[index];
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}
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struct clk_hw *
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clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
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{
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struct clk_core *parent;
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parent = clk_core_get_parent_by_index(hw->core, index);
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return !parent ? NULL : parent->hw;
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}
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EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
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unsigned int __clk_get_enable_count(struct clk *clk)
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{
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return !clk ? 0 : clk->core->enable_count;
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}
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static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
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{
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unsigned long ret;
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if (!core) {
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ret = 0;
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goto out;
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}
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ret = core->rate;
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if (!core->num_parents)
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goto out;
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if (!core->parent)
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ret = 0;
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out:
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return ret;
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}
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unsigned long clk_hw_get_rate(const struct clk_hw *hw)
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{
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return clk_core_get_rate_nolock(hw->core);
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}
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EXPORT_SYMBOL_GPL(clk_hw_get_rate);
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static unsigned long __clk_get_accuracy(struct clk_core *core)
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{
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if (!core)
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return 0;
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return core->accuracy;
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}
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unsigned long __clk_get_flags(struct clk *clk)
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{
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return !clk ? 0 : clk->core->flags;
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}
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EXPORT_SYMBOL_GPL(__clk_get_flags);
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unsigned long clk_hw_get_flags(const struct clk_hw *hw)
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{
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return hw->core->flags;
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}
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EXPORT_SYMBOL_GPL(clk_hw_get_flags);
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bool clk_hw_is_prepared(const struct clk_hw *hw)
|
|
{
|
|
return clk_core_is_prepared(hw->core);
|
|
}
|
|
|
|
bool clk_hw_rate_is_protected(const struct clk_hw *hw)
|
|
{
|
|
return clk_core_rate_is_protected(hw->core);
|
|
}
|
|
|
|
bool clk_hw_is_enabled(const struct clk_hw *hw)
|
|
{
|
|
return clk_core_is_enabled(hw->core);
|
|
}
|
|
|
|
bool __clk_is_enabled(struct clk *clk)
|
|
{
|
|
if (!clk)
|
|
return false;
|
|
|
|
return clk_core_is_enabled(clk->core);
|
|
}
|
|
EXPORT_SYMBOL_GPL(__clk_is_enabled);
|
|
|
|
static bool mux_is_better_rate(unsigned long rate, unsigned long now,
|
|
unsigned long best, unsigned long flags)
|
|
{
|
|
if (flags & CLK_MUX_ROUND_CLOSEST)
|
|
return abs(now - rate) < abs(best - rate);
|
|
|
|
return now <= rate && now > best;
|
|
}
|
|
|
|
int clk_mux_determine_rate_flags(struct clk_hw *hw,
|
|
struct clk_rate_request *req,
|
|
unsigned long flags)
|
|
{
|
|
struct clk_core *core = hw->core, *parent, *best_parent = NULL;
|
|
int i, num_parents, ret;
|
|
unsigned long best = 0;
|
|
struct clk_rate_request parent_req = *req;
|
|
|
|
/* if NO_REPARENT flag set, pass through to current parent */
|
|
if (core->flags & CLK_SET_RATE_NO_REPARENT) {
|
|
parent = core->parent;
|
|
if (core->flags & CLK_SET_RATE_PARENT) {
|
|
ret = __clk_determine_rate(parent ? parent->hw : NULL,
|
|
&parent_req);
|
|
if (ret)
|
|
return ret;
|
|
|
|
best = parent_req.rate;
|
|
} else if (parent) {
|
|
best = clk_core_get_rate_nolock(parent);
|
|
} else {
|
|
best = clk_core_get_rate_nolock(core);
|
|
}
|
|
|
|
goto out;
|
|
}
|
|
|
|
/* find the parent that can provide the fastest rate <= rate */
|
|
num_parents = core->num_parents;
|
|
for (i = 0; i < num_parents; i++) {
|
|
parent = clk_core_get_parent_by_index(core, i);
|
|
if (!parent)
|
|
continue;
|
|
|
|
if (core->flags & CLK_SET_RATE_PARENT) {
|
|
parent_req = *req;
|
|
ret = __clk_determine_rate(parent->hw, &parent_req);
|
|
if (ret)
|
|
continue;
|
|
} else {
|
|
parent_req.rate = clk_core_get_rate_nolock(parent);
|
|
}
|
|
|
|
if (mux_is_better_rate(req->rate, parent_req.rate,
|
|
best, flags)) {
|
|
best_parent = parent;
|
|
best = parent_req.rate;
|
|
}
|
|
}
|
|
|
|
if (!best_parent)
|
|
return -EINVAL;
|
|
|
|
out:
|
|
if (best_parent)
|
|
req->best_parent_hw = best_parent->hw;
|
|
req->best_parent_rate = best;
|
|
req->rate = best;
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags);
|
|
|
|
struct clk *__clk_lookup(const char *name)
|
|
{
|
|
struct clk_core *core = clk_core_lookup(name);
|
|
|
|
return !core ? NULL : core->hw->clk;
|
|
}
|
|
|
|
static void clk_core_get_boundaries(struct clk_core *core,
|
|
unsigned long *min_rate,
|
|
unsigned long *max_rate)
|
|
{
|
|
struct clk *clk_user;
|
|
|
|
*min_rate = core->min_rate;
|
|
*max_rate = core->max_rate;
|
|
|
|
hlist_for_each_entry(clk_user, &core->clks, clks_node)
|
|
*min_rate = max(*min_rate, clk_user->min_rate);
|
|
|
|
hlist_for_each_entry(clk_user, &core->clks, clks_node)
|
|
*max_rate = min(*max_rate, clk_user->max_rate);
|
|
}
|
|
|
|
void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
|
|
unsigned long max_rate)
|
|
{
|
|
hw->core->min_rate = min_rate;
|
|
hw->core->max_rate = max_rate;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
|
|
|
|
/*
|
|
* Helper for finding best parent to provide a given frequency. This can be used
|
|
* directly as a determine_rate callback (e.g. for a mux), or from a more
|
|
* complex clock that may combine a mux with other operations.
|
|
*/
|
|
int __clk_mux_determine_rate(struct clk_hw *hw,
|
|
struct clk_rate_request *req)
|
|
{
|
|
return clk_mux_determine_rate_flags(hw, req, 0);
|
|
}
|
|
EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
|
|
|
|
int __clk_mux_determine_rate_closest(struct clk_hw *hw,
|
|
struct clk_rate_request *req)
|
|
{
|
|
return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
|
|
}
|
|
EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
|
|
|
|
/*** clk api ***/
|
|
|
|
static void clk_core_rate_unprotect(struct clk_core *core)
|
|
{
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core)
|
|
return;
|
|
|
|
if (WARN(core->protect_count == 0,
|
|
"%s already unprotected\n", core->name))
|
|
return;
|
|
|
|
if (--core->protect_count > 0)
|
|
return;
|
|
|
|
clk_core_rate_unprotect(core->parent);
|
|
}
|
|
|
|
static int clk_core_rate_nuke_protect(struct clk_core *core)
|
|
{
|
|
int ret;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core)
|
|
return -EINVAL;
|
|
|
|
if (core->protect_count == 0)
|
|
return 0;
|
|
|
|
ret = core->protect_count;
|
|
core->protect_count = 1;
|
|
clk_core_rate_unprotect(core);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* clk_rate_exclusive_put - release exclusivity over clock rate control
|
|
* @clk: the clk over which the exclusivity is released
|
|
*
|
|
* clk_rate_exclusive_put() completes a critical section during which a clock
|
|
* consumer cannot tolerate any other consumer making any operation on the
|
|
* clock which could result in a rate change or rate glitch. Exclusive clocks
|
|
* cannot have their rate changed, either directly or indirectly due to changes
|
|
* further up the parent chain of clocks. As a result, clocks up parent chain
|
|
* also get under exclusive control of the calling consumer.
|
|
*
|
|
* If exlusivity is claimed more than once on clock, even by the same consumer,
|
|
* the rate effectively gets locked as exclusivity can't be preempted.
|
|
*
|
|
* Calls to clk_rate_exclusive_put() must be balanced with calls to
|
|
* clk_rate_exclusive_get(). Calls to this function may sleep, and do not return
|
|
* error status.
|
|
*/
|
|
void clk_rate_exclusive_put(struct clk *clk)
|
|
{
|
|
if (!clk)
|
|
return;
|
|
|
|
clk_prepare_lock();
|
|
|
|
/*
|
|
* if there is something wrong with this consumer protect count, stop
|
|
* here before messing with the provider
|
|
*/
|
|
if (WARN_ON(clk->exclusive_count <= 0))
|
|
goto out;
|
|
|
|
clk_core_rate_unprotect(clk->core);
|
|
clk->exclusive_count--;
|
|
out:
|
|
clk_prepare_unlock();
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_rate_exclusive_put);
|
|
|
|
static void clk_core_rate_protect(struct clk_core *core)
|
|
{
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core)
|
|
return;
|
|
|
|
if (core->protect_count == 0)
|
|
clk_core_rate_protect(core->parent);
|
|
|
|
core->protect_count++;
|
|
}
|
|
|
|
static void clk_core_rate_restore_protect(struct clk_core *core, int count)
|
|
{
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core)
|
|
return;
|
|
|
|
if (count == 0)
|
|
return;
|
|
|
|
clk_core_rate_protect(core);
|
|
core->protect_count = count;
|
|
}
|
|
|
|
/**
|
|
* clk_rate_exclusive_get - get exclusivity over the clk rate control
|
|
* @clk: the clk over which the exclusity of rate control is requested
|
|
*
|
|
* clk_rate_exlusive_get() begins a critical section during which a clock
|
|
* consumer cannot tolerate any other consumer making any operation on the
|
|
* clock which could result in a rate change or rate glitch. Exclusive clocks
|
|
* cannot have their rate changed, either directly or indirectly due to changes
|
|
* further up the parent chain of clocks. As a result, clocks up parent chain
|
|
* also get under exclusive control of the calling consumer.
|
|
*
|
|
* If exlusivity is claimed more than once on clock, even by the same consumer,
|
|
* the rate effectively gets locked as exclusivity can't be preempted.
|
|
*
|
|
* Calls to clk_rate_exclusive_get() should be balanced with calls to
|
|
* clk_rate_exclusive_put(). Calls to this function may sleep.
|
|
* Returns 0 on success, -EERROR otherwise
|
|
*/
|
|
int clk_rate_exclusive_get(struct clk *clk)
|
|
{
|
|
if (!clk)
|
|
return 0;
|
|
|
|
clk_prepare_lock();
|
|
clk_core_rate_protect(clk->core);
|
|
clk->exclusive_count++;
|
|
clk_prepare_unlock();
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_rate_exclusive_get);
|
|
|
|
static void clk_core_unprepare(struct clk_core *core)
|
|
{
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core)
|
|
return;
|
|
|
|
if (WARN(core->prepare_count == 0,
|
|
"%s already unprepared\n", core->name))
|
|
return;
|
|
|
|
if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
|
|
"Unpreparing critical %s\n", core->name))
|
|
return;
|
|
|
|
if (core->flags & CLK_SET_RATE_GATE)
|
|
clk_core_rate_unprotect(core);
|
|
|
|
if (--core->prepare_count > 0)
|
|
return;
|
|
|
|
WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
|
|
|
|
trace_clk_unprepare(core);
|
|
|
|
if (core->ops->unprepare)
|
|
core->ops->unprepare(core->hw);
|
|
|
|
clk_pm_runtime_put(core);
|
|
|
|
trace_clk_unprepare_complete(core);
|
|
clk_core_unprepare(core->parent);
|
|
}
|
|
|
|
static void clk_core_unprepare_lock(struct clk_core *core)
|
|
{
|
|
clk_prepare_lock();
|
|
clk_core_unprepare(core);
|
|
clk_prepare_unlock();
|
|
}
|
|
|
|
/**
|
|
* clk_unprepare - undo preparation of a clock source
|
|
* @clk: the clk being unprepared
|
|
*
|
|
* clk_unprepare may sleep, which differentiates it from clk_disable. In a
|
|
* simple case, clk_unprepare can be used instead of clk_disable to gate a clk
|
|
* if the operation may sleep. One example is a clk which is accessed over
|
|
* I2c. In the complex case a clk gate operation may require a fast and a slow
|
|
* part. It is this reason that clk_unprepare and clk_disable are not mutually
|
|
* exclusive. In fact clk_disable must be called before clk_unprepare.
|
|
*/
|
|
void clk_unprepare(struct clk *clk)
|
|
{
|
|
if (IS_ERR_OR_NULL(clk))
|
|
return;
|
|
|
|
clk_core_unprepare_lock(clk->core);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_unprepare);
|
|
|
|
static int clk_core_prepare(struct clk_core *core)
|
|
{
|
|
int ret = 0;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core)
|
|
return 0;
|
|
|
|
if (core->prepare_count == 0) {
|
|
ret = clk_pm_runtime_get(core);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = clk_core_prepare(core->parent);
|
|
if (ret)
|
|
goto runtime_put;
|
|
|
|
trace_clk_prepare(core);
|
|
|
|
if (core->ops->prepare)
|
|
ret = core->ops->prepare(core->hw);
|
|
|
|
trace_clk_prepare_complete(core);
|
|
|
|
if (ret)
|
|
goto unprepare;
|
|
}
|
|
|
|
core->prepare_count++;
|
|
|
|
/*
|
|
* CLK_SET_RATE_GATE is a special case of clock protection
|
|
* Instead of a consumer claiming exclusive rate control, it is
|
|
* actually the provider which prevents any consumer from making any
|
|
* operation which could result in a rate change or rate glitch while
|
|
* the clock is prepared.
|
|
*/
|
|
if (core->flags & CLK_SET_RATE_GATE)
|
|
clk_core_rate_protect(core);
|
|
|
|
return 0;
|
|
unprepare:
|
|
clk_core_unprepare(core->parent);
|
|
runtime_put:
|
|
clk_pm_runtime_put(core);
|
|
return ret;
|
|
}
|
|
|
|
static int clk_core_prepare_lock(struct clk_core *core)
|
|
{
|
|
int ret;
|
|
|
|
clk_prepare_lock();
|
|
ret = clk_core_prepare(core);
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* clk_prepare - prepare a clock source
|
|
* @clk: the clk being prepared
|
|
*
|
|
* clk_prepare may sleep, which differentiates it from clk_enable. In a simple
|
|
* case, clk_prepare can be used instead of clk_enable to ungate a clk if the
|
|
* operation may sleep. One example is a clk which is accessed over I2c. In
|
|
* the complex case a clk ungate operation may require a fast and a slow part.
|
|
* It is this reason that clk_prepare and clk_enable are not mutually
|
|
* exclusive. In fact clk_prepare must be called before clk_enable.
|
|
* Returns 0 on success, -EERROR otherwise.
|
|
*/
|
|
int clk_prepare(struct clk *clk)
|
|
{
|
|
if (!clk)
|
|
return 0;
|
|
|
|
return clk_core_prepare_lock(clk->core);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_prepare);
|
|
|
|
static void clk_core_disable(struct clk_core *core)
|
|
{
|
|
lockdep_assert_held(&enable_lock);
|
|
|
|
if (!core)
|
|
return;
|
|
|
|
if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
|
|
return;
|
|
|
|
if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
|
|
"Disabling critical %s\n", core->name))
|
|
return;
|
|
|
|
if (--core->enable_count > 0)
|
|
return;
|
|
|
|
trace_clk_disable_rcuidle(core);
|
|
|
|
if (core->ops->disable)
|
|
core->ops->disable(core->hw);
|
|
|
|
trace_clk_disable_complete_rcuidle(core);
|
|
|
|
clk_core_disable(core->parent);
|
|
}
|
|
|
|
static void clk_core_disable_lock(struct clk_core *core)
|
|
{
|
|
unsigned long flags;
|
|
|
|
flags = clk_enable_lock();
|
|
clk_core_disable(core);
|
|
clk_enable_unlock(flags);
|
|
}
|
|
|
|
/**
|
|
* clk_disable - gate a clock
|
|
* @clk: the clk being gated
|
|
*
|
|
* clk_disable must not sleep, which differentiates it from clk_unprepare. In
|
|
* a simple case, clk_disable can be used instead of clk_unprepare to gate a
|
|
* clk if the operation is fast and will never sleep. One example is a
|
|
* SoC-internal clk which is controlled via simple register writes. In the
|
|
* complex case a clk gate operation may require a fast and a slow part. It is
|
|
* this reason that clk_unprepare and clk_disable are not mutually exclusive.
|
|
* In fact clk_disable must be called before clk_unprepare.
|
|
*/
|
|
void clk_disable(struct clk *clk)
|
|
{
|
|
if (IS_ERR_OR_NULL(clk))
|
|
return;
|
|
|
|
clk_core_disable_lock(clk->core);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_disable);
|
|
|
|
static int clk_core_enable(struct clk_core *core)
|
|
{
|
|
int ret = 0;
|
|
|
|
lockdep_assert_held(&enable_lock);
|
|
|
|
if (!core)
|
|
return 0;
|
|
|
|
if (WARN(core->prepare_count == 0,
|
|
"Enabling unprepared %s\n", core->name))
|
|
return -ESHUTDOWN;
|
|
|
|
if (core->enable_count == 0) {
|
|
ret = clk_core_enable(core->parent);
|
|
|
|
if (ret)
|
|
return ret;
|
|
|
|
trace_clk_enable_rcuidle(core);
|
|
|
|
if (core->ops->enable)
|
|
ret = core->ops->enable(core->hw);
|
|
|
|
trace_clk_enable_complete_rcuidle(core);
|
|
|
|
if (ret) {
|
|
clk_core_disable(core->parent);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
core->enable_count++;
|
|
return 0;
|
|
}
|
|
|
|
static int clk_core_enable_lock(struct clk_core *core)
|
|
{
|
|
unsigned long flags;
|
|
int ret;
|
|
|
|
flags = clk_enable_lock();
|
|
ret = clk_core_enable(core);
|
|
clk_enable_unlock(flags);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* clk_enable - ungate a clock
|
|
* @clk: the clk being ungated
|
|
*
|
|
* clk_enable must not sleep, which differentiates it from clk_prepare. In a
|
|
* simple case, clk_enable can be used instead of clk_prepare to ungate a clk
|
|
* if the operation will never sleep. One example is a SoC-internal clk which
|
|
* is controlled via simple register writes. In the complex case a clk ungate
|
|
* operation may require a fast and a slow part. It is this reason that
|
|
* clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
|
|
* must be called before clk_enable. Returns 0 on success, -EERROR
|
|
* otherwise.
|
|
*/
|
|
int clk_enable(struct clk *clk)
|
|
{
|
|
if (!clk)
|
|
return 0;
|
|
|
|
return clk_core_enable_lock(clk->core);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_enable);
|
|
|
|
static int clk_core_prepare_enable(struct clk_core *core)
|
|
{
|
|
int ret;
|
|
|
|
ret = clk_core_prepare_lock(core);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = clk_core_enable_lock(core);
|
|
if (ret)
|
|
clk_core_unprepare_lock(core);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void clk_core_disable_unprepare(struct clk_core *core)
|
|
{
|
|
clk_core_disable_lock(core);
|
|
clk_core_unprepare_lock(core);
|
|
}
|
|
|
|
static void clk_unprepare_unused_subtree(struct clk_core *core)
|
|
{
|
|
struct clk_core *child;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
hlist_for_each_entry(child, &core->children, child_node)
|
|
clk_unprepare_unused_subtree(child);
|
|
|
|
if (core->prepare_count)
|
|
return;
|
|
|
|
if (core->flags & CLK_IGNORE_UNUSED)
|
|
return;
|
|
|
|
if (clk_pm_runtime_get(core))
|
|
return;
|
|
|
|
if (clk_core_is_prepared(core)) {
|
|
trace_clk_unprepare(core);
|
|
if (core->ops->unprepare_unused)
|
|
core->ops->unprepare_unused(core->hw);
|
|
else if (core->ops->unprepare)
|
|
core->ops->unprepare(core->hw);
|
|
trace_clk_unprepare_complete(core);
|
|
}
|
|
|
|
clk_pm_runtime_put(core);
|
|
}
|
|
|
|
static void clk_disable_unused_subtree(struct clk_core *core)
|
|
{
|
|
struct clk_core *child;
|
|
unsigned long flags;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
hlist_for_each_entry(child, &core->children, child_node)
|
|
clk_disable_unused_subtree(child);
|
|
|
|
if (core->flags & CLK_OPS_PARENT_ENABLE)
|
|
clk_core_prepare_enable(core->parent);
|
|
|
|
if (clk_pm_runtime_get(core))
|
|
goto unprepare_out;
|
|
|
|
flags = clk_enable_lock();
|
|
|
|
if (core->enable_count)
|
|
goto unlock_out;
|
|
|
|
if (core->flags & CLK_IGNORE_UNUSED)
|
|
goto unlock_out;
|
|
|
|
/*
|
|
* some gate clocks have special needs during the disable-unused
|
|
* sequence. call .disable_unused if available, otherwise fall
|
|
* back to .disable
|
|
*/
|
|
if (clk_core_is_enabled(core)) {
|
|
trace_clk_disable(core);
|
|
if (core->ops->disable_unused)
|
|
core->ops->disable_unused(core->hw);
|
|
else if (core->ops->disable)
|
|
core->ops->disable(core->hw);
|
|
trace_clk_disable_complete(core);
|
|
}
|
|
|
|
unlock_out:
|
|
clk_enable_unlock(flags);
|
|
clk_pm_runtime_put(core);
|
|
unprepare_out:
|
|
if (core->flags & CLK_OPS_PARENT_ENABLE)
|
|
clk_core_disable_unprepare(core->parent);
|
|
}
|
|
|
|
static bool clk_ignore_unused;
|
|
static int __init clk_ignore_unused_setup(char *__unused)
|
|
{
|
|
clk_ignore_unused = true;
|
|
return 1;
|
|
}
|
|
__setup("clk_ignore_unused", clk_ignore_unused_setup);
|
|
|
|
static int clk_disable_unused(void)
|
|
{
|
|
struct clk_core *core;
|
|
|
|
if (clk_ignore_unused) {
|
|
pr_warn("clk: Not disabling unused clocks\n");
|
|
return 0;
|
|
}
|
|
|
|
clk_prepare_lock();
|
|
|
|
hlist_for_each_entry(core, &clk_root_list, child_node)
|
|
clk_disable_unused_subtree(core);
|
|
|
|
hlist_for_each_entry(core, &clk_orphan_list, child_node)
|
|
clk_disable_unused_subtree(core);
|
|
|
|
hlist_for_each_entry(core, &clk_root_list, child_node)
|
|
clk_unprepare_unused_subtree(core);
|
|
|
|
hlist_for_each_entry(core, &clk_orphan_list, child_node)
|
|
clk_unprepare_unused_subtree(core);
|
|
|
|
clk_prepare_unlock();
|
|
|
|
return 0;
|
|
}
|
|
late_initcall_sync(clk_disable_unused);
|
|
|
|
static int clk_core_determine_round_nolock(struct clk_core *core,
|
|
struct clk_rate_request *req)
|
|
{
|
|
long rate;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core)
|
|
return 0;
|
|
|
|
/*
|
|
* At this point, core protection will be disabled if
|
|
* - if the provider is not protected at all
|
|
* - if the calling consumer is the only one which has exclusivity
|
|
* over the provider
|
|
*/
|
|
if (clk_core_rate_is_protected(core)) {
|
|
req->rate = core->rate;
|
|
} else if (core->ops->determine_rate) {
|
|
return core->ops->determine_rate(core->hw, req);
|
|
} else if (core->ops->round_rate) {
|
|
rate = core->ops->round_rate(core->hw, req->rate,
|
|
&req->best_parent_rate);
|
|
if (rate < 0)
|
|
return rate;
|
|
|
|
req->rate = rate;
|
|
} else {
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void clk_core_init_rate_req(struct clk_core * const core,
|
|
struct clk_rate_request *req)
|
|
{
|
|
struct clk_core *parent;
|
|
|
|
if (WARN_ON(!core || !req))
|
|
return;
|
|
|
|
parent = core->parent;
|
|
if (parent) {
|
|
req->best_parent_hw = parent->hw;
|
|
req->best_parent_rate = parent->rate;
|
|
} else {
|
|
req->best_parent_hw = NULL;
|
|
req->best_parent_rate = 0;
|
|
}
|
|
}
|
|
|
|
static bool clk_core_can_round(struct clk_core * const core)
|
|
{
|
|
if (core->ops->determine_rate || core->ops->round_rate)
|
|
return true;
|
|
|
|
return false;
|
|
}
|
|
|
|
static int clk_core_round_rate_nolock(struct clk_core *core,
|
|
struct clk_rate_request *req)
|
|
{
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core) {
|
|
req->rate = 0;
|
|
return 0;
|
|
}
|
|
|
|
clk_core_init_rate_req(core, req);
|
|
|
|
if (clk_core_can_round(core))
|
|
return clk_core_determine_round_nolock(core, req);
|
|
else if (core->flags & CLK_SET_RATE_PARENT)
|
|
return clk_core_round_rate_nolock(core->parent, req);
|
|
|
|
req->rate = core->rate;
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* __clk_determine_rate - get the closest rate actually supported by a clock
|
|
* @hw: determine the rate of this clock
|
|
* @req: target rate request
|
|
*
|
|
* Useful for clk_ops such as .set_rate and .determine_rate.
|
|
*/
|
|
int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
|
|
{
|
|
if (!hw) {
|
|
req->rate = 0;
|
|
return 0;
|
|
}
|
|
|
|
return clk_core_round_rate_nolock(hw->core, req);
|
|
}
|
|
EXPORT_SYMBOL_GPL(__clk_determine_rate);
|
|
|
|
unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
|
|
{
|
|
int ret;
|
|
struct clk_rate_request req;
|
|
|
|
clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
|
|
req.rate = rate;
|
|
|
|
ret = clk_core_round_rate_nolock(hw->core, &req);
|
|
if (ret)
|
|
return 0;
|
|
|
|
return req.rate;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_hw_round_rate);
|
|
|
|
/**
|
|
* clk_round_rate - round the given rate for a clk
|
|
* @clk: the clk for which we are rounding a rate
|
|
* @rate: the rate which is to be rounded
|
|
*
|
|
* Takes in a rate as input and rounds it to a rate that the clk can actually
|
|
* use which is then returned. If clk doesn't support round_rate operation
|
|
* then the parent rate is returned.
|
|
*/
|
|
long clk_round_rate(struct clk *clk, unsigned long rate)
|
|
{
|
|
struct clk_rate_request req;
|
|
int ret;
|
|
|
|
if (!clk)
|
|
return 0;
|
|
|
|
clk_prepare_lock();
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_unprotect(clk->core);
|
|
|
|
clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
|
|
req.rate = rate;
|
|
|
|
ret = clk_core_round_rate_nolock(clk->core, &req);
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_protect(clk->core);
|
|
|
|
clk_prepare_unlock();
|
|
|
|
if (ret)
|
|
return ret;
|
|
|
|
return req.rate;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_round_rate);
|
|
|
|
/**
|
|
* __clk_notify - call clk notifier chain
|
|
* @core: clk that is changing rate
|
|
* @msg: clk notifier type (see include/linux/clk.h)
|
|
* @old_rate: old clk rate
|
|
* @new_rate: new clk rate
|
|
*
|
|
* Triggers a notifier call chain on the clk rate-change notification
|
|
* for 'clk'. Passes a pointer to the struct clk and the previous
|
|
* and current rates to the notifier callback. Intended to be called by
|
|
* internal clock code only. Returns NOTIFY_DONE from the last driver
|
|
* called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
|
|
* a driver returns that.
|
|
*/
|
|
static int __clk_notify(struct clk_core *core, unsigned long msg,
|
|
unsigned long old_rate, unsigned long new_rate)
|
|
{
|
|
struct clk_notifier *cn;
|
|
struct clk_notifier_data cnd;
|
|
int ret = NOTIFY_DONE;
|
|
|
|
cnd.old_rate = old_rate;
|
|
cnd.new_rate = new_rate;
|
|
|
|
list_for_each_entry(cn, &clk_notifier_list, node) {
|
|
if (cn->clk->core == core) {
|
|
cnd.clk = cn->clk;
|
|
ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
|
|
&cnd);
|
|
if (ret & NOTIFY_STOP_MASK)
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* __clk_recalc_accuracies
|
|
* @core: first clk in the subtree
|
|
*
|
|
* Walks the subtree of clks starting with clk and recalculates accuracies as
|
|
* it goes. Note that if a clk does not implement the .recalc_accuracy
|
|
* callback then it is assumed that the clock will take on the accuracy of its
|
|
* parent.
|
|
*/
|
|
static void __clk_recalc_accuracies(struct clk_core *core)
|
|
{
|
|
unsigned long parent_accuracy = 0;
|
|
struct clk_core *child;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (core->parent)
|
|
parent_accuracy = core->parent->accuracy;
|
|
|
|
if (core->ops->recalc_accuracy)
|
|
core->accuracy = core->ops->recalc_accuracy(core->hw,
|
|
parent_accuracy);
|
|
else
|
|
core->accuracy = parent_accuracy;
|
|
|
|
hlist_for_each_entry(child, &core->children, child_node)
|
|
__clk_recalc_accuracies(child);
|
|
}
|
|
|
|
static long clk_core_get_accuracy(struct clk_core *core)
|
|
{
|
|
unsigned long accuracy;
|
|
|
|
clk_prepare_lock();
|
|
if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
|
|
__clk_recalc_accuracies(core);
|
|
|
|
accuracy = __clk_get_accuracy(core);
|
|
clk_prepare_unlock();
|
|
|
|
return accuracy;
|
|
}
|
|
|
|
/**
|
|
* clk_get_accuracy - return the accuracy of clk
|
|
* @clk: the clk whose accuracy is being returned
|
|
*
|
|
* Simply returns the cached accuracy of the clk, unless
|
|
* CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
|
|
* issued.
|
|
* If clk is NULL then returns 0.
|
|
*/
|
|
long clk_get_accuracy(struct clk *clk)
|
|
{
|
|
if (!clk)
|
|
return 0;
|
|
|
|
return clk_core_get_accuracy(clk->core);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_get_accuracy);
|
|
|
|
static unsigned long clk_recalc(struct clk_core *core,
|
|
unsigned long parent_rate)
|
|
{
|
|
unsigned long rate = parent_rate;
|
|
|
|
if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
|
|
rate = core->ops->recalc_rate(core->hw, parent_rate);
|
|
clk_pm_runtime_put(core);
|
|
}
|
|
return rate;
|
|
}
|
|
|
|
/**
|
|
* __clk_recalc_rates
|
|
* @core: first clk in the subtree
|
|
* @msg: notification type (see include/linux/clk.h)
|
|
*
|
|
* Walks the subtree of clks starting with clk and recalculates rates as it
|
|
* goes. Note that if a clk does not implement the .recalc_rate callback then
|
|
* it is assumed that the clock will take on the rate of its parent.
|
|
*
|
|
* clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
|
|
* if necessary.
|
|
*/
|
|
static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
|
|
{
|
|
unsigned long old_rate;
|
|
unsigned long parent_rate = 0;
|
|
struct clk_core *child;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
old_rate = core->rate;
|
|
|
|
if (core->parent)
|
|
parent_rate = core->parent->rate;
|
|
|
|
core->rate = clk_recalc(core, parent_rate);
|
|
|
|
/*
|
|
* ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
|
|
* & ABORT_RATE_CHANGE notifiers
|
|
*/
|
|
if (core->notifier_count && msg)
|
|
__clk_notify(core, msg, old_rate, core->rate);
|
|
|
|
hlist_for_each_entry(child, &core->children, child_node)
|
|
__clk_recalc_rates(child, msg);
|
|
}
|
|
|
|
static unsigned long clk_core_get_rate(struct clk_core *core)
|
|
{
|
|
unsigned long rate;
|
|
|
|
clk_prepare_lock();
|
|
|
|
if (core && (core->flags & CLK_GET_RATE_NOCACHE))
|
|
__clk_recalc_rates(core, 0);
|
|
|
|
rate = clk_core_get_rate_nolock(core);
|
|
clk_prepare_unlock();
|
|
|
|
return rate;
|
|
}
|
|
|
|
/**
|
|
* clk_get_rate - return the rate of clk
|
|
* @clk: the clk whose rate is being returned
|
|
*
|
|
* Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
|
|
* is set, which means a recalc_rate will be issued.
|
|
* If clk is NULL then returns 0.
|
|
*/
|
|
unsigned long clk_get_rate(struct clk *clk)
|
|
{
|
|
if (!clk)
|
|
return 0;
|
|
|
|
return clk_core_get_rate(clk->core);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_get_rate);
|
|
|
|
static int clk_fetch_parent_index(struct clk_core *core,
|
|
struct clk_core *parent)
|
|
{
|
|
int i;
|
|
|
|
if (!parent)
|
|
return -EINVAL;
|
|
|
|
for (i = 0; i < core->num_parents; i++)
|
|
if (clk_core_get_parent_by_index(core, i) == parent)
|
|
return i;
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
/*
|
|
* Update the orphan status of @core and all its children.
|
|
*/
|
|
static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
|
|
{
|
|
struct clk_core *child;
|
|
|
|
core->orphan = is_orphan;
|
|
|
|
hlist_for_each_entry(child, &core->children, child_node)
|
|
clk_core_update_orphan_status(child, is_orphan);
|
|
}
|
|
|
|
static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
|
|
{
|
|
bool was_orphan = core->orphan;
|
|
|
|
hlist_del(&core->child_node);
|
|
|
|
if (new_parent) {
|
|
bool becomes_orphan = new_parent->orphan;
|
|
|
|
/* avoid duplicate POST_RATE_CHANGE notifications */
|
|
if (new_parent->new_child == core)
|
|
new_parent->new_child = NULL;
|
|
|
|
hlist_add_head(&core->child_node, &new_parent->children);
|
|
|
|
if (was_orphan != becomes_orphan)
|
|
clk_core_update_orphan_status(core, becomes_orphan);
|
|
} else {
|
|
hlist_add_head(&core->child_node, &clk_orphan_list);
|
|
if (!was_orphan)
|
|
clk_core_update_orphan_status(core, true);
|
|
}
|
|
|
|
core->parent = new_parent;
|
|
}
|
|
|
|
static struct clk_core *__clk_set_parent_before(struct clk_core *core,
|
|
struct clk_core *parent)
|
|
{
|
|
unsigned long flags;
|
|
struct clk_core *old_parent = core->parent;
|
|
|
|
/*
|
|
* 1. enable parents for CLK_OPS_PARENT_ENABLE clock
|
|
*
|
|
* 2. Migrate prepare state between parents and prevent race with
|
|
* clk_enable().
|
|
*
|
|
* If the clock is not prepared, then a race with
|
|
* clk_enable/disable() is impossible since we already have the
|
|
* prepare lock (future calls to clk_enable() need to be preceded by
|
|
* a clk_prepare()).
|
|
*
|
|
* If the clock is prepared, migrate the prepared state to the new
|
|
* parent and also protect against a race with clk_enable() by
|
|
* forcing the clock and the new parent on. This ensures that all
|
|
* future calls to clk_enable() are practically NOPs with respect to
|
|
* hardware and software states.
|
|
*
|
|
* See also: Comment for clk_set_parent() below.
|
|
*/
|
|
|
|
/* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */
|
|
if (core->flags & CLK_OPS_PARENT_ENABLE) {
|
|
clk_core_prepare_enable(old_parent);
|
|
clk_core_prepare_enable(parent);
|
|
}
|
|
|
|
/* migrate prepare count if > 0 */
|
|
if (core->prepare_count) {
|
|
clk_core_prepare_enable(parent);
|
|
clk_core_enable_lock(core);
|
|
}
|
|
|
|
/* update the clk tree topology */
|
|
flags = clk_enable_lock();
|
|
clk_reparent(core, parent);
|
|
clk_enable_unlock(flags);
|
|
|
|
return old_parent;
|
|
}
|
|
|
|
static void __clk_set_parent_after(struct clk_core *core,
|
|
struct clk_core *parent,
|
|
struct clk_core *old_parent)
|
|
{
|
|
/*
|
|
* Finish the migration of prepare state and undo the changes done
|
|
* for preventing a race with clk_enable().
|
|
*/
|
|
if (core->prepare_count) {
|
|
clk_core_disable_lock(core);
|
|
clk_core_disable_unprepare(old_parent);
|
|
}
|
|
|
|
/* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
|
|
if (core->flags & CLK_OPS_PARENT_ENABLE) {
|
|
clk_core_disable_unprepare(parent);
|
|
clk_core_disable_unprepare(old_parent);
|
|
}
|
|
}
|
|
|
|
static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
|
|
u8 p_index)
|
|
{
|
|
unsigned long flags;
|
|
int ret = 0;
|
|
struct clk_core *old_parent;
|
|
|
|
old_parent = __clk_set_parent_before(core, parent);
|
|
|
|
trace_clk_set_parent(core, parent);
|
|
|
|
/* change clock input source */
|
|
if (parent && core->ops->set_parent)
|
|
ret = core->ops->set_parent(core->hw, p_index);
|
|
|
|
trace_clk_set_parent_complete(core, parent);
|
|
|
|
if (ret) {
|
|
flags = clk_enable_lock();
|
|
clk_reparent(core, old_parent);
|
|
clk_enable_unlock(flags);
|
|
__clk_set_parent_after(core, old_parent, parent);
|
|
|
|
return ret;
|
|
}
|
|
|
|
__clk_set_parent_after(core, parent, old_parent);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* __clk_speculate_rates
|
|
* @core: first clk in the subtree
|
|
* @parent_rate: the "future" rate of clk's parent
|
|
*
|
|
* Walks the subtree of clks starting with clk, speculating rates as it
|
|
* goes and firing off PRE_RATE_CHANGE notifications as necessary.
|
|
*
|
|
* Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
|
|
* pre-rate change notifications and returns early if no clks in the
|
|
* subtree have subscribed to the notifications. Note that if a clk does not
|
|
* implement the .recalc_rate callback then it is assumed that the clock will
|
|
* take on the rate of its parent.
|
|
*/
|
|
static int __clk_speculate_rates(struct clk_core *core,
|
|
unsigned long parent_rate)
|
|
{
|
|
struct clk_core *child;
|
|
unsigned long new_rate;
|
|
int ret = NOTIFY_DONE;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
new_rate = clk_recalc(core, parent_rate);
|
|
|
|
/* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
|
|
if (core->notifier_count)
|
|
ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
|
|
|
|
if (ret & NOTIFY_STOP_MASK) {
|
|
pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
|
|
__func__, core->name, ret);
|
|
goto out;
|
|
}
|
|
|
|
hlist_for_each_entry(child, &core->children, child_node) {
|
|
ret = __clk_speculate_rates(child, new_rate);
|
|
if (ret & NOTIFY_STOP_MASK)
|
|
break;
|
|
}
|
|
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
|
|
struct clk_core *new_parent, u8 p_index)
|
|
{
|
|
struct clk_core *child;
|
|
|
|
core->new_rate = new_rate;
|
|
core->new_parent = new_parent;
|
|
core->new_parent_index = p_index;
|
|
/* include clk in new parent's PRE_RATE_CHANGE notifications */
|
|
core->new_child = NULL;
|
|
if (new_parent && new_parent != core->parent)
|
|
new_parent->new_child = core;
|
|
|
|
hlist_for_each_entry(child, &core->children, child_node) {
|
|
child->new_rate = clk_recalc(child, new_rate);
|
|
clk_calc_subtree(child, child->new_rate, NULL, 0);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* calculate the new rates returning the topmost clock that has to be
|
|
* changed.
|
|
*/
|
|
static struct clk_core *clk_calc_new_rates(struct clk_core *core,
|
|
unsigned long rate)
|
|
{
|
|
struct clk_core *top = core;
|
|
struct clk_core *old_parent, *parent;
|
|
unsigned long best_parent_rate = 0;
|
|
unsigned long new_rate;
|
|
unsigned long min_rate;
|
|
unsigned long max_rate;
|
|
int p_index = 0;
|
|
long ret;
|
|
|
|
/* sanity */
|
|
if (IS_ERR_OR_NULL(core))
|
|
return NULL;
|
|
|
|
/* save parent rate, if it exists */
|
|
parent = old_parent = core->parent;
|
|
if (parent)
|
|
best_parent_rate = parent->rate;
|
|
|
|
clk_core_get_boundaries(core, &min_rate, &max_rate);
|
|
|
|
/* find the closest rate and parent clk/rate */
|
|
if (clk_core_can_round(core)) {
|
|
struct clk_rate_request req;
|
|
|
|
req.rate = rate;
|
|
req.min_rate = min_rate;
|
|
req.max_rate = max_rate;
|
|
|
|
clk_core_init_rate_req(core, &req);
|
|
|
|
ret = clk_core_determine_round_nolock(core, &req);
|
|
if (ret < 0)
|
|
return NULL;
|
|
|
|
best_parent_rate = req.best_parent_rate;
|
|
new_rate = req.rate;
|
|
parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
|
|
|
|
if (new_rate < min_rate || new_rate > max_rate)
|
|
return NULL;
|
|
} else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
|
|
/* pass-through clock without adjustable parent */
|
|
core->new_rate = core->rate;
|
|
return NULL;
|
|
} else {
|
|
/* pass-through clock with adjustable parent */
|
|
top = clk_calc_new_rates(parent, rate);
|
|
new_rate = parent->new_rate;
|
|
goto out;
|
|
}
|
|
|
|
/* some clocks must be gated to change parent */
|
|
if (parent != old_parent &&
|
|
(core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
|
|
pr_debug("%s: %s not gated but wants to reparent\n",
|
|
__func__, core->name);
|
|
return NULL;
|
|
}
|
|
|
|
/* try finding the new parent index */
|
|
if (parent && core->num_parents > 1) {
|
|
p_index = clk_fetch_parent_index(core, parent);
|
|
if (p_index < 0) {
|
|
pr_debug("%s: clk %s can not be parent of clk %s\n",
|
|
__func__, parent->name, core->name);
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
|
|
best_parent_rate != parent->rate)
|
|
top = clk_calc_new_rates(parent, best_parent_rate);
|
|
|
|
out:
|
|
clk_calc_subtree(core, new_rate, parent, p_index);
|
|
|
|
return top;
|
|
}
|
|
|
|
/*
|
|
* Notify about rate changes in a subtree. Always walk down the whole tree
|
|
* so that in case of an error we can walk down the whole tree again and
|
|
* abort the change.
|
|
*/
|
|
static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
|
|
unsigned long event)
|
|
{
|
|
struct clk_core *child, *tmp_clk, *fail_clk = NULL;
|
|
int ret = NOTIFY_DONE;
|
|
|
|
if (core->rate == core->new_rate)
|
|
return NULL;
|
|
|
|
if (core->notifier_count) {
|
|
ret = __clk_notify(core, event, core->rate, core->new_rate);
|
|
if (ret & NOTIFY_STOP_MASK)
|
|
fail_clk = core;
|
|
}
|
|
|
|
hlist_for_each_entry(child, &core->children, child_node) {
|
|
/* Skip children who will be reparented to another clock */
|
|
if (child->new_parent && child->new_parent != core)
|
|
continue;
|
|
tmp_clk = clk_propagate_rate_change(child, event);
|
|
if (tmp_clk)
|
|
fail_clk = tmp_clk;
|
|
}
|
|
|
|
/* handle the new child who might not be in core->children yet */
|
|
if (core->new_child) {
|
|
tmp_clk = clk_propagate_rate_change(core->new_child, event);
|
|
if (tmp_clk)
|
|
fail_clk = tmp_clk;
|
|
}
|
|
|
|
return fail_clk;
|
|
}
|
|
|
|
/*
|
|
* walk down a subtree and set the new rates notifying the rate
|
|
* change on the way
|
|
*/
|
|
static void clk_change_rate(struct clk_core *core)
|
|
{
|
|
struct clk_core *child;
|
|
struct hlist_node *tmp;
|
|
unsigned long old_rate;
|
|
unsigned long best_parent_rate = 0;
|
|
bool skip_set_rate = false;
|
|
struct clk_core *old_parent;
|
|
struct clk_core *parent = NULL;
|
|
|
|
old_rate = core->rate;
|
|
|
|
if (core->new_parent) {
|
|
parent = core->new_parent;
|
|
best_parent_rate = core->new_parent->rate;
|
|
} else if (core->parent) {
|
|
parent = core->parent;
|
|
best_parent_rate = core->parent->rate;
|
|
}
|
|
|
|
if (clk_pm_runtime_get(core))
|
|
return;
|
|
|
|
if (core->flags & CLK_SET_RATE_UNGATE) {
|
|
unsigned long flags;
|
|
|
|
clk_core_prepare(core);
|
|
flags = clk_enable_lock();
|
|
clk_core_enable(core);
|
|
clk_enable_unlock(flags);
|
|
}
|
|
|
|
if (core->new_parent && core->new_parent != core->parent) {
|
|
old_parent = __clk_set_parent_before(core, core->new_parent);
|
|
trace_clk_set_parent(core, core->new_parent);
|
|
|
|
if (core->ops->set_rate_and_parent) {
|
|
skip_set_rate = true;
|
|
core->ops->set_rate_and_parent(core->hw, core->new_rate,
|
|
best_parent_rate,
|
|
core->new_parent_index);
|
|
} else if (core->ops->set_parent) {
|
|
core->ops->set_parent(core->hw, core->new_parent_index);
|
|
}
|
|
|
|
trace_clk_set_parent_complete(core, core->new_parent);
|
|
__clk_set_parent_after(core, core->new_parent, old_parent);
|
|
}
|
|
|
|
if (core->flags & CLK_OPS_PARENT_ENABLE)
|
|
clk_core_prepare_enable(parent);
|
|
|
|
trace_clk_set_rate(core, core->new_rate);
|
|
|
|
if (!skip_set_rate && core->ops->set_rate)
|
|
core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
|
|
|
|
trace_clk_set_rate_complete(core, core->new_rate);
|
|
|
|
core->rate = clk_recalc(core, best_parent_rate);
|
|
|
|
if (core->flags & CLK_SET_RATE_UNGATE) {
|
|
unsigned long flags;
|
|
|
|
flags = clk_enable_lock();
|
|
clk_core_disable(core);
|
|
clk_enable_unlock(flags);
|
|
clk_core_unprepare(core);
|
|
}
|
|
|
|
if (core->flags & CLK_OPS_PARENT_ENABLE)
|
|
clk_core_disable_unprepare(parent);
|
|
|
|
if (core->notifier_count && old_rate != core->rate)
|
|
__clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
|
|
|
|
if (core->flags & CLK_RECALC_NEW_RATES)
|
|
(void)clk_calc_new_rates(core, core->new_rate);
|
|
|
|
/*
|
|
* Use safe iteration, as change_rate can actually swap parents
|
|
* for certain clock types.
|
|
*/
|
|
hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
|
|
/* Skip children who will be reparented to another clock */
|
|
if (child->new_parent && child->new_parent != core)
|
|
continue;
|
|
clk_change_rate(child);
|
|
}
|
|
|
|
/* handle the new child who might not be in core->children yet */
|
|
if (core->new_child)
|
|
clk_change_rate(core->new_child);
|
|
|
|
clk_pm_runtime_put(core);
|
|
}
|
|
|
|
static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core,
|
|
unsigned long req_rate)
|
|
{
|
|
int ret, cnt;
|
|
struct clk_rate_request req;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core)
|
|
return 0;
|
|
|
|
/* simulate what the rate would be if it could be freely set */
|
|
cnt = clk_core_rate_nuke_protect(core);
|
|
if (cnt < 0)
|
|
return cnt;
|
|
|
|
clk_core_get_boundaries(core, &req.min_rate, &req.max_rate);
|
|
req.rate = req_rate;
|
|
|
|
ret = clk_core_round_rate_nolock(core, &req);
|
|
|
|
/* restore the protection */
|
|
clk_core_rate_restore_protect(core, cnt);
|
|
|
|
return ret ? 0 : req.rate;
|
|
}
|
|
|
|
static int clk_core_set_rate_nolock(struct clk_core *core,
|
|
unsigned long req_rate)
|
|
{
|
|
struct clk_core *top, *fail_clk;
|
|
unsigned long rate;
|
|
int ret = 0;
|
|
|
|
if (!core)
|
|
return 0;
|
|
|
|
rate = clk_core_req_round_rate_nolock(core, req_rate);
|
|
|
|
/* bail early if nothing to do */
|
|
if (rate == clk_core_get_rate_nolock(core))
|
|
return 0;
|
|
|
|
/* fail on a direct rate set of a protected provider */
|
|
if (clk_core_rate_is_protected(core))
|
|
return -EBUSY;
|
|
|
|
/* calculate new rates and get the topmost changed clock */
|
|
top = clk_calc_new_rates(core, req_rate);
|
|
if (!top)
|
|
return -EINVAL;
|
|
|
|
ret = clk_pm_runtime_get(core);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* notify that we are about to change rates */
|
|
fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
|
|
if (fail_clk) {
|
|
pr_debug("%s: failed to set %s rate\n", __func__,
|
|
fail_clk->name);
|
|
clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
|
|
ret = -EBUSY;
|
|
goto err;
|
|
}
|
|
|
|
/* change the rates */
|
|
clk_change_rate(top);
|
|
|
|
core->req_rate = req_rate;
|
|
err:
|
|
clk_pm_runtime_put(core);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* clk_set_rate - specify a new rate for clk
|
|
* @clk: the clk whose rate is being changed
|
|
* @rate: the new rate for clk
|
|
*
|
|
* In the simplest case clk_set_rate will only adjust the rate of clk.
|
|
*
|
|
* Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
|
|
* propagate up to clk's parent; whether or not this happens depends on the
|
|
* outcome of clk's .round_rate implementation. If *parent_rate is unchanged
|
|
* after calling .round_rate then upstream parent propagation is ignored. If
|
|
* *parent_rate comes back with a new rate for clk's parent then we propagate
|
|
* up to clk's parent and set its rate. Upward propagation will continue
|
|
* until either a clk does not support the CLK_SET_RATE_PARENT flag or
|
|
* .round_rate stops requesting changes to clk's parent_rate.
|
|
*
|
|
* Rate changes are accomplished via tree traversal that also recalculates the
|
|
* rates for the clocks and fires off POST_RATE_CHANGE notifiers.
|
|
*
|
|
* Returns 0 on success, -EERROR otherwise.
|
|
*/
|
|
int clk_set_rate(struct clk *clk, unsigned long rate)
|
|
{
|
|
int ret;
|
|
|
|
if (!clk)
|
|
return 0;
|
|
|
|
/* prevent racing with updates to the clock topology */
|
|
clk_prepare_lock();
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_unprotect(clk->core);
|
|
|
|
ret = clk_core_set_rate_nolock(clk->core, rate);
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_protect(clk->core);
|
|
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_set_rate);
|
|
|
|
/**
|
|
* clk_set_rate_exclusive - specify a new rate get exclusive control
|
|
* @clk: the clk whose rate is being changed
|
|
* @rate: the new rate for clk
|
|
*
|
|
* This is a combination of clk_set_rate() and clk_rate_exclusive_get()
|
|
* within a critical section
|
|
*
|
|
* This can be used initially to ensure that at least 1 consumer is
|
|
* statisfied when several consumers are competing for exclusivity over the
|
|
* same clock provider.
|
|
*
|
|
* The exclusivity is not applied if setting the rate failed.
|
|
*
|
|
* Calls to clk_rate_exclusive_get() should be balanced with calls to
|
|
* clk_rate_exclusive_put().
|
|
*
|
|
* Returns 0 on success, -EERROR otherwise.
|
|
*/
|
|
int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)
|
|
{
|
|
int ret;
|
|
|
|
if (!clk)
|
|
return 0;
|
|
|
|
/* prevent racing with updates to the clock topology */
|
|
clk_prepare_lock();
|
|
|
|
/*
|
|
* The temporary protection removal is not here, on purpose
|
|
* This function is meant to be used instead of clk_rate_protect,
|
|
* so before the consumer code path protect the clock provider
|
|
*/
|
|
|
|
ret = clk_core_set_rate_nolock(clk->core, rate);
|
|
if (!ret) {
|
|
clk_core_rate_protect(clk->core);
|
|
clk->exclusive_count++;
|
|
}
|
|
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_set_rate_exclusive);
|
|
|
|
/**
|
|
* clk_set_rate_range - set a rate range for a clock source
|
|
* @clk: clock source
|
|
* @min: desired minimum clock rate in Hz, inclusive
|
|
* @max: desired maximum clock rate in Hz, inclusive
|
|
*
|
|
* Returns success (0) or negative errno.
|
|
*/
|
|
int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
|
|
{
|
|
int ret = 0;
|
|
unsigned long old_min, old_max, rate;
|
|
|
|
if (!clk)
|
|
return 0;
|
|
|
|
if (min > max) {
|
|
pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
|
|
__func__, clk->core->name, clk->dev_id, clk->con_id,
|
|
min, max);
|
|
return -EINVAL;
|
|
}
|
|
|
|
clk_prepare_lock();
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_unprotect(clk->core);
|
|
|
|
/* Save the current values in case we need to rollback the change */
|
|
old_min = clk->min_rate;
|
|
old_max = clk->max_rate;
|
|
clk->min_rate = min;
|
|
clk->max_rate = max;
|
|
|
|
rate = clk_core_get_rate_nolock(clk->core);
|
|
if (rate < min || rate > max) {
|
|
/*
|
|
* FIXME:
|
|
* We are in bit of trouble here, current rate is outside the
|
|
* the requested range. We are going try to request appropriate
|
|
* range boundary but there is a catch. It may fail for the
|
|
* usual reason (clock broken, clock protected, etc) but also
|
|
* because:
|
|
* - round_rate() was not favorable and fell on the wrong
|
|
* side of the boundary
|
|
* - the determine_rate() callback does not really check for
|
|
* this corner case when determining the rate
|
|
*/
|
|
|
|
if (rate < min)
|
|
rate = min;
|
|
else
|
|
rate = max;
|
|
|
|
ret = clk_core_set_rate_nolock(clk->core, rate);
|
|
if (ret) {
|
|
/* rollback the changes */
|
|
clk->min_rate = old_min;
|
|
clk->max_rate = old_max;
|
|
}
|
|
}
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_protect(clk->core);
|
|
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_set_rate_range);
|
|
|
|
/**
|
|
* clk_set_min_rate - set a minimum clock rate for a clock source
|
|
* @clk: clock source
|
|
* @rate: desired minimum clock rate in Hz, inclusive
|
|
*
|
|
* Returns success (0) or negative errno.
|
|
*/
|
|
int clk_set_min_rate(struct clk *clk, unsigned long rate)
|
|
{
|
|
if (!clk)
|
|
return 0;
|
|
|
|
return clk_set_rate_range(clk, rate, clk->max_rate);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_set_min_rate);
|
|
|
|
/**
|
|
* clk_set_max_rate - set a maximum clock rate for a clock source
|
|
* @clk: clock source
|
|
* @rate: desired maximum clock rate in Hz, inclusive
|
|
*
|
|
* Returns success (0) or negative errno.
|
|
*/
|
|
int clk_set_max_rate(struct clk *clk, unsigned long rate)
|
|
{
|
|
if (!clk)
|
|
return 0;
|
|
|
|
return clk_set_rate_range(clk, clk->min_rate, rate);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_set_max_rate);
|
|
|
|
/**
|
|
* clk_get_parent - return the parent of a clk
|
|
* @clk: the clk whose parent gets returned
|
|
*
|
|
* Simply returns clk->parent. Returns NULL if clk is NULL.
|
|
*/
|
|
struct clk *clk_get_parent(struct clk *clk)
|
|
{
|
|
struct clk *parent;
|
|
|
|
if (!clk)
|
|
return NULL;
|
|
|
|
clk_prepare_lock();
|
|
/* TODO: Create a per-user clk and change callers to call clk_put */
|
|
parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
|
|
clk_prepare_unlock();
|
|
|
|
return parent;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_get_parent);
|
|
|
|
static struct clk_core *__clk_init_parent(struct clk_core *core)
|
|
{
|
|
u8 index = 0;
|
|
|
|
if (core->num_parents > 1 && core->ops->get_parent)
|
|
index = core->ops->get_parent(core->hw);
|
|
|
|
return clk_core_get_parent_by_index(core, index);
|
|
}
|
|
|
|
static void clk_core_reparent(struct clk_core *core,
|
|
struct clk_core *new_parent)
|
|
{
|
|
clk_reparent(core, new_parent);
|
|
__clk_recalc_accuracies(core);
|
|
__clk_recalc_rates(core, POST_RATE_CHANGE);
|
|
}
|
|
|
|
void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
|
|
{
|
|
if (!hw)
|
|
return;
|
|
|
|
clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
|
|
}
|
|
|
|
/**
|
|
* clk_has_parent - check if a clock is a possible parent for another
|
|
* @clk: clock source
|
|
* @parent: parent clock source
|
|
*
|
|
* This function can be used in drivers that need to check that a clock can be
|
|
* the parent of another without actually changing the parent.
|
|
*
|
|
* Returns true if @parent is a possible parent for @clk, false otherwise.
|
|
*/
|
|
bool clk_has_parent(struct clk *clk, struct clk *parent)
|
|
{
|
|
struct clk_core *core, *parent_core;
|
|
|
|
/* NULL clocks should be nops, so return success if either is NULL. */
|
|
if (!clk || !parent)
|
|
return true;
|
|
|
|
core = clk->core;
|
|
parent_core = parent->core;
|
|
|
|
/* Optimize for the case where the parent is already the parent. */
|
|
if (core->parent == parent_core)
|
|
return true;
|
|
|
|
return match_string(core->parent_names, core->num_parents,
|
|
parent_core->name) >= 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_has_parent);
|
|
|
|
static int clk_core_set_parent_nolock(struct clk_core *core,
|
|
struct clk_core *parent)
|
|
{
|
|
int ret = 0;
|
|
int p_index = 0;
|
|
unsigned long p_rate = 0;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core)
|
|
return 0;
|
|
|
|
if (core->parent == parent)
|
|
return 0;
|
|
|
|
/* verify ops for for multi-parent clks */
|
|
if (core->num_parents > 1 && !core->ops->set_parent)
|
|
return -EPERM;
|
|
|
|
/* check that we are allowed to re-parent if the clock is in use */
|
|
if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
|
|
return -EBUSY;
|
|
|
|
if (clk_core_rate_is_protected(core))
|
|
return -EBUSY;
|
|
|
|
/* try finding the new parent index */
|
|
if (parent) {
|
|
p_index = clk_fetch_parent_index(core, parent);
|
|
if (p_index < 0) {
|
|
pr_debug("%s: clk %s can not be parent of clk %s\n",
|
|
__func__, parent->name, core->name);
|
|
return p_index;
|
|
}
|
|
p_rate = parent->rate;
|
|
}
|
|
|
|
ret = clk_pm_runtime_get(core);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* propagate PRE_RATE_CHANGE notifications */
|
|
ret = __clk_speculate_rates(core, p_rate);
|
|
|
|
/* abort if a driver objects */
|
|
if (ret & NOTIFY_STOP_MASK)
|
|
goto runtime_put;
|
|
|
|
/* do the re-parent */
|
|
ret = __clk_set_parent(core, parent, p_index);
|
|
|
|
/* propagate rate an accuracy recalculation accordingly */
|
|
if (ret) {
|
|
__clk_recalc_rates(core, ABORT_RATE_CHANGE);
|
|
} else {
|
|
__clk_recalc_rates(core, POST_RATE_CHANGE);
|
|
__clk_recalc_accuracies(core);
|
|
}
|
|
|
|
runtime_put:
|
|
clk_pm_runtime_put(core);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* clk_set_parent - switch the parent of a mux clk
|
|
* @clk: the mux clk whose input we are switching
|
|
* @parent: the new input to clk
|
|
*
|
|
* Re-parent clk to use parent as its new input source. If clk is in
|
|
* prepared state, the clk will get enabled for the duration of this call. If
|
|
* that's not acceptable for a specific clk (Eg: the consumer can't handle
|
|
* that, the reparenting is glitchy in hardware, etc), use the
|
|
* CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
|
|
*
|
|
* After successfully changing clk's parent clk_set_parent will update the
|
|
* clk topology, sysfs topology and propagate rate recalculation via
|
|
* __clk_recalc_rates.
|
|
*
|
|
* Returns 0 on success, -EERROR otherwise.
|
|
*/
|
|
int clk_set_parent(struct clk *clk, struct clk *parent)
|
|
{
|
|
int ret;
|
|
|
|
if (!clk)
|
|
return 0;
|
|
|
|
clk_prepare_lock();
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_unprotect(clk->core);
|
|
|
|
ret = clk_core_set_parent_nolock(clk->core,
|
|
parent ? parent->core : NULL);
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_protect(clk->core);
|
|
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_set_parent);
|
|
|
|
static int clk_core_set_phase_nolock(struct clk_core *core, int degrees)
|
|
{
|
|
int ret = -EINVAL;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (!core)
|
|
return 0;
|
|
|
|
if (clk_core_rate_is_protected(core))
|
|
return -EBUSY;
|
|
|
|
trace_clk_set_phase(core, degrees);
|
|
|
|
if (core->ops->set_phase) {
|
|
ret = core->ops->set_phase(core->hw, degrees);
|
|
if (!ret)
|
|
core->phase = degrees;
|
|
}
|
|
|
|
trace_clk_set_phase_complete(core, degrees);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* clk_set_phase - adjust the phase shift of a clock signal
|
|
* @clk: clock signal source
|
|
* @degrees: number of degrees the signal is shifted
|
|
*
|
|
* Shifts the phase of a clock signal by the specified
|
|
* degrees. Returns 0 on success, -EERROR otherwise.
|
|
*
|
|
* This function makes no distinction about the input or reference
|
|
* signal that we adjust the clock signal phase against. For example
|
|
* phase locked-loop clock signal generators we may shift phase with
|
|
* respect to feedback clock signal input, but for other cases the
|
|
* clock phase may be shifted with respect to some other, unspecified
|
|
* signal.
|
|
*
|
|
* Additionally the concept of phase shift does not propagate through
|
|
* the clock tree hierarchy, which sets it apart from clock rates and
|
|
* clock accuracy. A parent clock phase attribute does not have an
|
|
* impact on the phase attribute of a child clock.
|
|
*/
|
|
int clk_set_phase(struct clk *clk, int degrees)
|
|
{
|
|
int ret;
|
|
|
|
if (!clk)
|
|
return 0;
|
|
|
|
/* sanity check degrees */
|
|
degrees %= 360;
|
|
if (degrees < 0)
|
|
degrees += 360;
|
|
|
|
clk_prepare_lock();
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_unprotect(clk->core);
|
|
|
|
ret = clk_core_set_phase_nolock(clk->core, degrees);
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_protect(clk->core);
|
|
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_set_phase);
|
|
|
|
static int clk_core_get_phase(struct clk_core *core)
|
|
{
|
|
int ret;
|
|
|
|
clk_prepare_lock();
|
|
/* Always try to update cached phase if possible */
|
|
if (core->ops->get_phase)
|
|
core->phase = core->ops->get_phase(core->hw);
|
|
ret = core->phase;
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* clk_get_phase - return the phase shift of a clock signal
|
|
* @clk: clock signal source
|
|
*
|
|
* Returns the phase shift of a clock node in degrees, otherwise returns
|
|
* -EERROR.
|
|
*/
|
|
int clk_get_phase(struct clk *clk)
|
|
{
|
|
if (!clk)
|
|
return 0;
|
|
|
|
return clk_core_get_phase(clk->core);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_get_phase);
|
|
|
|
static void clk_core_reset_duty_cycle_nolock(struct clk_core *core)
|
|
{
|
|
/* Assume a default value of 50% */
|
|
core->duty.num = 1;
|
|
core->duty.den = 2;
|
|
}
|
|
|
|
static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core);
|
|
|
|
static int clk_core_update_duty_cycle_nolock(struct clk_core *core)
|
|
{
|
|
struct clk_duty *duty = &core->duty;
|
|
int ret = 0;
|
|
|
|
if (!core->ops->get_duty_cycle)
|
|
return clk_core_update_duty_cycle_parent_nolock(core);
|
|
|
|
ret = core->ops->get_duty_cycle(core->hw, duty);
|
|
if (ret)
|
|
goto reset;
|
|
|
|
/* Don't trust the clock provider too much */
|
|
if (duty->den == 0 || duty->num > duty->den) {
|
|
ret = -EINVAL;
|
|
goto reset;
|
|
}
|
|
|
|
return 0;
|
|
|
|
reset:
|
|
clk_core_reset_duty_cycle_nolock(core);
|
|
return ret;
|
|
}
|
|
|
|
static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (core->parent &&
|
|
core->flags & CLK_DUTY_CYCLE_PARENT) {
|
|
ret = clk_core_update_duty_cycle_nolock(core->parent);
|
|
memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
|
|
} else {
|
|
clk_core_reset_duty_cycle_nolock(core);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
|
|
struct clk_duty *duty);
|
|
|
|
static int clk_core_set_duty_cycle_nolock(struct clk_core *core,
|
|
struct clk_duty *duty)
|
|
{
|
|
int ret;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
if (clk_core_rate_is_protected(core))
|
|
return -EBUSY;
|
|
|
|
trace_clk_set_duty_cycle(core, duty);
|
|
|
|
if (!core->ops->set_duty_cycle)
|
|
return clk_core_set_duty_cycle_parent_nolock(core, duty);
|
|
|
|
ret = core->ops->set_duty_cycle(core->hw, duty);
|
|
if (!ret)
|
|
memcpy(&core->duty, duty, sizeof(*duty));
|
|
|
|
trace_clk_set_duty_cycle_complete(core, duty);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
|
|
struct clk_duty *duty)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (core->parent &&
|
|
core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
|
|
ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
|
|
memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
|
|
* @clk: clock signal source
|
|
* @num: numerator of the duty cycle ratio to be applied
|
|
* @den: denominator of the duty cycle ratio to be applied
|
|
*
|
|
* Apply the duty cycle ratio if the ratio is valid and the clock can
|
|
* perform this operation
|
|
*
|
|
* Returns (0) on success, a negative errno otherwise.
|
|
*/
|
|
int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den)
|
|
{
|
|
int ret;
|
|
struct clk_duty duty;
|
|
|
|
if (!clk)
|
|
return 0;
|
|
|
|
/* sanity check the ratio */
|
|
if (den == 0 || num > den)
|
|
return -EINVAL;
|
|
|
|
duty.num = num;
|
|
duty.den = den;
|
|
|
|
clk_prepare_lock();
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_unprotect(clk->core);
|
|
|
|
ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
|
|
|
|
if (clk->exclusive_count)
|
|
clk_core_rate_protect(clk->core);
|
|
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_set_duty_cycle);
|
|
|
|
static int clk_core_get_scaled_duty_cycle(struct clk_core *core,
|
|
unsigned int scale)
|
|
{
|
|
struct clk_duty *duty = &core->duty;
|
|
int ret;
|
|
|
|
clk_prepare_lock();
|
|
|
|
ret = clk_core_update_duty_cycle_nolock(core);
|
|
if (!ret)
|
|
ret = mult_frac(scale, duty->num, duty->den);
|
|
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
|
|
* @clk: clock signal source
|
|
* @scale: scaling factor to be applied to represent the ratio as an integer
|
|
*
|
|
* Returns the duty cycle ratio of a clock node multiplied by the provided
|
|
* scaling factor, or negative errno on error.
|
|
*/
|
|
int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale)
|
|
{
|
|
if (!clk)
|
|
return 0;
|
|
|
|
return clk_core_get_scaled_duty_cycle(clk->core, scale);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle);
|
|
|
|
/**
|
|
* clk_is_match - check if two clk's point to the same hardware clock
|
|
* @p: clk compared against q
|
|
* @q: clk compared against p
|
|
*
|
|
* Returns true if the two struct clk pointers both point to the same hardware
|
|
* clock node. Put differently, returns true if struct clk *p and struct clk *q
|
|
* share the same struct clk_core object.
|
|
*
|
|
* Returns false otherwise. Note that two NULL clks are treated as matching.
|
|
*/
|
|
bool clk_is_match(const struct clk *p, const struct clk *q)
|
|
{
|
|
/* trivial case: identical struct clk's or both NULL */
|
|
if (p == q)
|
|
return true;
|
|
|
|
/* true if clk->core pointers match. Avoid dereferencing garbage */
|
|
if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
|
|
if (p->core == q->core)
|
|
return true;
|
|
|
|
return false;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_is_match);
|
|
|
|
/*** debugfs support ***/
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
#include <linux/debugfs.h>
|
|
|
|
static struct dentry *rootdir;
|
|
static int inited = 0;
|
|
static DEFINE_MUTEX(clk_debug_lock);
|
|
static HLIST_HEAD(clk_debug_list);
|
|
|
|
static struct hlist_head *all_lists[] = {
|
|
&clk_root_list,
|
|
&clk_orphan_list,
|
|
NULL,
|
|
};
|
|
|
|
static struct hlist_head *orphan_list[] = {
|
|
&clk_orphan_list,
|
|
NULL,
|
|
};
|
|
|
|
static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
|
|
int level)
|
|
{
|
|
if (!c)
|
|
return;
|
|
|
|
seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu %5d %6d\n",
|
|
level * 3 + 1, "",
|
|
30 - level * 3, c->name,
|
|
c->enable_count, c->prepare_count, c->protect_count,
|
|
clk_core_get_rate(c), clk_core_get_accuracy(c),
|
|
clk_core_get_phase(c),
|
|
clk_core_get_scaled_duty_cycle(c, 100000));
|
|
}
|
|
|
|
static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
|
|
int level)
|
|
{
|
|
struct clk_core *child;
|
|
|
|
if (!c)
|
|
return;
|
|
|
|
clk_summary_show_one(s, c, level);
|
|
|
|
hlist_for_each_entry(child, &c->children, child_node)
|
|
clk_summary_show_subtree(s, child, level + 1);
|
|
}
|
|
|
|
static int clk_summary_show(struct seq_file *s, void *data)
|
|
{
|
|
struct clk_core *c;
|
|
struct hlist_head **lists = (struct hlist_head **)s->private;
|
|
|
|
seq_puts(s, " enable prepare protect duty\n");
|
|
seq_puts(s, " clock count count count rate accuracy phase cycle\n");
|
|
seq_puts(s, "---------------------------------------------------------------------------------------------\n");
|
|
|
|
clk_prepare_lock();
|
|
|
|
for (; *lists; lists++)
|
|
hlist_for_each_entry(c, *lists, child_node)
|
|
clk_summary_show_subtree(s, c, 0);
|
|
|
|
clk_prepare_unlock();
|
|
|
|
return 0;
|
|
}
|
|
DEFINE_SHOW_ATTRIBUTE(clk_summary);
|
|
|
|
static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
|
|
{
|
|
if (!c)
|
|
return;
|
|
|
|
/* This should be JSON format, i.e. elements separated with a comma */
|
|
seq_printf(s, "\"%s\": { ", c->name);
|
|
seq_printf(s, "\"enable_count\": %d,", c->enable_count);
|
|
seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
|
|
seq_printf(s, "\"protect_count\": %d,", c->protect_count);
|
|
seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
|
|
seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
|
|
seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
|
|
seq_printf(s, "\"duty_cycle\": %u",
|
|
clk_core_get_scaled_duty_cycle(c, 100000));
|
|
}
|
|
|
|
static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
|
|
{
|
|
struct clk_core *child;
|
|
|
|
if (!c)
|
|
return;
|
|
|
|
clk_dump_one(s, c, level);
|
|
|
|
hlist_for_each_entry(child, &c->children, child_node) {
|
|
seq_putc(s, ',');
|
|
clk_dump_subtree(s, child, level + 1);
|
|
}
|
|
|
|
seq_putc(s, '}');
|
|
}
|
|
|
|
static int clk_dump_show(struct seq_file *s, void *data)
|
|
{
|
|
struct clk_core *c;
|
|
bool first_node = true;
|
|
struct hlist_head **lists = (struct hlist_head **)s->private;
|
|
|
|
seq_putc(s, '{');
|
|
clk_prepare_lock();
|
|
|
|
for (; *lists; lists++) {
|
|
hlist_for_each_entry(c, *lists, child_node) {
|
|
if (!first_node)
|
|
seq_putc(s, ',');
|
|
first_node = false;
|
|
clk_dump_subtree(s, c, 0);
|
|
}
|
|
}
|
|
|
|
clk_prepare_unlock();
|
|
|
|
seq_puts(s, "}\n");
|
|
return 0;
|
|
}
|
|
DEFINE_SHOW_ATTRIBUTE(clk_dump);
|
|
|
|
static const struct {
|
|
unsigned long flag;
|
|
const char *name;
|
|
} clk_flags[] = {
|
|
#define ENTRY(f) { f, #f }
|
|
ENTRY(CLK_SET_RATE_GATE),
|
|
ENTRY(CLK_SET_PARENT_GATE),
|
|
ENTRY(CLK_SET_RATE_PARENT),
|
|
ENTRY(CLK_IGNORE_UNUSED),
|
|
ENTRY(CLK_IS_BASIC),
|
|
ENTRY(CLK_GET_RATE_NOCACHE),
|
|
ENTRY(CLK_SET_RATE_NO_REPARENT),
|
|
ENTRY(CLK_GET_ACCURACY_NOCACHE),
|
|
ENTRY(CLK_RECALC_NEW_RATES),
|
|
ENTRY(CLK_SET_RATE_UNGATE),
|
|
ENTRY(CLK_IS_CRITICAL),
|
|
ENTRY(CLK_OPS_PARENT_ENABLE),
|
|
ENTRY(CLK_DUTY_CYCLE_PARENT),
|
|
#undef ENTRY
|
|
};
|
|
|
|
static int clk_flags_show(struct seq_file *s, void *data)
|
|
{
|
|
struct clk_core *core = s->private;
|
|
unsigned long flags = core->flags;
|
|
unsigned int i;
|
|
|
|
for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) {
|
|
if (flags & clk_flags[i].flag) {
|
|
seq_printf(s, "%s\n", clk_flags[i].name);
|
|
flags &= ~clk_flags[i].flag;
|
|
}
|
|
}
|
|
if (flags) {
|
|
/* Unknown flags */
|
|
seq_printf(s, "0x%lx\n", flags);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
DEFINE_SHOW_ATTRIBUTE(clk_flags);
|
|
|
|
static int possible_parents_show(struct seq_file *s, void *data)
|
|
{
|
|
struct clk_core *core = s->private;
|
|
int i;
|
|
|
|
for (i = 0; i < core->num_parents - 1; i++)
|
|
seq_printf(s, "%s ", core->parent_names[i]);
|
|
|
|
seq_printf(s, "%s\n", core->parent_names[i]);
|
|
|
|
return 0;
|
|
}
|
|
DEFINE_SHOW_ATTRIBUTE(possible_parents);
|
|
|
|
static int clk_duty_cycle_show(struct seq_file *s, void *data)
|
|
{
|
|
struct clk_core *core = s->private;
|
|
struct clk_duty *duty = &core->duty;
|
|
|
|
seq_printf(s, "%u/%u\n", duty->num, duty->den);
|
|
|
|
return 0;
|
|
}
|
|
DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
|
|
|
|
static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
|
|
{
|
|
struct dentry *root;
|
|
|
|
if (!core || !pdentry)
|
|
return;
|
|
|
|
root = debugfs_create_dir(core->name, pdentry);
|
|
core->dentry = root;
|
|
|
|
debugfs_create_ulong("clk_rate", 0444, root, &core->rate);
|
|
debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
|
|
debugfs_create_u32("clk_phase", 0444, root, &core->phase);
|
|
debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
|
|
debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
|
|
debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
|
|
debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
|
|
debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
|
|
debugfs_create_file("clk_duty_cycle", 0444, root, core,
|
|
&clk_duty_cycle_fops);
|
|
|
|
if (core->num_parents > 1)
|
|
debugfs_create_file("clk_possible_parents", 0444, root, core,
|
|
&possible_parents_fops);
|
|
|
|
if (core->ops->debug_init)
|
|
core->ops->debug_init(core->hw, core->dentry);
|
|
}
|
|
|
|
/**
|
|
* clk_debug_register - add a clk node to the debugfs clk directory
|
|
* @core: the clk being added to the debugfs clk directory
|
|
*
|
|
* Dynamically adds a clk to the debugfs clk directory if debugfs has been
|
|
* initialized. Otherwise it bails out early since the debugfs clk directory
|
|
* will be created lazily by clk_debug_init as part of a late_initcall.
|
|
*/
|
|
static void clk_debug_register(struct clk_core *core)
|
|
{
|
|
mutex_lock(&clk_debug_lock);
|
|
hlist_add_head(&core->debug_node, &clk_debug_list);
|
|
if (inited)
|
|
clk_debug_create_one(core, rootdir);
|
|
mutex_unlock(&clk_debug_lock);
|
|
}
|
|
|
|
/**
|
|
* clk_debug_unregister - remove a clk node from the debugfs clk directory
|
|
* @core: the clk being removed from the debugfs clk directory
|
|
*
|
|
* Dynamically removes a clk and all its child nodes from the
|
|
* debugfs clk directory if clk->dentry points to debugfs created by
|
|
* clk_debug_register in __clk_core_init.
|
|
*/
|
|
static void clk_debug_unregister(struct clk_core *core)
|
|
{
|
|
mutex_lock(&clk_debug_lock);
|
|
hlist_del_init(&core->debug_node);
|
|
debugfs_remove_recursive(core->dentry);
|
|
core->dentry = NULL;
|
|
mutex_unlock(&clk_debug_lock);
|
|
}
|
|
|
|
/**
|
|
* clk_debug_init - lazily populate the debugfs clk directory
|
|
*
|
|
* clks are often initialized very early during boot before memory can be
|
|
* dynamically allocated and well before debugfs is setup. This function
|
|
* populates the debugfs clk directory once at boot-time when we know that
|
|
* debugfs is setup. It should only be called once at boot-time, all other clks
|
|
* added dynamically will be done so with clk_debug_register.
|
|
*/
|
|
static int __init clk_debug_init(void)
|
|
{
|
|
struct clk_core *core;
|
|
|
|
rootdir = debugfs_create_dir("clk", NULL);
|
|
|
|
debugfs_create_file("clk_summary", 0444, rootdir, &all_lists,
|
|
&clk_summary_fops);
|
|
debugfs_create_file("clk_dump", 0444, rootdir, &all_lists,
|
|
&clk_dump_fops);
|
|
debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list,
|
|
&clk_summary_fops);
|
|
debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list,
|
|
&clk_dump_fops);
|
|
|
|
mutex_lock(&clk_debug_lock);
|
|
hlist_for_each_entry(core, &clk_debug_list, debug_node)
|
|
clk_debug_create_one(core, rootdir);
|
|
|
|
inited = 1;
|
|
mutex_unlock(&clk_debug_lock);
|
|
|
|
return 0;
|
|
}
|
|
late_initcall(clk_debug_init);
|
|
#else
|
|
static inline void clk_debug_register(struct clk_core *core) { }
|
|
static inline void clk_debug_reparent(struct clk_core *core,
|
|
struct clk_core *new_parent)
|
|
{
|
|
}
|
|
static inline void clk_debug_unregister(struct clk_core *core)
|
|
{
|
|
}
|
|
#endif
|
|
|
|
/**
|
|
* __clk_core_init - initialize the data structures in a struct clk_core
|
|
* @core: clk_core being initialized
|
|
*
|
|
* Initializes the lists in struct clk_core, queries the hardware for the
|
|
* parent and rate and sets them both.
|
|
*/
|
|
static int __clk_core_init(struct clk_core *core)
|
|
{
|
|
int i, ret;
|
|
struct clk_core *orphan;
|
|
struct hlist_node *tmp2;
|
|
unsigned long rate;
|
|
|
|
if (!core)
|
|
return -EINVAL;
|
|
|
|
clk_prepare_lock();
|
|
|
|
ret = clk_pm_runtime_get(core);
|
|
if (ret)
|
|
goto unlock;
|
|
|
|
/* check to see if a clock with this name is already registered */
|
|
if (clk_core_lookup(core->name)) {
|
|
pr_debug("%s: clk %s already initialized\n",
|
|
__func__, core->name);
|
|
ret = -EEXIST;
|
|
goto out;
|
|
}
|
|
|
|
/* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
|
|
if (core->ops->set_rate &&
|
|
!((core->ops->round_rate || core->ops->determine_rate) &&
|
|
core->ops->recalc_rate)) {
|
|
pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
|
|
__func__, core->name);
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
if (core->ops->set_parent && !core->ops->get_parent) {
|
|
pr_err("%s: %s must implement .get_parent & .set_parent\n",
|
|
__func__, core->name);
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
if (core->num_parents > 1 && !core->ops->get_parent) {
|
|
pr_err("%s: %s must implement .get_parent as it has multi parents\n",
|
|
__func__, core->name);
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
if (core->ops->set_rate_and_parent &&
|
|
!(core->ops->set_parent && core->ops->set_rate)) {
|
|
pr_err("%s: %s must implement .set_parent & .set_rate\n",
|
|
__func__, core->name);
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
/* throw a WARN if any entries in parent_names are NULL */
|
|
for (i = 0; i < core->num_parents; i++)
|
|
WARN(!core->parent_names[i],
|
|
"%s: invalid NULL in %s's .parent_names\n",
|
|
__func__, core->name);
|
|
|
|
core->parent = __clk_init_parent(core);
|
|
|
|
/*
|
|
* Populate core->parent if parent has already been clk_core_init'd. If
|
|
* parent has not yet been clk_core_init'd then place clk in the orphan
|
|
* list. If clk doesn't have any parents then place it in the root
|
|
* clk list.
|
|
*
|
|
* Every time a new clk is clk_init'd then we walk the list of orphan
|
|
* clocks and re-parent any that are children of the clock currently
|
|
* being clk_init'd.
|
|
*/
|
|
if (core->parent) {
|
|
hlist_add_head(&core->child_node,
|
|
&core->parent->children);
|
|
core->orphan = core->parent->orphan;
|
|
} else if (!core->num_parents) {
|
|
hlist_add_head(&core->child_node, &clk_root_list);
|
|
core->orphan = false;
|
|
} else {
|
|
hlist_add_head(&core->child_node, &clk_orphan_list);
|
|
core->orphan = true;
|
|
}
|
|
|
|
/*
|
|
* optional platform-specific magic
|
|
*
|
|
* The .init callback is not used by any of the basic clock types, but
|
|
* exists for weird hardware that must perform initialization magic.
|
|
* Please consider other ways of solving initialization problems before
|
|
* using this callback, as its use is discouraged.
|
|
*/
|
|
if (core->ops->init)
|
|
core->ops->init(core->hw);
|
|
|
|
/*
|
|
* Set clk's accuracy. The preferred method is to use
|
|
* .recalc_accuracy. For simple clocks and lazy developers the default
|
|
* fallback is to use the parent's accuracy. If a clock doesn't have a
|
|
* parent (or is orphaned) then accuracy is set to zero (perfect
|
|
* clock).
|
|
*/
|
|
if (core->ops->recalc_accuracy)
|
|
core->accuracy = core->ops->recalc_accuracy(core->hw,
|
|
__clk_get_accuracy(core->parent));
|
|
else if (core->parent)
|
|
core->accuracy = core->parent->accuracy;
|
|
else
|
|
core->accuracy = 0;
|
|
|
|
/*
|
|
* Set clk's phase.
|
|
* Since a phase is by definition relative to its parent, just
|
|
* query the current clock phase, or just assume it's in phase.
|
|
*/
|
|
if (core->ops->get_phase)
|
|
core->phase = core->ops->get_phase(core->hw);
|
|
else
|
|
core->phase = 0;
|
|
|
|
/*
|
|
* Set clk's duty cycle.
|
|
*/
|
|
clk_core_update_duty_cycle_nolock(core);
|
|
|
|
/*
|
|
* Set clk's rate. The preferred method is to use .recalc_rate. For
|
|
* simple clocks and lazy developers the default fallback is to use the
|
|
* parent's rate. If a clock doesn't have a parent (or is orphaned)
|
|
* then rate is set to zero.
|
|
*/
|
|
if (core->ops->recalc_rate)
|
|
rate = core->ops->recalc_rate(core->hw,
|
|
clk_core_get_rate_nolock(core->parent));
|
|
else if (core->parent)
|
|
rate = core->parent->rate;
|
|
else
|
|
rate = 0;
|
|
core->rate = core->req_rate = rate;
|
|
|
|
/*
|
|
* Enable CLK_IS_CRITICAL clocks so newly added critical clocks
|
|
* don't get accidentally disabled when walking the orphan tree and
|
|
* reparenting clocks
|
|
*/
|
|
if (core->flags & CLK_IS_CRITICAL) {
|
|
unsigned long flags;
|
|
|
|
clk_core_prepare(core);
|
|
|
|
flags = clk_enable_lock();
|
|
clk_core_enable(core);
|
|
clk_enable_unlock(flags);
|
|
}
|
|
|
|
/*
|
|
* walk the list of orphan clocks and reparent any that newly finds a
|
|
* parent.
|
|
*/
|
|
hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
|
|
struct clk_core *parent = __clk_init_parent(orphan);
|
|
|
|
/*
|
|
* We need to use __clk_set_parent_before() and _after() to
|
|
* to properly migrate any prepare/enable count of the orphan
|
|
* clock. This is important for CLK_IS_CRITICAL clocks, which
|
|
* are enabled during init but might not have a parent yet.
|
|
*/
|
|
if (parent) {
|
|
/* update the clk tree topology */
|
|
__clk_set_parent_before(orphan, parent);
|
|
__clk_set_parent_after(orphan, parent, NULL);
|
|
__clk_recalc_accuracies(orphan);
|
|
__clk_recalc_rates(orphan, 0);
|
|
}
|
|
}
|
|
|
|
kref_init(&core->ref);
|
|
out:
|
|
clk_pm_runtime_put(core);
|
|
unlock:
|
|
clk_prepare_unlock();
|
|
|
|
if (!ret)
|
|
clk_debug_register(core);
|
|
|
|
return ret;
|
|
}
|
|
|
|
struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
|
|
const char *con_id)
|
|
{
|
|
struct clk *clk;
|
|
|
|
/* This is to allow this function to be chained to others */
|
|
if (IS_ERR_OR_NULL(hw))
|
|
return ERR_CAST(hw);
|
|
|
|
clk = kzalloc(sizeof(*clk), GFP_KERNEL);
|
|
if (!clk)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
clk->core = hw->core;
|
|
clk->dev_id = dev_id;
|
|
clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
|
|
clk->max_rate = ULONG_MAX;
|
|
|
|
clk_prepare_lock();
|
|
hlist_add_head(&clk->clks_node, &hw->core->clks);
|
|
clk_prepare_unlock();
|
|
|
|
return clk;
|
|
}
|
|
|
|
/* keep in sync with __clk_put */
|
|
void __clk_free_clk(struct clk *clk)
|
|
{
|
|
clk_prepare_lock();
|
|
hlist_del(&clk->clks_node);
|
|
clk_prepare_unlock();
|
|
|
|
kfree_const(clk->con_id);
|
|
kfree(clk);
|
|
}
|
|
|
|
/**
|
|
* clk_register - allocate a new clock, register it and return an opaque cookie
|
|
* @dev: device that is registering this clock
|
|
* @hw: link to hardware-specific clock data
|
|
*
|
|
* clk_register is the primary interface for populating the clock tree with new
|
|
* clock nodes. It returns a pointer to the newly allocated struct clk which
|
|
* cannot be dereferenced by driver code but may be used in conjunction with the
|
|
* rest of the clock API. In the event of an error clk_register will return an
|
|
* error code; drivers must test for an error code after calling clk_register.
|
|
*/
|
|
struct clk *clk_register(struct device *dev, struct clk_hw *hw)
|
|
{
|
|
int i, ret;
|
|
struct clk_core *core;
|
|
|
|
core = kzalloc(sizeof(*core), GFP_KERNEL);
|
|
if (!core) {
|
|
ret = -ENOMEM;
|
|
goto fail_out;
|
|
}
|
|
|
|
core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
|
|
if (!core->name) {
|
|
ret = -ENOMEM;
|
|
goto fail_name;
|
|
}
|
|
|
|
if (WARN_ON(!hw->init->ops)) {
|
|
ret = -EINVAL;
|
|
goto fail_ops;
|
|
}
|
|
core->ops = hw->init->ops;
|
|
|
|
if (dev && pm_runtime_enabled(dev))
|
|
core->dev = dev;
|
|
if (dev && dev->driver)
|
|
core->owner = dev->driver->owner;
|
|
core->hw = hw;
|
|
core->flags = hw->init->flags;
|
|
core->num_parents = hw->init->num_parents;
|
|
core->min_rate = 0;
|
|
core->max_rate = ULONG_MAX;
|
|
hw->core = core;
|
|
|
|
/* allocate local copy in case parent_names is __initdata */
|
|
core->parent_names = kcalloc(core->num_parents, sizeof(char *),
|
|
GFP_KERNEL);
|
|
|
|
if (!core->parent_names) {
|
|
ret = -ENOMEM;
|
|
goto fail_parent_names;
|
|
}
|
|
|
|
|
|
/* copy each string name in case parent_names is __initdata */
|
|
for (i = 0; i < core->num_parents; i++) {
|
|
core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
|
|
GFP_KERNEL);
|
|
if (!core->parent_names[i]) {
|
|
ret = -ENOMEM;
|
|
goto fail_parent_names_copy;
|
|
}
|
|
}
|
|
|
|
/* avoid unnecessary string look-ups of clk_core's possible parents. */
|
|
core->parents = kcalloc(core->num_parents, sizeof(*core->parents),
|
|
GFP_KERNEL);
|
|
if (!core->parents) {
|
|
ret = -ENOMEM;
|
|
goto fail_parents;
|
|
};
|
|
|
|
INIT_HLIST_HEAD(&core->clks);
|
|
|
|
hw->clk = __clk_create_clk(hw, NULL, NULL);
|
|
if (IS_ERR(hw->clk)) {
|
|
ret = PTR_ERR(hw->clk);
|
|
goto fail_parents;
|
|
}
|
|
|
|
ret = __clk_core_init(core);
|
|
if (!ret)
|
|
return hw->clk;
|
|
|
|
__clk_free_clk(hw->clk);
|
|
hw->clk = NULL;
|
|
|
|
fail_parents:
|
|
kfree(core->parents);
|
|
fail_parent_names_copy:
|
|
while (--i >= 0)
|
|
kfree_const(core->parent_names[i]);
|
|
kfree(core->parent_names);
|
|
fail_parent_names:
|
|
fail_ops:
|
|
kfree_const(core->name);
|
|
fail_name:
|
|
kfree(core);
|
|
fail_out:
|
|
return ERR_PTR(ret);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_register);
|
|
|
|
/**
|
|
* clk_hw_register - register a clk_hw and return an error code
|
|
* @dev: device that is registering this clock
|
|
* @hw: link to hardware-specific clock data
|
|
*
|
|
* clk_hw_register is the primary interface for populating the clock tree with
|
|
* new clock nodes. It returns an integer equal to zero indicating success or
|
|
* less than zero indicating failure. Drivers must test for an error code after
|
|
* calling clk_hw_register().
|
|
*/
|
|
int clk_hw_register(struct device *dev, struct clk_hw *hw)
|
|
{
|
|
return PTR_ERR_OR_ZERO(clk_register(dev, hw));
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_hw_register);
|
|
|
|
/* Free memory allocated for a clock. */
|
|
static void __clk_release(struct kref *ref)
|
|
{
|
|
struct clk_core *core = container_of(ref, struct clk_core, ref);
|
|
int i = core->num_parents;
|
|
|
|
lockdep_assert_held(&prepare_lock);
|
|
|
|
kfree(core->parents);
|
|
while (--i >= 0)
|
|
kfree_const(core->parent_names[i]);
|
|
|
|
kfree(core->parent_names);
|
|
kfree_const(core->name);
|
|
kfree(core);
|
|
}
|
|
|
|
/*
|
|
* Empty clk_ops for unregistered clocks. These are used temporarily
|
|
* after clk_unregister() was called on a clock and until last clock
|
|
* consumer calls clk_put() and the struct clk object is freed.
|
|
*/
|
|
static int clk_nodrv_prepare_enable(struct clk_hw *hw)
|
|
{
|
|
return -ENXIO;
|
|
}
|
|
|
|
static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
|
|
{
|
|
WARN_ON_ONCE(1);
|
|
}
|
|
|
|
static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
|
|
unsigned long parent_rate)
|
|
{
|
|
return -ENXIO;
|
|
}
|
|
|
|
static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
|
|
{
|
|
return -ENXIO;
|
|
}
|
|
|
|
static const struct clk_ops clk_nodrv_ops = {
|
|
.enable = clk_nodrv_prepare_enable,
|
|
.disable = clk_nodrv_disable_unprepare,
|
|
.prepare = clk_nodrv_prepare_enable,
|
|
.unprepare = clk_nodrv_disable_unprepare,
|
|
.set_rate = clk_nodrv_set_rate,
|
|
.set_parent = clk_nodrv_set_parent,
|
|
};
|
|
|
|
/**
|
|
* clk_unregister - unregister a currently registered clock
|
|
* @clk: clock to unregister
|
|
*/
|
|
void clk_unregister(struct clk *clk)
|
|
{
|
|
unsigned long flags;
|
|
|
|
if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
|
|
return;
|
|
|
|
clk_debug_unregister(clk->core);
|
|
|
|
clk_prepare_lock();
|
|
|
|
if (clk->core->ops == &clk_nodrv_ops) {
|
|
pr_err("%s: unregistered clock: %s\n", __func__,
|
|
clk->core->name);
|
|
goto unlock;
|
|
}
|
|
/*
|
|
* Assign empty clock ops for consumers that might still hold
|
|
* a reference to this clock.
|
|
*/
|
|
flags = clk_enable_lock();
|
|
clk->core->ops = &clk_nodrv_ops;
|
|
clk_enable_unlock(flags);
|
|
|
|
if (!hlist_empty(&clk->core->children)) {
|
|
struct clk_core *child;
|
|
struct hlist_node *t;
|
|
|
|
/* Reparent all children to the orphan list. */
|
|
hlist_for_each_entry_safe(child, t, &clk->core->children,
|
|
child_node)
|
|
clk_core_set_parent_nolock(child, NULL);
|
|
}
|
|
|
|
hlist_del_init(&clk->core->child_node);
|
|
|
|
if (clk->core->prepare_count)
|
|
pr_warn("%s: unregistering prepared clock: %s\n",
|
|
__func__, clk->core->name);
|
|
|
|
if (clk->core->protect_count)
|
|
pr_warn("%s: unregistering protected clock: %s\n",
|
|
__func__, clk->core->name);
|
|
|
|
kref_put(&clk->core->ref, __clk_release);
|
|
unlock:
|
|
clk_prepare_unlock();
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_unregister);
|
|
|
|
/**
|
|
* clk_hw_unregister - unregister a currently registered clk_hw
|
|
* @hw: hardware-specific clock data to unregister
|
|
*/
|
|
void clk_hw_unregister(struct clk_hw *hw)
|
|
{
|
|
clk_unregister(hw->clk);
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_hw_unregister);
|
|
|
|
static void devm_clk_release(struct device *dev, void *res)
|
|
{
|
|
clk_unregister(*(struct clk **)res);
|
|
}
|
|
|
|
static void devm_clk_hw_release(struct device *dev, void *res)
|
|
{
|
|
clk_hw_unregister(*(struct clk_hw **)res);
|
|
}
|
|
|
|
/**
|
|
* devm_clk_register - resource managed clk_register()
|
|
* @dev: device that is registering this clock
|
|
* @hw: link to hardware-specific clock data
|
|
*
|
|
* Managed clk_register(). Clocks returned from this function are
|
|
* automatically clk_unregister()ed on driver detach. See clk_register() for
|
|
* more information.
|
|
*/
|
|
struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
|
|
{
|
|
struct clk *clk;
|
|
struct clk **clkp;
|
|
|
|
clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
|
|
if (!clkp)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
clk = clk_register(dev, hw);
|
|
if (!IS_ERR(clk)) {
|
|
*clkp = clk;
|
|
devres_add(dev, clkp);
|
|
} else {
|
|
devres_free(clkp);
|
|
}
|
|
|
|
return clk;
|
|
}
|
|
EXPORT_SYMBOL_GPL(devm_clk_register);
|
|
|
|
/**
|
|
* devm_clk_hw_register - resource managed clk_hw_register()
|
|
* @dev: device that is registering this clock
|
|
* @hw: link to hardware-specific clock data
|
|
*
|
|
* Managed clk_hw_register(). Clocks registered by this function are
|
|
* automatically clk_hw_unregister()ed on driver detach. See clk_hw_register()
|
|
* for more information.
|
|
*/
|
|
int devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
|
|
{
|
|
struct clk_hw **hwp;
|
|
int ret;
|
|
|
|
hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL);
|
|
if (!hwp)
|
|
return -ENOMEM;
|
|
|
|
ret = clk_hw_register(dev, hw);
|
|
if (!ret) {
|
|
*hwp = hw;
|
|
devres_add(dev, hwp);
|
|
} else {
|
|
devres_free(hwp);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(devm_clk_hw_register);
|
|
|
|
static int devm_clk_match(struct device *dev, void *res, void *data)
|
|
{
|
|
struct clk *c = res;
|
|
if (WARN_ON(!c))
|
|
return 0;
|
|
return c == data;
|
|
}
|
|
|
|
static int devm_clk_hw_match(struct device *dev, void *res, void *data)
|
|
{
|
|
struct clk_hw *hw = res;
|
|
|
|
if (WARN_ON(!hw))
|
|
return 0;
|
|
return hw == data;
|
|
}
|
|
|
|
/**
|
|
* devm_clk_unregister - resource managed clk_unregister()
|
|
* @clk: clock to unregister
|
|
*
|
|
* Deallocate a clock allocated with devm_clk_register(). Normally
|
|
* this function will not need to be called and the resource management
|
|
* code will ensure that the resource is freed.
|
|
*/
|
|
void devm_clk_unregister(struct device *dev, struct clk *clk)
|
|
{
|
|
WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
|
|
}
|
|
EXPORT_SYMBOL_GPL(devm_clk_unregister);
|
|
|
|
/**
|
|
* devm_clk_hw_unregister - resource managed clk_hw_unregister()
|
|
* @dev: device that is unregistering the hardware-specific clock data
|
|
* @hw: link to hardware-specific clock data
|
|
*
|
|
* Unregister a clk_hw registered with devm_clk_hw_register(). Normally
|
|
* this function will not need to be called and the resource management
|
|
* code will ensure that the resource is freed.
|
|
*/
|
|
void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw)
|
|
{
|
|
WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match,
|
|
hw));
|
|
}
|
|
EXPORT_SYMBOL_GPL(devm_clk_hw_unregister);
|
|
|
|
/*
|
|
* clkdev helpers
|
|
*/
|
|
int __clk_get(struct clk *clk)
|
|
{
|
|
struct clk_core *core = !clk ? NULL : clk->core;
|
|
|
|
if (core) {
|
|
if (!try_module_get(core->owner))
|
|
return 0;
|
|
|
|
kref_get(&core->ref);
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
/* keep in sync with __clk_free_clk */
|
|
void __clk_put(struct clk *clk)
|
|
{
|
|
struct module *owner;
|
|
|
|
if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
|
|
return;
|
|
|
|
clk_prepare_lock();
|
|
|
|
/*
|
|
* Before calling clk_put, all calls to clk_rate_exclusive_get() from a
|
|
* given user should be balanced with calls to clk_rate_exclusive_put()
|
|
* and by that same consumer
|
|
*/
|
|
if (WARN_ON(clk->exclusive_count)) {
|
|
/* We voiced our concern, let's sanitize the situation */
|
|
clk->core->protect_count -= (clk->exclusive_count - 1);
|
|
clk_core_rate_unprotect(clk->core);
|
|
clk->exclusive_count = 0;
|
|
}
|
|
|
|
hlist_del(&clk->clks_node);
|
|
if (clk->min_rate > clk->core->req_rate ||
|
|
clk->max_rate < clk->core->req_rate)
|
|
clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
|
|
|
|
owner = clk->core->owner;
|
|
kref_put(&clk->core->ref, __clk_release);
|
|
|
|
clk_prepare_unlock();
|
|
|
|
module_put(owner);
|
|
|
|
kfree_const(clk->con_id);
|
|
kfree(clk);
|
|
}
|
|
|
|
/*** clk rate change notifiers ***/
|
|
|
|
/**
|
|
* clk_notifier_register - add a clk rate change notifier
|
|
* @clk: struct clk * to watch
|
|
* @nb: struct notifier_block * with callback info
|
|
*
|
|
* Request notification when clk's rate changes. This uses an SRCU
|
|
* notifier because we want it to block and notifier unregistrations are
|
|
* uncommon. The callbacks associated with the notifier must not
|
|
* re-enter into the clk framework by calling any top-level clk APIs;
|
|
* this will cause a nested prepare_lock mutex.
|
|
*
|
|
* In all notification cases (pre, post and abort rate change) the original
|
|
* clock rate is passed to the callback via struct clk_notifier_data.old_rate
|
|
* and the new frequency is passed via struct clk_notifier_data.new_rate.
|
|
*
|
|
* clk_notifier_register() must be called from non-atomic context.
|
|
* Returns -EINVAL if called with null arguments, -ENOMEM upon
|
|
* allocation failure; otherwise, passes along the return value of
|
|
* srcu_notifier_chain_register().
|
|
*/
|
|
int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
|
|
{
|
|
struct clk_notifier *cn;
|
|
int ret = -ENOMEM;
|
|
|
|
if (!clk || !nb)
|
|
return -EINVAL;
|
|
|
|
clk_prepare_lock();
|
|
|
|
/* search the list of notifiers for this clk */
|
|
list_for_each_entry(cn, &clk_notifier_list, node)
|
|
if (cn->clk == clk)
|
|
break;
|
|
|
|
/* if clk wasn't in the notifier list, allocate new clk_notifier */
|
|
if (cn->clk != clk) {
|
|
cn = kzalloc(sizeof(*cn), GFP_KERNEL);
|
|
if (!cn)
|
|
goto out;
|
|
|
|
cn->clk = clk;
|
|
srcu_init_notifier_head(&cn->notifier_head);
|
|
|
|
list_add(&cn->node, &clk_notifier_list);
|
|
}
|
|
|
|
ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
|
|
|
|
clk->core->notifier_count++;
|
|
|
|
out:
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_notifier_register);
|
|
|
|
/**
|
|
* clk_notifier_unregister - remove a clk rate change notifier
|
|
* @clk: struct clk *
|
|
* @nb: struct notifier_block * with callback info
|
|
*
|
|
* Request no further notification for changes to 'clk' and frees memory
|
|
* allocated in clk_notifier_register.
|
|
*
|
|
* Returns -EINVAL if called with null arguments; otherwise, passes
|
|
* along the return value of srcu_notifier_chain_unregister().
|
|
*/
|
|
int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
|
|
{
|
|
struct clk_notifier *cn = NULL;
|
|
int ret = -EINVAL;
|
|
|
|
if (!clk || !nb)
|
|
return -EINVAL;
|
|
|
|
clk_prepare_lock();
|
|
|
|
list_for_each_entry(cn, &clk_notifier_list, node)
|
|
if (cn->clk == clk)
|
|
break;
|
|
|
|
if (cn->clk == clk) {
|
|
ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
|
|
|
|
clk->core->notifier_count--;
|
|
|
|
/* XXX the notifier code should handle this better */
|
|
if (!cn->notifier_head.head) {
|
|
srcu_cleanup_notifier_head(&cn->notifier_head);
|
|
list_del(&cn->node);
|
|
kfree(cn);
|
|
}
|
|
|
|
} else {
|
|
ret = -ENOENT;
|
|
}
|
|
|
|
clk_prepare_unlock();
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(clk_notifier_unregister);
|
|
|
|
#ifdef CONFIG_OF
|
|
/**
|
|
* struct of_clk_provider - Clock provider registration structure
|
|
* @link: Entry in global list of clock providers
|
|
* @node: Pointer to device tree node of clock provider
|
|
* @get: Get clock callback. Returns NULL or a struct clk for the
|
|
* given clock specifier
|
|
* @data: context pointer to be passed into @get callback
|
|
*/
|
|
struct of_clk_provider {
|
|
struct list_head link;
|
|
|
|
struct device_node *node;
|
|
struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
|
|
struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data);
|
|
void *data;
|
|
};
|
|
|
|
static const struct of_device_id __clk_of_table_sentinel
|
|
__used __section(__clk_of_table_end);
|
|
|
|
static LIST_HEAD(of_clk_providers);
|
|
static DEFINE_MUTEX(of_clk_mutex);
|
|
|
|
struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
|
|
void *data)
|
|
{
|
|
return data;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
|
|
|
|
struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data)
|
|
{
|
|
return data;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_hw_simple_get);
|
|
|
|
struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
|
|
{
|
|
struct clk_onecell_data *clk_data = data;
|
|
unsigned int idx = clkspec->args[0];
|
|
|
|
if (idx >= clk_data->clk_num) {
|
|
pr_err("%s: invalid clock index %u\n", __func__, idx);
|
|
return ERR_PTR(-EINVAL);
|
|
}
|
|
|
|
return clk_data->clks[idx];
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
|
|
|
|
struct clk_hw *
|
|
of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data)
|
|
{
|
|
struct clk_hw_onecell_data *hw_data = data;
|
|
unsigned int idx = clkspec->args[0];
|
|
|
|
if (idx >= hw_data->num) {
|
|
pr_err("%s: invalid index %u\n", __func__, idx);
|
|
return ERR_PTR(-EINVAL);
|
|
}
|
|
|
|
return hw_data->hws[idx];
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get);
|
|
|
|
/**
|
|
* of_clk_add_provider() - Register a clock provider for a node
|
|
* @np: Device node pointer associated with clock provider
|
|
* @clk_src_get: callback for decoding clock
|
|
* @data: context pointer for @clk_src_get callback.
|
|
*/
|
|
int of_clk_add_provider(struct device_node *np,
|
|
struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
|
|
void *data),
|
|
void *data)
|
|
{
|
|
struct of_clk_provider *cp;
|
|
int ret;
|
|
|
|
cp = kzalloc(sizeof(*cp), GFP_KERNEL);
|
|
if (!cp)
|
|
return -ENOMEM;
|
|
|
|
cp->node = of_node_get(np);
|
|
cp->data = data;
|
|
cp->get = clk_src_get;
|
|
|
|
mutex_lock(&of_clk_mutex);
|
|
list_add(&cp->link, &of_clk_providers);
|
|
mutex_unlock(&of_clk_mutex);
|
|
pr_debug("Added clock from %pOF\n", np);
|
|
|
|
ret = of_clk_set_defaults(np, true);
|
|
if (ret < 0)
|
|
of_clk_del_provider(np);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_add_provider);
|
|
|
|
/**
|
|
* of_clk_add_hw_provider() - Register a clock provider for a node
|
|
* @np: Device node pointer associated with clock provider
|
|
* @get: callback for decoding clk_hw
|
|
* @data: context pointer for @get callback.
|
|
*/
|
|
int of_clk_add_hw_provider(struct device_node *np,
|
|
struct clk_hw *(*get)(struct of_phandle_args *clkspec,
|
|
void *data),
|
|
void *data)
|
|
{
|
|
struct of_clk_provider *cp;
|
|
int ret;
|
|
|
|
cp = kzalloc(sizeof(*cp), GFP_KERNEL);
|
|
if (!cp)
|
|
return -ENOMEM;
|
|
|
|
cp->node = of_node_get(np);
|
|
cp->data = data;
|
|
cp->get_hw = get;
|
|
|
|
mutex_lock(&of_clk_mutex);
|
|
list_add(&cp->link, &of_clk_providers);
|
|
mutex_unlock(&of_clk_mutex);
|
|
pr_debug("Added clk_hw provider from %pOF\n", np);
|
|
|
|
ret = of_clk_set_defaults(np, true);
|
|
if (ret < 0)
|
|
of_clk_del_provider(np);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_add_hw_provider);
|
|
|
|
static void devm_of_clk_release_provider(struct device *dev, void *res)
|
|
{
|
|
of_clk_del_provider(*(struct device_node **)res);
|
|
}
|
|
|
|
int devm_of_clk_add_hw_provider(struct device *dev,
|
|
struct clk_hw *(*get)(struct of_phandle_args *clkspec,
|
|
void *data),
|
|
void *data)
|
|
{
|
|
struct device_node **ptr, *np;
|
|
int ret;
|
|
|
|
ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr),
|
|
GFP_KERNEL);
|
|
if (!ptr)
|
|
return -ENOMEM;
|
|
|
|
np = dev->of_node;
|
|
ret = of_clk_add_hw_provider(np, get, data);
|
|
if (!ret) {
|
|
*ptr = np;
|
|
devres_add(dev, ptr);
|
|
} else {
|
|
devres_free(ptr);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider);
|
|
|
|
/**
|
|
* of_clk_del_provider() - Remove a previously registered clock provider
|
|
* @np: Device node pointer associated with clock provider
|
|
*/
|
|
void of_clk_del_provider(struct device_node *np)
|
|
{
|
|
struct of_clk_provider *cp;
|
|
|
|
mutex_lock(&of_clk_mutex);
|
|
list_for_each_entry(cp, &of_clk_providers, link) {
|
|
if (cp->node == np) {
|
|
list_del(&cp->link);
|
|
of_node_put(cp->node);
|
|
kfree(cp);
|
|
break;
|
|
}
|
|
}
|
|
mutex_unlock(&of_clk_mutex);
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_del_provider);
|
|
|
|
static int devm_clk_provider_match(struct device *dev, void *res, void *data)
|
|
{
|
|
struct device_node **np = res;
|
|
|
|
if (WARN_ON(!np || !*np))
|
|
return 0;
|
|
|
|
return *np == data;
|
|
}
|
|
|
|
void devm_of_clk_del_provider(struct device *dev)
|
|
{
|
|
int ret;
|
|
|
|
ret = devres_release(dev, devm_of_clk_release_provider,
|
|
devm_clk_provider_match, dev->of_node);
|
|
|
|
WARN_ON(ret);
|
|
}
|
|
EXPORT_SYMBOL(devm_of_clk_del_provider);
|
|
|
|
static struct clk_hw *
|
|
__of_clk_get_hw_from_provider(struct of_clk_provider *provider,
|
|
struct of_phandle_args *clkspec)
|
|
{
|
|
struct clk *clk;
|
|
|
|
if (provider->get_hw)
|
|
return provider->get_hw(clkspec, provider->data);
|
|
|
|
clk = provider->get(clkspec, provider->data);
|
|
if (IS_ERR(clk))
|
|
return ERR_CAST(clk);
|
|
return __clk_get_hw(clk);
|
|
}
|
|
|
|
struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
|
|
const char *dev_id, const char *con_id)
|
|
{
|
|
struct of_clk_provider *provider;
|
|
struct clk *clk = ERR_PTR(-EPROBE_DEFER);
|
|
struct clk_hw *hw;
|
|
|
|
if (!clkspec)
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
/* Check if we have such a provider in our array */
|
|
mutex_lock(&of_clk_mutex);
|
|
list_for_each_entry(provider, &of_clk_providers, link) {
|
|
if (provider->node == clkspec->np) {
|
|
hw = __of_clk_get_hw_from_provider(provider, clkspec);
|
|
clk = __clk_create_clk(hw, dev_id, con_id);
|
|
}
|
|
|
|
if (!IS_ERR(clk)) {
|
|
if (!__clk_get(clk)) {
|
|
__clk_free_clk(clk);
|
|
clk = ERR_PTR(-ENOENT);
|
|
}
|
|
|
|
break;
|
|
}
|
|
}
|
|
mutex_unlock(&of_clk_mutex);
|
|
|
|
return clk;
|
|
}
|
|
|
|
/**
|
|
* of_clk_get_from_provider() - Lookup a clock from a clock provider
|
|
* @clkspec: pointer to a clock specifier data structure
|
|
*
|
|
* This function looks up a struct clk from the registered list of clock
|
|
* providers, an input is a clock specifier data structure as returned
|
|
* from the of_parse_phandle_with_args() function call.
|
|
*/
|
|
struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
|
|
{
|
|
return __of_clk_get_from_provider(clkspec, NULL, __func__);
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_get_from_provider);
|
|
|
|
/**
|
|
* of_clk_get_parent_count() - Count the number of clocks a device node has
|
|
* @np: device node to count
|
|
*
|
|
* Returns: The number of clocks that are possible parents of this node
|
|
*/
|
|
unsigned int of_clk_get_parent_count(struct device_node *np)
|
|
{
|
|
int count;
|
|
|
|
count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
|
|
if (count < 0)
|
|
return 0;
|
|
|
|
return count;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
|
|
|
|
const char *of_clk_get_parent_name(struct device_node *np, int index)
|
|
{
|
|
struct of_phandle_args clkspec;
|
|
struct property *prop;
|
|
const char *clk_name;
|
|
const __be32 *vp;
|
|
u32 pv;
|
|
int rc;
|
|
int count;
|
|
struct clk *clk;
|
|
|
|
rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
|
|
&clkspec);
|
|
if (rc)
|
|
return NULL;
|
|
|
|
index = clkspec.args_count ? clkspec.args[0] : 0;
|
|
count = 0;
|
|
|
|
/* if there is an indices property, use it to transfer the index
|
|
* specified into an array offset for the clock-output-names property.
|
|
*/
|
|
of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
|
|
if (index == pv) {
|
|
index = count;
|
|
break;
|
|
}
|
|
count++;
|
|
}
|
|
/* We went off the end of 'clock-indices' without finding it */
|
|
if (prop && !vp)
|
|
return NULL;
|
|
|
|
if (of_property_read_string_index(clkspec.np, "clock-output-names",
|
|
index,
|
|
&clk_name) < 0) {
|
|
/*
|
|
* Best effort to get the name if the clock has been
|
|
* registered with the framework. If the clock isn't
|
|
* registered, we return the node name as the name of
|
|
* the clock as long as #clock-cells = 0.
|
|
*/
|
|
clk = of_clk_get_from_provider(&clkspec);
|
|
if (IS_ERR(clk)) {
|
|
if (clkspec.args_count == 0)
|
|
clk_name = clkspec.np->name;
|
|
else
|
|
clk_name = NULL;
|
|
} else {
|
|
clk_name = __clk_get_name(clk);
|
|
clk_put(clk);
|
|
}
|
|
}
|
|
|
|
|
|
of_node_put(clkspec.np);
|
|
return clk_name;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
|
|
|
|
/**
|
|
* of_clk_parent_fill() - Fill @parents with names of @np's parents and return
|
|
* number of parents
|
|
* @np: Device node pointer associated with clock provider
|
|
* @parents: pointer to char array that hold the parents' names
|
|
* @size: size of the @parents array
|
|
*
|
|
* Return: number of parents for the clock node.
|
|
*/
|
|
int of_clk_parent_fill(struct device_node *np, const char **parents,
|
|
unsigned int size)
|
|
{
|
|
unsigned int i = 0;
|
|
|
|
while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
|
|
i++;
|
|
|
|
return i;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_clk_parent_fill);
|
|
|
|
struct clock_provider {
|
|
void (*clk_init_cb)(struct device_node *);
|
|
struct device_node *np;
|
|
struct list_head node;
|
|
};
|
|
|
|
/*
|
|
* This function looks for a parent clock. If there is one, then it
|
|
* checks that the provider for this parent clock was initialized, in
|
|
* this case the parent clock will be ready.
|
|
*/
|
|
static int parent_ready(struct device_node *np)
|
|
{
|
|
int i = 0;
|
|
|
|
while (true) {
|
|
struct clk *clk = of_clk_get(np, i);
|
|
|
|
/* this parent is ready we can check the next one */
|
|
if (!IS_ERR(clk)) {
|
|
clk_put(clk);
|
|
i++;
|
|
continue;
|
|
}
|
|
|
|
/* at least one parent is not ready, we exit now */
|
|
if (PTR_ERR(clk) == -EPROBE_DEFER)
|
|
return 0;
|
|
|
|
/*
|
|
* Here we make assumption that the device tree is
|
|
* written correctly. So an error means that there is
|
|
* no more parent. As we didn't exit yet, then the
|
|
* previous parent are ready. If there is no clock
|
|
* parent, no need to wait for them, then we can
|
|
* consider their absence as being ready
|
|
*/
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
|
|
* @np: Device node pointer associated with clock provider
|
|
* @index: clock index
|
|
* @flags: pointer to top-level framework flags
|
|
*
|
|
* Detects if the clock-critical property exists and, if so, sets the
|
|
* corresponding CLK_IS_CRITICAL flag.
|
|
*
|
|
* Do not use this function. It exists only for legacy Device Tree
|
|
* bindings, such as the one-clock-per-node style that are outdated.
|
|
* Those bindings typically put all clock data into .dts and the Linux
|
|
* driver has no clock data, thus making it impossible to set this flag
|
|
* correctly from the driver. Only those drivers may call
|
|
* of_clk_detect_critical from their setup functions.
|
|
*
|
|
* Return: error code or zero on success
|
|
*/
|
|
int of_clk_detect_critical(struct device_node *np,
|
|
int index, unsigned long *flags)
|
|
{
|
|
struct property *prop;
|
|
const __be32 *cur;
|
|
uint32_t idx;
|
|
|
|
if (!np || !flags)
|
|
return -EINVAL;
|
|
|
|
of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
|
|
if (index == idx)
|
|
*flags |= CLK_IS_CRITICAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* of_clk_init() - Scan and init clock providers from the DT
|
|
* @matches: array of compatible values and init functions for providers.
|
|
*
|
|
* This function scans the device tree for matching clock providers
|
|
* and calls their initialization functions. It also does it by trying
|
|
* to follow the dependencies.
|
|
*/
|
|
void __init of_clk_init(const struct of_device_id *matches)
|
|
{
|
|
const struct of_device_id *match;
|
|
struct device_node *np;
|
|
struct clock_provider *clk_provider, *next;
|
|
bool is_init_done;
|
|
bool force = false;
|
|
LIST_HEAD(clk_provider_list);
|
|
|
|
if (!matches)
|
|
matches = &__clk_of_table;
|
|
|
|
/* First prepare the list of the clocks providers */
|
|
for_each_matching_node_and_match(np, matches, &match) {
|
|
struct clock_provider *parent;
|
|
|
|
if (!of_device_is_available(np))
|
|
continue;
|
|
|
|
parent = kzalloc(sizeof(*parent), GFP_KERNEL);
|
|
if (!parent) {
|
|
list_for_each_entry_safe(clk_provider, next,
|
|
&clk_provider_list, node) {
|
|
list_del(&clk_provider->node);
|
|
of_node_put(clk_provider->np);
|
|
kfree(clk_provider);
|
|
}
|
|
of_node_put(np);
|
|
return;
|
|
}
|
|
|
|
parent->clk_init_cb = match->data;
|
|
parent->np = of_node_get(np);
|
|
list_add_tail(&parent->node, &clk_provider_list);
|
|
}
|
|
|
|
while (!list_empty(&clk_provider_list)) {
|
|
is_init_done = false;
|
|
list_for_each_entry_safe(clk_provider, next,
|
|
&clk_provider_list, node) {
|
|
if (force || parent_ready(clk_provider->np)) {
|
|
|
|
/* Don't populate platform devices */
|
|
of_node_set_flag(clk_provider->np,
|
|
OF_POPULATED);
|
|
|
|
clk_provider->clk_init_cb(clk_provider->np);
|
|
of_clk_set_defaults(clk_provider->np, true);
|
|
|
|
list_del(&clk_provider->node);
|
|
of_node_put(clk_provider->np);
|
|
kfree(clk_provider);
|
|
is_init_done = true;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* We didn't manage to initialize any of the
|
|
* remaining providers during the last loop, so now we
|
|
* initialize all the remaining ones unconditionally
|
|
* in case the clock parent was not mandatory
|
|
*/
|
|
if (!is_init_done)
|
|
force = true;
|
|
}
|
|
}
|
|
#endif
|