mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2d3e4866de
support; virtual interrupt controller performance improvements; support for userspace virtual interrupt controller (slower, but necessary for KVM on the weird Broadcom SoCs used by the Raspberry Pi 3) * MIPS: basic support for hardware virtualization (ImgTec P5600/P6600/I6400 and Cavium Octeon III) * PPC: in-kernel acceleration for VFIO * s390: support for guests without storage keys; adapter interruption suppression * x86: usual range of nVMX improvements, notably nested EPT support for accessed and dirty bits; emulation of CPL3 CPUID faulting * generic: first part of VCPU thread request API; kvm_stat improvements -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJZEHUkAAoJEL/70l94x66DBeYH/09wrpJ2FjU4Rqv7FxmqgWfH 9WGi4wvn/Z+XzQSyfMJiu2SfZVzU69/Y67OMHudy7vBT6knB+ziM7Ntoiu/hUfbG 0g5KsDX79FW15HuvuuGh9kSjUsj7qsQdyPZwP4FW/6ZoDArV9mibSvdjSmiUSMV/ 2wxaoLzjoShdOuCe9EABaPhKK0XCrOYkygT6Paz1pItDxaSn8iW3ulaCuWMprUfG Niq+dFemK464E4yn6HVD88xg5j2eUM6bfuXB3qR3eTR76mHLgtwejBzZdDjLG9fk 32PNYKhJNomBxHVqtksJ9/7cSR6iNPs7neQ1XHemKWTuYqwYQMlPj1NDy0aslQU= =IsiZ -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM updates from Paolo Bonzini: "ARM: - HYP mode stub supports kexec/kdump on 32-bit - improved PMU support - virtual interrupt controller performance improvements - support for userspace virtual interrupt controller (slower, but necessary for KVM on the weird Broadcom SoCs used by the Raspberry Pi 3) MIPS: - basic support for hardware virtualization (ImgTec P5600/P6600/I6400 and Cavium Octeon III) PPC: - in-kernel acceleration for VFIO s390: - support for guests without storage keys - adapter interruption suppression x86: - usual range of nVMX improvements, notably nested EPT support for accessed and dirty bits - emulation of CPL3 CPUID faulting generic: - first part of VCPU thread request API - kvm_stat improvements" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (227 commits) kvm: nVMX: Don't validate disabled secondary controls KVM: put back #ifndef CONFIG_S390 around kvm_vcpu_kick Revert "KVM: Support vCPU-based gfn->hva cache" tools/kvm: fix top level makefile KVM: x86: don't hold kvm->lock in KVM_SET_GSI_ROUTING KVM: Documentation: remove VM mmap documentation kvm: nVMX: Remove superfluous VMX instruction fault checks KVM: x86: fix emulation of RSM and IRET instructions KVM: mark requests that need synchronization KVM: return if kvm_vcpu_wake_up() did wake up the VCPU KVM: add explicit barrier to kvm_vcpu_kick KVM: perform a wake_up in kvm_make_all_cpus_request KVM: mark requests that do not need a wakeup KVM: remove #ifndef CONFIG_S390 around kvm_vcpu_wake_up KVM: x86: always use kvm_make_request instead of set_bit KVM: add kvm_{test,clear}_request to replace {test,clear}_bit s390: kvm: Cpu model support for msa6, msa7 and msa8 KVM: x86: remove irq disablement around KVM_SET_CLOCK/KVM_GET_CLOCK kvm: better MWAIT emulation for guests KVM: x86: virtualize cpuid faulting ...
418 lines
10 KiB
C
418 lines
10 KiB
C
/*
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* Copyright (C) 2009 SUSE Linux Products GmbH. All rights reserved.
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*
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* Authors:
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* Alexander Graf <agraf@suse.de>
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* Kevin Wolf <mail@kevin-wolf.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/kvm_host.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/book3s/64/mmu-hash.h>
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#include <asm/machdep.h>
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#include <asm/mmu_context.h>
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#include <asm/hw_irq.h>
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#include "trace_pr.h"
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#include "book3s.h"
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#define PTE_SIZE 12
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void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
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{
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mmu_hash_ops.hpte_invalidate(pte->slot, pte->host_vpn,
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pte->pagesize, pte->pagesize,
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MMU_SEGSIZE_256M, false);
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}
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/* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using
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* a hash, so we don't waste cycles on looping */
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static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid)
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{
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return (u16)(((gvsid >> (SID_MAP_BITS * 7)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 6)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 5)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 4)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 3)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 2)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 1)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 0)) & SID_MAP_MASK));
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}
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static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid)
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{
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struct kvmppc_sid_map *map;
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u16 sid_map_mask;
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if (kvmppc_get_msr(vcpu) & MSR_PR)
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gvsid |= VSID_PR;
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sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
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map = &to_book3s(vcpu)->sid_map[sid_map_mask];
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if (map->valid && (map->guest_vsid == gvsid)) {
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trace_kvm_book3s_slb_found(gvsid, map->host_vsid);
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return map;
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}
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map = &to_book3s(vcpu)->sid_map[SID_MAP_MASK - sid_map_mask];
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if (map->valid && (map->guest_vsid == gvsid)) {
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trace_kvm_book3s_slb_found(gvsid, map->host_vsid);
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return map;
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}
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trace_kvm_book3s_slb_fail(sid_map_mask, gvsid);
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return NULL;
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}
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int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte,
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bool iswrite)
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{
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unsigned long vpn;
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kvm_pfn_t hpaddr;
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ulong hash, hpteg;
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u64 vsid;
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int ret;
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int rflags = 0x192;
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int vflags = 0;
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int attempt = 0;
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struct kvmppc_sid_map *map;
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int r = 0;
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int hpsize = MMU_PAGE_4K;
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bool writable;
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unsigned long mmu_seq;
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struct kvm *kvm = vcpu->kvm;
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struct hpte_cache *cpte;
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unsigned long gfn = orig_pte->raddr >> PAGE_SHIFT;
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unsigned long pfn;
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/* used to check for invalidations in progress */
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mmu_seq = kvm->mmu_notifier_seq;
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smp_rmb();
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/* Get host physical address for gpa */
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pfn = kvmppc_gpa_to_pfn(vcpu, orig_pte->raddr, iswrite, &writable);
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if (is_error_noslot_pfn(pfn)) {
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printk(KERN_INFO "Couldn't get guest page for gpa %lx!\n",
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orig_pte->raddr);
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r = -EINVAL;
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goto out;
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}
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hpaddr = pfn << PAGE_SHIFT;
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/* and write the mapping ea -> hpa into the pt */
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vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid);
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map = find_sid_vsid(vcpu, vsid);
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if (!map) {
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ret = kvmppc_mmu_map_segment(vcpu, orig_pte->eaddr);
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WARN_ON(ret < 0);
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map = find_sid_vsid(vcpu, vsid);
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}
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if (!map) {
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printk(KERN_ERR "KVM: Segment map for 0x%llx (0x%lx) failed\n",
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vsid, orig_pte->eaddr);
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WARN_ON(true);
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r = -EINVAL;
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goto out;
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}
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vpn = hpt_vpn(orig_pte->eaddr, map->host_vsid, MMU_SEGSIZE_256M);
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kvm_set_pfn_accessed(pfn);
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if (!orig_pte->may_write || !writable)
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rflags |= PP_RXRX;
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else {
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mark_page_dirty(vcpu->kvm, gfn);
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kvm_set_pfn_dirty(pfn);
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}
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if (!orig_pte->may_execute)
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rflags |= HPTE_R_N;
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else
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kvmppc_mmu_flush_icache(pfn);
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rflags = (rflags & ~HPTE_R_WIMG) | orig_pte->wimg;
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/*
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* Use 64K pages if possible; otherwise, on 64K page kernels,
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* we need to transfer 4 more bits from guest real to host real addr.
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*/
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if (vsid & VSID_64K)
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hpsize = MMU_PAGE_64K;
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else
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hpaddr |= orig_pte->raddr & (~0xfffULL & ~PAGE_MASK);
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hash = hpt_hash(vpn, mmu_psize_defs[hpsize].shift, MMU_SEGSIZE_256M);
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cpte = kvmppc_mmu_hpte_cache_next(vcpu);
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spin_lock(&kvm->mmu_lock);
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if (!cpte || mmu_notifier_retry(kvm, mmu_seq)) {
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r = -EAGAIN;
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goto out_unlock;
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}
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map_again:
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hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
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/* In case we tried normal mapping already, let's nuke old entries */
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if (attempt > 1)
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if (mmu_hash_ops.hpte_remove(hpteg) < 0) {
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r = -1;
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goto out_unlock;
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}
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ret = mmu_hash_ops.hpte_insert(hpteg, vpn, hpaddr, rflags, vflags,
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hpsize, hpsize, MMU_SEGSIZE_256M);
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if (ret == -1) {
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/* If we couldn't map a primary PTE, try a secondary */
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hash = ~hash;
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vflags ^= HPTE_V_SECONDARY;
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attempt++;
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goto map_again;
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} else if (ret < 0) {
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r = -EIO;
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goto out_unlock;
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} else {
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trace_kvm_book3s_64_mmu_map(rflags, hpteg,
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vpn, hpaddr, orig_pte);
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/*
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* The mmu_hash_ops code may give us a secondary entry even
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* though we asked for a primary. Fix up.
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*/
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if ((ret & _PTEIDX_SECONDARY) && !(vflags & HPTE_V_SECONDARY)) {
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hash = ~hash;
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hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
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}
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cpte->slot = hpteg + (ret & 7);
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cpte->host_vpn = vpn;
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cpte->pte = *orig_pte;
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cpte->pfn = pfn;
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cpte->pagesize = hpsize;
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kvmppc_mmu_hpte_cache_map(vcpu, cpte);
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cpte = NULL;
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}
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out_unlock:
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spin_unlock(&kvm->mmu_lock);
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kvm_release_pfn_clean(pfn);
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if (cpte)
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kvmppc_mmu_hpte_cache_free(cpte);
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out:
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return r;
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}
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void kvmppc_mmu_unmap_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
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{
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u64 mask = 0xfffffffffULL;
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u64 vsid;
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vcpu->arch.mmu.esid_to_vsid(vcpu, pte->eaddr >> SID_SHIFT, &vsid);
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if (vsid & VSID_64K)
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mask = 0xffffffff0ULL;
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kvmppc_mmu_pte_vflush(vcpu, pte->vpage, mask);
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}
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static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
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{
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unsigned long vsid_bits = VSID_BITS_65_256M;
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struct kvmppc_sid_map *map;
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struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
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u16 sid_map_mask;
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static int backwards_map = 0;
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if (kvmppc_get_msr(vcpu) & MSR_PR)
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gvsid |= VSID_PR;
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/* We might get collisions that trap in preceding order, so let's
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map them differently */
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sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
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if (backwards_map)
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sid_map_mask = SID_MAP_MASK - sid_map_mask;
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map = &to_book3s(vcpu)->sid_map[sid_map_mask];
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/* Make sure we're taking the other map next time */
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backwards_map = !backwards_map;
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/* Uh-oh ... out of mappings. Let's flush! */
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if (vcpu_book3s->proto_vsid_next == vcpu_book3s->proto_vsid_max) {
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vcpu_book3s->proto_vsid_next = vcpu_book3s->proto_vsid_first;
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memset(vcpu_book3s->sid_map, 0,
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sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
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kvmppc_mmu_pte_flush(vcpu, 0, 0);
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kvmppc_mmu_flush_segments(vcpu);
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}
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if (mmu_has_feature(MMU_FTR_68_BIT_VA))
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vsid_bits = VSID_BITS_256M;
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map->host_vsid = vsid_scramble(vcpu_book3s->proto_vsid_next++,
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VSID_MULTIPLIER_256M, vsid_bits);
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map->guest_vsid = gvsid;
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map->valid = true;
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trace_kvm_book3s_slb_map(sid_map_mask, gvsid, map->host_vsid);
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return map;
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}
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static int kvmppc_mmu_next_segment(struct kvm_vcpu *vcpu, ulong esid)
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{
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struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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int i;
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int max_slb_size = 64;
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int found_inval = -1;
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int r;
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/* Are we overwriting? */
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for (i = 0; i < svcpu->slb_max; i++) {
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if (!(svcpu->slb[i].esid & SLB_ESID_V))
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found_inval = i;
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else if ((svcpu->slb[i].esid & ESID_MASK) == esid) {
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r = i;
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goto out;
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}
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}
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/* Found a spare entry that was invalidated before */
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if (found_inval >= 0) {
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r = found_inval;
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goto out;
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}
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/* No spare invalid entry, so create one */
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if (mmu_slb_size < 64)
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max_slb_size = mmu_slb_size;
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/* Overflowing -> purge */
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if ((svcpu->slb_max) == max_slb_size)
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kvmppc_mmu_flush_segments(vcpu);
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r = svcpu->slb_max;
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svcpu->slb_max++;
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out:
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svcpu_put(svcpu);
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return r;
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}
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int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr)
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{
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struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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u64 esid = eaddr >> SID_SHIFT;
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u64 slb_esid = (eaddr & ESID_MASK) | SLB_ESID_V;
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u64 slb_vsid = SLB_VSID_USER;
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u64 gvsid;
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int slb_index;
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struct kvmppc_sid_map *map;
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int r = 0;
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slb_index = kvmppc_mmu_next_segment(vcpu, eaddr & ESID_MASK);
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if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) {
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/* Invalidate an entry */
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svcpu->slb[slb_index].esid = 0;
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r = -ENOENT;
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goto out;
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}
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map = find_sid_vsid(vcpu, gvsid);
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if (!map)
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map = create_sid_map(vcpu, gvsid);
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map->guest_esid = esid;
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slb_vsid |= (map->host_vsid << 12);
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slb_vsid &= ~SLB_VSID_KP;
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slb_esid |= slb_index;
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#ifdef CONFIG_PPC_64K_PAGES
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/* Set host segment base page size to 64K if possible */
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if (gvsid & VSID_64K)
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slb_vsid |= mmu_psize_defs[MMU_PAGE_64K].sllp;
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#endif
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svcpu->slb[slb_index].esid = slb_esid;
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svcpu->slb[slb_index].vsid = slb_vsid;
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trace_kvm_book3s_slbmte(slb_vsid, slb_esid);
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out:
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svcpu_put(svcpu);
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return r;
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}
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void kvmppc_mmu_flush_segment(struct kvm_vcpu *vcpu, ulong ea, ulong seg_size)
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{
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struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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ulong seg_mask = -seg_size;
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int i;
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for (i = 0; i < svcpu->slb_max; i++) {
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if ((svcpu->slb[i].esid & SLB_ESID_V) &&
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(svcpu->slb[i].esid & seg_mask) == ea) {
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/* Invalidate this entry */
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svcpu->slb[i].esid = 0;
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}
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}
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svcpu_put(svcpu);
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}
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void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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svcpu->slb_max = 0;
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svcpu->slb[0].esid = 0;
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svcpu_put(svcpu);
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}
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void kvmppc_mmu_destroy_pr(struct kvm_vcpu *vcpu)
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{
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kvmppc_mmu_hpte_destroy(vcpu);
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__destroy_context(to_book3s(vcpu)->context_id[0]);
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}
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int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
|
|
int err;
|
|
|
|
err = hash__alloc_context_id();
|
|
if (err < 0)
|
|
return -1;
|
|
vcpu3s->context_id[0] = err;
|
|
|
|
vcpu3s->proto_vsid_max = ((u64)(vcpu3s->context_id[0] + 1)
|
|
<< ESID_BITS) - 1;
|
|
vcpu3s->proto_vsid_first = (u64)vcpu3s->context_id[0] << ESID_BITS;
|
|
vcpu3s->proto_vsid_next = vcpu3s->proto_vsid_first;
|
|
|
|
kvmppc_mmu_hpte_init(vcpu);
|
|
|
|
return 0;
|
|
}
|