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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6c22ea3747
These exist to give NVKM information on the set of display paths that the DD needs to be active at any given time. Previously, the supervisor attempted to determine this solely from OR state, but there's a few configurations where this information on its own isn't enough to determine the specific display paths in question: - ANX9805, where the PIOR protocol for both DP and TMDS is TMDS. - On a device using DCB Switched Outputs. - On GM20x and newer, with a crossbar between the SOR and macro links. After this commit, the DD tells NVKM *exactly* which display path it's attempting a modeset on. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
96 lines
2.0 KiB
C
96 lines
2.0 KiB
C
#ifndef __NVIF_CL5070_H__
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#define __NVIF_CL5070_H__
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#define NV50_DISP_MTHD 0x00
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struct nv50_disp_mthd_v0 {
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__u8 version;
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#define NV50_DISP_SCANOUTPOS 0x00
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__u8 method;
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__u8 head;
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__u8 pad03[5];
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};
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struct nv50_disp_scanoutpos_v0 {
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__u8 version;
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__u8 pad01[7];
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__s64 time[2];
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__u16 vblanks;
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__u16 vblanke;
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__u16 vtotal;
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__u16 vline;
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__u16 hblanks;
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__u16 hblanke;
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__u16 htotal;
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__u16 hline;
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};
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struct nv50_disp_mthd_v1 {
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__u8 version;
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#define NV50_DISP_MTHD_V1_ACQUIRE 0x01
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#define NV50_DISP_MTHD_V1_RELEASE 0x02
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#define NV50_DISP_MTHD_V1_DAC_LOAD 0x11
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#define NV50_DISP_MTHD_V1_SOR_HDA_ELD 0x21
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#define NV50_DISP_MTHD_V1_SOR_HDMI_PWR 0x22
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#define NV50_DISP_MTHD_V1_SOR_LVDS_SCRIPT 0x23
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#define NV50_DISP_MTHD_V1_SOR_DP_MST_LINK 0x25
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#define NV50_DISP_MTHD_V1_SOR_DP_MST_VCPI 0x26
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__u8 method;
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__u16 hasht;
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__u16 hashm;
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__u8 pad06[2];
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};
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struct nv50_disp_acquire_v0 {
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__u8 version;
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__u8 or;
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__u8 link;
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__u8 pad03[5];
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};
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struct nv50_disp_dac_load_v0 {
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__u8 version;
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__u8 load;
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__u8 pad02[2];
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__u32 data;
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};
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struct nv50_disp_sor_hda_eld_v0 {
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__u8 version;
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__u8 pad01[7];
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__u8 data[];
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};
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struct nv50_disp_sor_hdmi_pwr_v0 {
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__u8 version;
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__u8 state;
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__u8 max_ac_packet;
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__u8 rekey;
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__u8 avi_infoframe_length;
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__u8 vendor_infoframe_length;
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__u8 pad06[2];
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};
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struct nv50_disp_sor_lvds_script_v0 {
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__u8 version;
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__u8 pad01[1];
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__u16 script;
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__u8 pad04[4];
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};
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struct nv50_disp_sor_dp_mst_link_v0 {
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__u8 version;
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__u8 state;
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__u8 pad02[6];
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};
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struct nv50_disp_sor_dp_mst_vcpi_v0 {
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__u8 version;
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__u8 pad01[1];
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__u8 start_slot;
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__u8 num_slots;
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__u16 pbn;
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__u16 aligned_pbn;
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};
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#endif
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