linux_dsm_epyc7002/arch
Kees Cook 873d50d58f x86/asm: Pin sensitive CR4 bits
Several recent exploits have used direct calls to the native_write_cr4()
function to disable SMEP and SMAP before then continuing their exploits
using userspace memory access.

Direct calls of this form can be mitigate by pinning bits of CR4 so that
they cannot be changed through a common function. This is not intended to
be a general ROP protection (which would require CFI to defend against
properly), but rather a way to avoid trivial direct function calling (or
CFI bypasses via a matching function prototype) as seen in:

https://googleprojectzero.blogspot.com/2017/05/exploiting-linux-kernel-via-packet.html
(https://github.com/xairy/kernel-exploits/tree/master/CVE-2017-7308)

The goals of this change:

 - Pin specific bits (SMEP, SMAP, and UMIP) when writing CR4.

 - Avoid setting the bits too early (they must become pinned only after
   CPU feature detection and selection has finished).

 - Pinning mask needs to be read-only during normal runtime.

 - Pinning needs to be checked after write to validate the cr4 state

Using __ro_after_init on the mask is done so it can't be first disabled
with a malicious write.

Since these bits are global state (once established by the boot CPU and
kernel boot parameters), they are safe to write to secondary CPUs before
those CPUs have finished feature detection. As such, the bits are set at
the first cr4 write, so that cr4 write bugs can be detected (instead of
silently papered over). This uses a few bytes less storage of a location we
don't have: read-only per-CPU data.

A check is performed after the register write because an attack could just
skip directly to the register write. Such a direct jump is possible because
of how this function may be built by the compiler (especially due to the
removal of frame pointers) where it doesn't add a stack frame (function
exit may only be a retq without pops) which is sufficient for trivial
exploitation like in the timer overwrites mentioned above).

The asm argument constraints gain the "+" modifier to convince the compiler
that it shouldn't make ordering assumptions about the arguments or memory,
and treat them as changed.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: kernel-hardening@lists.openwall.com
Link: https://lkml.kernel.org/r/20190618045503.39105-3-keescook@chromium.org
2019-06-22 11:55:22 +02:00
..
alpha treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 428 2019-06-05 17:37:16 +02:00
arc SPDX update for 5.2-rc4 2019-06-08 12:52:42 -07:00
arm treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 441 2019-06-05 17:37:17 +02:00
arm64 arm64 fixes for -rc5 2019-06-14 06:16:47 -10:00
c6x treewide: Add SPDX license identifier - Kbuild 2019-05-30 11:32:33 -07:00
csky treewide: Add SPDX license identifier - Kbuild 2019-05-30 11:32:33 -07:00
h8300 treewide: Add SPDX license identifier - Kbuild 2019-05-30 11:32:33 -07:00
hexagon treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 267 2019-06-05 17:30:29 +02:00
ia64 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 428 2019-06-05 17:37:16 +02:00
m68k treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285 2019-06-05 17:36:37 +02:00
microblaze treewide: Add SPDX license identifier - Kbuild 2019-05-30 11:32:33 -07:00
mips A batch of MIPS fixes: 2019-06-08 13:09:31 -07:00
nds32 nds32 patches for 5.2-rc3 2019-06-03 10:23:41 -07:00
nios2 treewide: Add SPDX license identifier - Kbuild 2019-05-30 11:32:33 -07:00
openrisc treewide: Add SPDX license identifier - Kbuild 2019-05-30 11:32:33 -07:00
parisc SPDX update for 5.2-rc4 2019-06-08 12:52:42 -07:00
powerpc powerpc fixes for 5.2 #4 2019-06-15 07:29:32 -10:00
riscv treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
s390 s390/unwind: correct stack switching during unwind 2019-06-07 15:20:44 +02:00
sh treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 211 2019-05-30 11:29:53 -07:00
sparc SPDX update for 5.2-rc4 2019-06-08 12:52:42 -07:00
um treewide: Add SPDX license identifier - Kbuild 2019-05-30 11:32:33 -07:00
unicore32 treewide: Add SPDX license identifier - Kbuild 2019-05-30 11:32:33 -07:00
x86 x86/asm: Pin sensitive CR4 bits 2019-06-22 11:55:22 +02:00
xtensa Xtensa fixes for v5.2-rc4 2019-06-07 13:06:00 -07:00
.gitignore
Kconfig Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2019-05-16 11:00:20 -07:00