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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 18:03:21 +07:00
c1c214adcb
For chain mode in cipher(eg. AES-CBC/DES-CBC), the iv is continuously
updated in the operation. The new iv value should be written to device
register by software.
Reported-by: Eric Biggers <ebiggers@google.com>
Fixes: 433cd2c617 ("crypto: rockchip - add crypto driver for rk3288")
Cc: <stable@vger.kernel.org> # v4.5+
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
277 lines
8.2 KiB
C
277 lines
8.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __RK3288_CRYPTO_H__
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#define __RK3288_CRYPTO_H__
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#include <crypto/aes.h>
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#include <crypto/des.h>
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#include <crypto/algapi.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <crypto/internal/hash.h>
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#include <crypto/md5.h>
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#include <crypto/sha.h>
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#define _SBF(v, f) ((v) << (f))
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/* Crypto control registers*/
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#define RK_CRYPTO_INTSTS 0x0000
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#define RK_CRYPTO_PKA_DONE_INT BIT(5)
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#define RK_CRYPTO_HASH_DONE_INT BIT(4)
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#define RK_CRYPTO_HRDMA_ERR_INT BIT(3)
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#define RK_CRYPTO_HRDMA_DONE_INT BIT(2)
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#define RK_CRYPTO_BCDMA_ERR_INT BIT(1)
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#define RK_CRYPTO_BCDMA_DONE_INT BIT(0)
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#define RK_CRYPTO_INTENA 0x0004
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#define RK_CRYPTO_PKA_DONE_ENA BIT(5)
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#define RK_CRYPTO_HASH_DONE_ENA BIT(4)
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#define RK_CRYPTO_HRDMA_ERR_ENA BIT(3)
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#define RK_CRYPTO_HRDMA_DONE_ENA BIT(2)
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#define RK_CRYPTO_BCDMA_ERR_ENA BIT(1)
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#define RK_CRYPTO_BCDMA_DONE_ENA BIT(0)
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#define RK_CRYPTO_CTRL 0x0008
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#define RK_CRYPTO_WRITE_MASK _SBF(0xFFFF, 16)
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#define RK_CRYPTO_TRNG_FLUSH BIT(9)
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#define RK_CRYPTO_TRNG_START BIT(8)
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#define RK_CRYPTO_PKA_FLUSH BIT(7)
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#define RK_CRYPTO_HASH_FLUSH BIT(6)
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#define RK_CRYPTO_BLOCK_FLUSH BIT(5)
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#define RK_CRYPTO_PKA_START BIT(4)
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#define RK_CRYPTO_HASH_START BIT(3)
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#define RK_CRYPTO_BLOCK_START BIT(2)
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#define RK_CRYPTO_TDES_START BIT(1)
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#define RK_CRYPTO_AES_START BIT(0)
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#define RK_CRYPTO_CONF 0x000c
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/* HASH Receive DMA Address Mode: fix | increment */
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#define RK_CRYPTO_HR_ADDR_MODE BIT(8)
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/* Block Transmit DMA Address Mode: fix | increment */
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#define RK_CRYPTO_BT_ADDR_MODE BIT(7)
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/* Block Receive DMA Address Mode: fix | increment */
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#define RK_CRYPTO_BR_ADDR_MODE BIT(6)
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#define RK_CRYPTO_BYTESWAP_HRFIFO BIT(5)
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#define RK_CRYPTO_BYTESWAP_BTFIFO BIT(4)
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#define RK_CRYPTO_BYTESWAP_BRFIFO BIT(3)
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/* AES = 0 OR DES = 1 */
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#define RK_CRYPTO_DESSEL BIT(2)
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#define RK_CYYPTO_HASHINSEL_INDEPENDENT_SOURCE _SBF(0x00, 0)
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#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT _SBF(0x01, 0)
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#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_OUTPUT _SBF(0x02, 0)
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/* Block Receiving DMA Start Address Register */
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#define RK_CRYPTO_BRDMAS 0x0010
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/* Block Transmitting DMA Start Address Register */
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#define RK_CRYPTO_BTDMAS 0x0014
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/* Block Receiving DMA Length Register */
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#define RK_CRYPTO_BRDMAL 0x0018
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/* Hash Receiving DMA Start Address Register */
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#define RK_CRYPTO_HRDMAS 0x001c
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/* Hash Receiving DMA Length Register */
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#define RK_CRYPTO_HRDMAL 0x0020
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/* AES registers */
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#define RK_CRYPTO_AES_CTRL 0x0080
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#define RK_CRYPTO_AES_BYTESWAP_CNT BIT(11)
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#define RK_CRYPTO_AES_BYTESWAP_KEY BIT(10)
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#define RK_CRYPTO_AES_BYTESWAP_IV BIT(9)
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#define RK_CRYPTO_AES_BYTESWAP_DO BIT(8)
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#define RK_CRYPTO_AES_BYTESWAP_DI BIT(7)
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#define RK_CRYPTO_AES_KEY_CHANGE BIT(6)
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#define RK_CRYPTO_AES_ECB_MODE _SBF(0x00, 4)
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#define RK_CRYPTO_AES_CBC_MODE _SBF(0x01, 4)
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#define RK_CRYPTO_AES_CTR_MODE _SBF(0x02, 4)
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#define RK_CRYPTO_AES_128BIT_key _SBF(0x00, 2)
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#define RK_CRYPTO_AES_192BIT_key _SBF(0x01, 2)
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#define RK_CRYPTO_AES_256BIT_key _SBF(0x02, 2)
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/* Slave = 0 / fifo = 1 */
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#define RK_CRYPTO_AES_FIFO_MODE BIT(1)
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/* Encryption = 0 , Decryption = 1 */
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#define RK_CRYPTO_AES_DEC BIT(0)
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#define RK_CRYPTO_AES_STS 0x0084
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#define RK_CRYPTO_AES_DONE BIT(0)
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/* AES Input Data 0-3 Register */
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#define RK_CRYPTO_AES_DIN_0 0x0088
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#define RK_CRYPTO_AES_DIN_1 0x008c
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#define RK_CRYPTO_AES_DIN_2 0x0090
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#define RK_CRYPTO_AES_DIN_3 0x0094
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/* AES output Data 0-3 Register */
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#define RK_CRYPTO_AES_DOUT_0 0x0098
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#define RK_CRYPTO_AES_DOUT_1 0x009c
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#define RK_CRYPTO_AES_DOUT_2 0x00a0
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#define RK_CRYPTO_AES_DOUT_3 0x00a4
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/* AES IV Data 0-3 Register */
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#define RK_CRYPTO_AES_IV_0 0x00a8
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#define RK_CRYPTO_AES_IV_1 0x00ac
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#define RK_CRYPTO_AES_IV_2 0x00b0
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#define RK_CRYPTO_AES_IV_3 0x00b4
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/* AES Key Data 0-3 Register */
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#define RK_CRYPTO_AES_KEY_0 0x00b8
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#define RK_CRYPTO_AES_KEY_1 0x00bc
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#define RK_CRYPTO_AES_KEY_2 0x00c0
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#define RK_CRYPTO_AES_KEY_3 0x00c4
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#define RK_CRYPTO_AES_KEY_4 0x00c8
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#define RK_CRYPTO_AES_KEY_5 0x00cc
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#define RK_CRYPTO_AES_KEY_6 0x00d0
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#define RK_CRYPTO_AES_KEY_7 0x00d4
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/* des/tdes */
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#define RK_CRYPTO_TDES_CTRL 0x0100
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#define RK_CRYPTO_TDES_BYTESWAP_KEY BIT(8)
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#define RK_CRYPTO_TDES_BYTESWAP_IV BIT(7)
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#define RK_CRYPTO_TDES_BYTESWAP_DO BIT(6)
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#define RK_CRYPTO_TDES_BYTESWAP_DI BIT(5)
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/* 0: ECB, 1: CBC */
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#define RK_CRYPTO_TDES_CHAINMODE_CBC BIT(4)
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/* TDES Key Mode, 0 : EDE, 1 : EEE */
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#define RK_CRYPTO_TDES_EEE BIT(3)
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/* 0: DES, 1:TDES */
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#define RK_CRYPTO_TDES_SELECT BIT(2)
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/* 0: Slave, 1:Fifo */
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#define RK_CRYPTO_TDES_FIFO_MODE BIT(1)
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/* Encryption = 0 , Decryption = 1 */
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#define RK_CRYPTO_TDES_DEC BIT(0)
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#define RK_CRYPTO_TDES_STS 0x0104
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#define RK_CRYPTO_TDES_DONE BIT(0)
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#define RK_CRYPTO_TDES_DIN_0 0x0108
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#define RK_CRYPTO_TDES_DIN_1 0x010c
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#define RK_CRYPTO_TDES_DOUT_0 0x0110
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#define RK_CRYPTO_TDES_DOUT_1 0x0114
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#define RK_CRYPTO_TDES_IV_0 0x0118
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#define RK_CRYPTO_TDES_IV_1 0x011c
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#define RK_CRYPTO_TDES_KEY1_0 0x0120
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#define RK_CRYPTO_TDES_KEY1_1 0x0124
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#define RK_CRYPTO_TDES_KEY2_0 0x0128
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#define RK_CRYPTO_TDES_KEY2_1 0x012c
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#define RK_CRYPTO_TDES_KEY3_0 0x0130
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#define RK_CRYPTO_TDES_KEY3_1 0x0134
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/* HASH */
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#define RK_CRYPTO_HASH_CTRL 0x0180
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#define RK_CRYPTO_HASH_SWAP_DO BIT(3)
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#define RK_CRYPTO_HASH_SWAP_DI BIT(2)
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#define RK_CRYPTO_HASH_SHA1 _SBF(0x00, 0)
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#define RK_CRYPTO_HASH_MD5 _SBF(0x01, 0)
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#define RK_CRYPTO_HASH_SHA256 _SBF(0x02, 0)
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#define RK_CRYPTO_HASH_PRNG _SBF(0x03, 0)
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#define RK_CRYPTO_HASH_STS 0x0184
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#define RK_CRYPTO_HASH_DONE BIT(0)
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#define RK_CRYPTO_HASH_MSG_LEN 0x0188
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#define RK_CRYPTO_HASH_DOUT_0 0x018c
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#define RK_CRYPTO_HASH_DOUT_1 0x0190
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#define RK_CRYPTO_HASH_DOUT_2 0x0194
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#define RK_CRYPTO_HASH_DOUT_3 0x0198
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#define RK_CRYPTO_HASH_DOUT_4 0x019c
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#define RK_CRYPTO_HASH_DOUT_5 0x01a0
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#define RK_CRYPTO_HASH_DOUT_6 0x01a4
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#define RK_CRYPTO_HASH_DOUT_7 0x01a8
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#define CRYPTO_READ(dev, offset) \
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readl_relaxed(((dev)->reg + (offset)))
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#define CRYPTO_WRITE(dev, offset, val) \
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writel_relaxed((val), ((dev)->reg + (offset)))
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struct rk_crypto_info {
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struct device *dev;
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struct clk *aclk;
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struct clk *hclk;
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struct clk *sclk;
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struct clk *dmaclk;
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struct reset_control *rst;
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void __iomem *reg;
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int irq;
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struct crypto_queue queue;
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struct tasklet_struct queue_task;
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struct tasklet_struct done_task;
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struct crypto_async_request *async_req;
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int err;
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/* device lock */
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spinlock_t lock;
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/* the public variable */
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struct scatterlist *sg_src;
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struct scatterlist *sg_dst;
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struct scatterlist sg_tmp;
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struct scatterlist *first;
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unsigned int left_bytes;
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void *addr_vir;
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int aligned;
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int align_size;
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size_t src_nents;
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size_t dst_nents;
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unsigned int total;
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unsigned int count;
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dma_addr_t addr_in;
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dma_addr_t addr_out;
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bool busy;
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int (*start)(struct rk_crypto_info *dev);
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int (*update)(struct rk_crypto_info *dev);
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void (*complete)(struct crypto_async_request *base, int err);
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int (*enable_clk)(struct rk_crypto_info *dev);
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void (*disable_clk)(struct rk_crypto_info *dev);
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int (*load_data)(struct rk_crypto_info *dev,
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struct scatterlist *sg_src,
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struct scatterlist *sg_dst);
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void (*unload_data)(struct rk_crypto_info *dev);
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int (*enqueue)(struct rk_crypto_info *dev,
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struct crypto_async_request *async_req);
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};
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/* the private variable of hash */
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struct rk_ahash_ctx {
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struct rk_crypto_info *dev;
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/* for fallback */
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struct crypto_ahash *fallback_tfm;
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};
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/* the privete variable of hash for fallback */
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struct rk_ahash_rctx {
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struct ahash_request fallback_req;
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u32 mode;
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};
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/* the private variable of cipher */
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struct rk_cipher_ctx {
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struct rk_crypto_info *dev;
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unsigned int keylen;
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u32 mode;
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u8 iv[AES_BLOCK_SIZE];
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};
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enum alg_type {
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ALG_TYPE_HASH,
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ALG_TYPE_CIPHER,
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};
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struct rk_crypto_tmp {
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struct rk_crypto_info *dev;
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union {
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struct crypto_alg crypto;
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struct ahash_alg hash;
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} alg;
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enum alg_type type;
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};
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extern struct rk_crypto_tmp rk_ecb_aes_alg;
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extern struct rk_crypto_tmp rk_cbc_aes_alg;
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extern struct rk_crypto_tmp rk_ecb_des_alg;
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extern struct rk_crypto_tmp rk_cbc_des_alg;
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extern struct rk_crypto_tmp rk_ecb_des3_ede_alg;
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extern struct rk_crypto_tmp rk_cbc_des3_ede_alg;
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extern struct rk_crypto_tmp rk_ahash_sha1;
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extern struct rk_crypto_tmp rk_ahash_sha256;
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extern struct rk_crypto_tmp rk_ahash_md5;
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#endif
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