mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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30c67e93c5
The usual selection of bug fixes and driver updates for GPIO. Nothing really stands out except the addition of the GRGPIO driver and some enhacements to ACPI support -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJRhuKVAAoJEEFnBt12D9kB8kUP/21N7fsCxNocqoIwX8VQPfEY KsXUKRstuETHERHpGCSvMuRAEy1vee9itijrmWOiQT09jztIxg3Sed3u0RCQjQEK mV87RdAObZzm6xTIpy5sQa1bMOlc2AzYhTDDr9f1OpU+L9XMhwq03wq/i74Zij3w 7vq5BkBfGWF84TY5ZG1SNIvtw9P2MYoCHtJKvFyTJWAH05m2bHSfuvvn8vIdcUBL TuVwoeUzbYJtTJatovkh0kyMOOZEh9JVWBPBTNNLyYDmpAKQ6RwBoAi0ZznmF4mk gp88dj6iMHebi7UnlDQJD5crw16cRoMh0pa3EBAjYM0IVhfn8AvFIhma34wTs1Z/ ZuWwwHeR93cQTKwMBT1OHRCPaOdjS5riAR4WJm5Tmq9dV0sjGlbwff26U1uHH8qX mTBA+tje4bVpSHEztmXyw0AOMUv2vid5P0F/sKtEHzfURf8Yjq8xvxyvq14T3dQQ /wzmdLKbzR05phft7Xxa4yzfSy46uvxyUJQQaKdU/jlay/gJFisJXJE0cOrwTOFo SpTCmjnacr8Tlqr04Fj8f8ZgOYrg5VAOUsVE8uY0ETWRCb7iezFw7JGE3qV1kZQk N1lPBbSnIwtkdMiEmyttxpFEb5PwJxX8pUP6JfNyMbMlHoZs2247SeakhRQs/OCx goJQEGz6eeOpvq7koiJg =PwUd -----END PGP SIGNATURE----- Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux Pull GPIO changes from Grant Likely: "The usual selection of bug fixes and driver updates for GPIO. Nothing really stands out except the addition of the GRGPIO driver and some enhacements to ACPI support" I'm pulling this despite the earlier mess. Let's hope it compiles these days. * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux: (46 commits) gpio: grgpio: Add irq support gpio: grgpio: Add device driver for GRGPIO cores gpiolib-acpi: introduce acpi_get_gpio_by_index() helper GPIO: gpio-generic: remove kfree() from bgpio_remove call gpio / ACPI: Handle ACPI events in accordance with the spec gpio: lpc32xx: Fix off-by-one valid range checking for bank gpio: mcp23s08: convert driver to DT gpio/omap: force restore if context loss is not detectable gpio/omap: optimise interrupt service routine gpio/omap: remove extra context restores in *_runtime_resume() gpio/omap: free irq domain in probe() failure paths gpio: gpio-generic: Add 16 and 32 bit big endian byte order support gpio: samsung: Add terminating entry for exynos_pinctrl_ids gpio: mvebu: add dbg_show function MAX7301 GPIO: Do not force SPI speed when using OF Platform gpio: gpio-tps65910.c: fix checkpatch error gpio: gpio-timberdale.c: fix checkpatch error gpio: gpio-tc3589x.c: fix checkpatch errors gpio: gpio-stp-xway.c: fix checkpatch error gpio: gpio-sch.c: fix checkpatch error ...
869 lines
20 KiB
C
869 lines
20 KiB
C
/*
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* PCA953x 4/8/16 bit I/O ports
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*
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* Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
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* Copyright (C) 2007 Marvell International Ltd.
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*
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* Derived from drivers/i2c/chips/pca9539.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/gpio.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/i2c.h>
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#include <linux/i2c/pca953x.h>
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#include <linux/slab.h>
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#ifdef CONFIG_OF_GPIO
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#include <linux/of_platform.h>
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#endif
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#define PCA953X_INPUT 0
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#define PCA953X_OUTPUT 1
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#define PCA953X_INVERT 2
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#define PCA953X_DIRECTION 3
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#define REG_ADDR_AI 0x80
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#define PCA957X_IN 0
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#define PCA957X_INVRT 1
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#define PCA957X_BKEN 2
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#define PCA957X_PUPD 3
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#define PCA957X_CFG 4
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#define PCA957X_OUT 5
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#define PCA957X_MSK 6
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#define PCA957X_INTS 7
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#define PCA_GPIO_MASK 0x00FF
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#define PCA_INT 0x0100
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#define PCA953X_TYPE 0x1000
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#define PCA957X_TYPE 0x2000
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static const struct i2c_device_id pca953x_id[] = {
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{ "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
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{ "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
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{ "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
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{ "pca9536", 4 | PCA953X_TYPE, },
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{ "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
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{ "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
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{ "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
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{ "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
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{ "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
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{ "pca9556", 8 | PCA953X_TYPE, },
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{ "pca9557", 8 | PCA953X_TYPE, },
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{ "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
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{ "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
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{ "max7310", 8 | PCA953X_TYPE, },
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{ "max7312", 16 | PCA953X_TYPE | PCA_INT, },
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{ "max7313", 16 | PCA953X_TYPE | PCA_INT, },
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{ "max7315", 8 | PCA953X_TYPE | PCA_INT, },
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{ "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
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{ "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
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{ "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
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{ "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, pca953x_id);
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#define MAX_BANK 5
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#define BANK_SZ 8
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#define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
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struct pca953x_chip {
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unsigned gpio_start;
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u8 reg_output[MAX_BANK];
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u8 reg_direction[MAX_BANK];
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struct mutex i2c_lock;
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#ifdef CONFIG_GPIO_PCA953X_IRQ
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struct mutex irq_lock;
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u8 irq_mask[MAX_BANK];
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u8 irq_stat[MAX_BANK];
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u8 irq_trig_raise[MAX_BANK];
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u8 irq_trig_fall[MAX_BANK];
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struct irq_domain *domain;
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#endif
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struct i2c_client *client;
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struct gpio_chip gpio_chip;
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const char *const *names;
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int chip_type;
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};
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static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
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int off)
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{
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int ret;
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int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
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int offset = off / BANK_SZ;
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ret = i2c_smbus_read_byte_data(chip->client,
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(reg << bank_shift) + offset);
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*val = ret;
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if (ret < 0) {
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dev_err(&chip->client->dev, "failed reading register\n");
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return ret;
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}
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return 0;
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}
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static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
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int off)
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{
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int ret = 0;
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int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
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int offset = off / BANK_SZ;
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ret = i2c_smbus_write_byte_data(chip->client,
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(reg << bank_shift) + offset, val);
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if (ret < 0) {
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dev_err(&chip->client->dev, "failed writing register\n");
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return ret;
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}
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return 0;
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}
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static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
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{
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int ret = 0;
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if (chip->gpio_chip.ngpio <= 8)
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ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
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else if (chip->gpio_chip.ngpio >= 24) {
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int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
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ret = i2c_smbus_write_i2c_block_data(chip->client,
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(reg << bank_shift) | REG_ADDR_AI,
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NBANK(chip), val);
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} else {
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switch (chip->chip_type) {
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case PCA953X_TYPE:
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ret = i2c_smbus_write_word_data(chip->client,
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reg << 1, (u16) *val);
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break;
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case PCA957X_TYPE:
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ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
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val[0]);
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if (ret < 0)
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break;
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ret = i2c_smbus_write_byte_data(chip->client,
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(reg << 1) + 1,
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val[1]);
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break;
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}
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}
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if (ret < 0) {
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dev_err(&chip->client->dev, "failed writing register\n");
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return ret;
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}
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return 0;
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}
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static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
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{
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int ret;
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if (chip->gpio_chip.ngpio <= 8) {
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ret = i2c_smbus_read_byte_data(chip->client, reg);
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*val = ret;
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} else if (chip->gpio_chip.ngpio >= 24) {
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int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
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ret = i2c_smbus_read_i2c_block_data(chip->client,
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(reg << bank_shift) | REG_ADDR_AI,
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NBANK(chip), val);
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} else {
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ret = i2c_smbus_read_word_data(chip->client, reg << 1);
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val[0] = (u16)ret & 0xFF;
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val[1] = (u16)ret >> 8;
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}
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if (ret < 0) {
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dev_err(&chip->client->dev, "failed reading register\n");
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return ret;
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}
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return 0;
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}
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static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
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{
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struct pca953x_chip *chip;
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u8 reg_val;
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int ret, offset = 0;
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chip = container_of(gc, struct pca953x_chip, gpio_chip);
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mutex_lock(&chip->i2c_lock);
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reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
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switch (chip->chip_type) {
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case PCA953X_TYPE:
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offset = PCA953X_DIRECTION;
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break;
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case PCA957X_TYPE:
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offset = PCA957X_CFG;
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break;
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}
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ret = pca953x_write_single(chip, offset, reg_val, off);
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if (ret)
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goto exit;
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chip->reg_direction[off / BANK_SZ] = reg_val;
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ret = 0;
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exit:
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mutex_unlock(&chip->i2c_lock);
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return ret;
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}
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static int pca953x_gpio_direction_output(struct gpio_chip *gc,
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unsigned off, int val)
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{
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struct pca953x_chip *chip;
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u8 reg_val;
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int ret, offset = 0;
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chip = container_of(gc, struct pca953x_chip, gpio_chip);
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mutex_lock(&chip->i2c_lock);
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/* set output level */
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if (val)
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reg_val = chip->reg_output[off / BANK_SZ]
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| (1u << (off % BANK_SZ));
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else
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reg_val = chip->reg_output[off / BANK_SZ]
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& ~(1u << (off % BANK_SZ));
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switch (chip->chip_type) {
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case PCA953X_TYPE:
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offset = PCA953X_OUTPUT;
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break;
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case PCA957X_TYPE:
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offset = PCA957X_OUT;
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break;
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}
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ret = pca953x_write_single(chip, offset, reg_val, off);
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if (ret)
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goto exit;
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chip->reg_output[off / BANK_SZ] = reg_val;
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/* then direction */
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reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
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switch (chip->chip_type) {
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case PCA953X_TYPE:
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offset = PCA953X_DIRECTION;
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break;
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case PCA957X_TYPE:
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offset = PCA957X_CFG;
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break;
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}
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ret = pca953x_write_single(chip, offset, reg_val, off);
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if (ret)
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goto exit;
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chip->reg_direction[off / BANK_SZ] = reg_val;
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ret = 0;
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exit:
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mutex_unlock(&chip->i2c_lock);
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return ret;
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}
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static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
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{
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struct pca953x_chip *chip;
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u32 reg_val;
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int ret, offset = 0;
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chip = container_of(gc, struct pca953x_chip, gpio_chip);
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mutex_lock(&chip->i2c_lock);
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switch (chip->chip_type) {
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case PCA953X_TYPE:
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offset = PCA953X_INPUT;
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break;
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case PCA957X_TYPE:
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offset = PCA957X_IN;
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break;
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}
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ret = pca953x_read_single(chip, offset, ®_val, off);
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mutex_unlock(&chip->i2c_lock);
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if (ret < 0) {
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/* NOTE: diagnostic already emitted; that's all we should
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* do unless gpio_*_value_cansleep() calls become different
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* from their nonsleeping siblings (and report faults).
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*/
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return 0;
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}
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return (reg_val & (1u << off)) ? 1 : 0;
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}
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static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
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{
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struct pca953x_chip *chip;
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u8 reg_val;
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int ret, offset = 0;
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chip = container_of(gc, struct pca953x_chip, gpio_chip);
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mutex_lock(&chip->i2c_lock);
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if (val)
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reg_val = chip->reg_output[off / BANK_SZ]
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| (1u << (off % BANK_SZ));
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else
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reg_val = chip->reg_output[off / BANK_SZ]
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& ~(1u << (off % BANK_SZ));
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switch (chip->chip_type) {
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case PCA953X_TYPE:
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offset = PCA953X_OUTPUT;
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break;
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case PCA957X_TYPE:
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offset = PCA957X_OUT;
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break;
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}
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ret = pca953x_write_single(chip, offset, reg_val, off);
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if (ret)
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goto exit;
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chip->reg_output[off / BANK_SZ] = reg_val;
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exit:
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mutex_unlock(&chip->i2c_lock);
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}
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static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
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{
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struct gpio_chip *gc;
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gc = &chip->gpio_chip;
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gc->direction_input = pca953x_gpio_direction_input;
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gc->direction_output = pca953x_gpio_direction_output;
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gc->get = pca953x_gpio_get_value;
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gc->set = pca953x_gpio_set_value;
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gc->can_sleep = 1;
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gc->base = chip->gpio_start;
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gc->ngpio = gpios;
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gc->label = chip->client->name;
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gc->dev = &chip->client->dev;
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gc->owner = THIS_MODULE;
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gc->names = chip->names;
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}
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#ifdef CONFIG_GPIO_PCA953X_IRQ
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static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
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{
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struct pca953x_chip *chip;
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chip = container_of(gc, struct pca953x_chip, gpio_chip);
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return irq_create_mapping(chip->domain, off);
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}
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static void pca953x_irq_mask(struct irq_data *d)
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{
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struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
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chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
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}
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static void pca953x_irq_unmask(struct irq_data *d)
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{
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struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
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chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
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}
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static void pca953x_irq_bus_lock(struct irq_data *d)
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{
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struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
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mutex_lock(&chip->irq_lock);
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}
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static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
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{
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struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
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u8 new_irqs;
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int level, i;
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/* Look for any newly setup interrupt */
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for (i = 0; i < NBANK(chip); i++) {
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new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
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new_irqs &= ~chip->reg_direction[i];
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|
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while (new_irqs) {
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level = __ffs(new_irqs);
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pca953x_gpio_direction_input(&chip->gpio_chip,
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level + (BANK_SZ * i));
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new_irqs &= ~(1 << level);
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}
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}
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|
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mutex_unlock(&chip->irq_lock);
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}
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|
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static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
|
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{
|
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struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
|
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int bank_nb = d->hwirq / BANK_SZ;
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u8 mask = 1 << (d->hwirq % BANK_SZ);
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|
|
if (!(type & IRQ_TYPE_EDGE_BOTH)) {
|
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dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
|
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d->irq, type);
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return -EINVAL;
|
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}
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|
|
if (type & IRQ_TYPE_EDGE_FALLING)
|
|
chip->irq_trig_fall[bank_nb] |= mask;
|
|
else
|
|
chip->irq_trig_fall[bank_nb] &= ~mask;
|
|
|
|
if (type & IRQ_TYPE_EDGE_RISING)
|
|
chip->irq_trig_raise[bank_nb] |= mask;
|
|
else
|
|
chip->irq_trig_raise[bank_nb] &= ~mask;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct irq_chip pca953x_irq_chip = {
|
|
.name = "pca953x",
|
|
.irq_mask = pca953x_irq_mask,
|
|
.irq_unmask = pca953x_irq_unmask,
|
|
.irq_bus_lock = pca953x_irq_bus_lock,
|
|
.irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
|
|
.irq_set_type = pca953x_irq_set_type,
|
|
};
|
|
|
|
static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
|
|
{
|
|
u8 cur_stat[MAX_BANK];
|
|
u8 old_stat[MAX_BANK];
|
|
u8 pendings = 0;
|
|
u8 trigger[MAX_BANK], triggers = 0;
|
|
int ret, i, offset = 0;
|
|
|
|
switch (chip->chip_type) {
|
|
case PCA953X_TYPE:
|
|
offset = PCA953X_INPUT;
|
|
break;
|
|
case PCA957X_TYPE:
|
|
offset = PCA957X_IN;
|
|
break;
|
|
}
|
|
ret = pca953x_read_regs(chip, offset, cur_stat);
|
|
if (ret)
|
|
return 0;
|
|
|
|
/* Remove output pins from the equation */
|
|
for (i = 0; i < NBANK(chip); i++)
|
|
cur_stat[i] &= chip->reg_direction[i];
|
|
|
|
memcpy(old_stat, chip->irq_stat, NBANK(chip));
|
|
|
|
for (i = 0; i < NBANK(chip); i++) {
|
|
trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
|
|
triggers += trigger[i];
|
|
}
|
|
|
|
if (!triggers)
|
|
return 0;
|
|
|
|
memcpy(chip->irq_stat, cur_stat, NBANK(chip));
|
|
|
|
for (i = 0; i < NBANK(chip); i++) {
|
|
pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
|
|
(cur_stat[i] & chip->irq_trig_raise[i]);
|
|
pending[i] &= trigger[i];
|
|
pendings += pending[i];
|
|
}
|
|
|
|
return pendings;
|
|
}
|
|
|
|
static irqreturn_t pca953x_irq_handler(int irq, void *devid)
|
|
{
|
|
struct pca953x_chip *chip = devid;
|
|
u8 pending[MAX_BANK];
|
|
u8 level;
|
|
int i;
|
|
|
|
if (!pca953x_irq_pending(chip, pending))
|
|
return IRQ_HANDLED;
|
|
|
|
for (i = 0; i < NBANK(chip); i++) {
|
|
while (pending[i]) {
|
|
level = __ffs(pending[i]);
|
|
handle_nested_irq(irq_find_mapping(chip->domain,
|
|
level + (BANK_SZ * i)));
|
|
pending[i] &= ~(1 << level);
|
|
}
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int pca953x_gpio_irq_map(struct irq_domain *d, unsigned int irq,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
irq_clear_status_flags(irq, IRQ_NOREQUEST);
|
|
irq_set_chip_data(irq, d->host_data);
|
|
irq_set_chip(irq, &pca953x_irq_chip);
|
|
irq_set_nested_thread(irq, true);
|
|
#ifdef CONFIG_ARM
|
|
set_irq_flags(irq, IRQF_VALID);
|
|
#else
|
|
irq_set_noprobe(irq);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct irq_domain_ops pca953x_irq_simple_ops = {
|
|
.map = pca953x_gpio_irq_map,
|
|
.xlate = irq_domain_xlate_twocell,
|
|
};
|
|
|
|
static int pca953x_irq_setup(struct pca953x_chip *chip,
|
|
const struct i2c_device_id *id,
|
|
int irq_base)
|
|
{
|
|
struct i2c_client *client = chip->client;
|
|
int ret, i, offset = 0;
|
|
|
|
if (irq_base != -1
|
|
&& (id->driver_data & PCA_INT)) {
|
|
|
|
switch (chip->chip_type) {
|
|
case PCA953X_TYPE:
|
|
offset = PCA953X_INPUT;
|
|
break;
|
|
case PCA957X_TYPE:
|
|
offset = PCA957X_IN;
|
|
break;
|
|
}
|
|
ret = pca953x_read_regs(chip, offset, chip->irq_stat);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/*
|
|
* There is no way to know which GPIO line generated the
|
|
* interrupt. We have to rely on the previous read for
|
|
* this purpose.
|
|
*/
|
|
for (i = 0; i < NBANK(chip); i++)
|
|
chip->irq_stat[i] &= chip->reg_direction[i];
|
|
mutex_init(&chip->irq_lock);
|
|
|
|
chip->domain = irq_domain_add_simple(client->dev.of_node,
|
|
chip->gpio_chip.ngpio,
|
|
irq_base,
|
|
&pca953x_irq_simple_ops,
|
|
chip);
|
|
if (!chip->domain)
|
|
return -ENODEV;
|
|
|
|
ret = devm_request_threaded_irq(&client->dev,
|
|
client->irq,
|
|
NULL,
|
|
pca953x_irq_handler,
|
|
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
|
|
dev_name(&client->dev), chip);
|
|
if (ret) {
|
|
dev_err(&client->dev, "failed to request irq %d\n",
|
|
client->irq);
|
|
return ret;
|
|
}
|
|
|
|
chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#else /* CONFIG_GPIO_PCA953X_IRQ */
|
|
static int pca953x_irq_setup(struct pca953x_chip *chip,
|
|
const struct i2c_device_id *id,
|
|
int irq_base)
|
|
{
|
|
struct i2c_client *client = chip->client;
|
|
|
|
if (irq_base != -1 && (id->driver_data & PCA_INT))
|
|
dev_warn(&client->dev, "interrupt support not compiled in\n");
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Handlers for alternative sources of platform_data
|
|
*/
|
|
#ifdef CONFIG_OF_GPIO
|
|
/*
|
|
* Translate OpenFirmware node properties into platform_data
|
|
* WARNING: This is DEPRECATED and will be removed eventually!
|
|
*/
|
|
static void
|
|
pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
|
|
{
|
|
struct device_node *node;
|
|
const __be32 *val;
|
|
int size;
|
|
|
|
node = client->dev.of_node;
|
|
if (node == NULL)
|
|
return;
|
|
|
|
*gpio_base = -1;
|
|
val = of_get_property(node, "linux,gpio-base", &size);
|
|
WARN(val, "%s: device-tree property 'linux,gpio-base' is deprecated!", __func__);
|
|
if (val) {
|
|
if (size != sizeof(*val))
|
|
dev_warn(&client->dev, "%s: wrong linux,gpio-base\n",
|
|
node->full_name);
|
|
else
|
|
*gpio_base = be32_to_cpup(val);
|
|
}
|
|
|
|
val = of_get_property(node, "polarity", NULL);
|
|
WARN(val, "%s: device-tree property 'polarity' is deprecated!", __func__);
|
|
if (val)
|
|
*invert = *val;
|
|
}
|
|
#else
|
|
static void
|
|
pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
|
|
{
|
|
*gpio_base = -1;
|
|
}
|
|
#endif
|
|
|
|
static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
|
|
{
|
|
int ret;
|
|
u8 val[MAX_BANK];
|
|
|
|
ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
|
|
if (ret)
|
|
goto out;
|
|
|
|
ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
|
|
chip->reg_direction);
|
|
if (ret)
|
|
goto out;
|
|
|
|
/* set platform specific polarity inversion */
|
|
if (invert)
|
|
memset(val, 0xFF, NBANK(chip));
|
|
else
|
|
memset(val, 0, NBANK(chip));
|
|
|
|
ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
|
|
{
|
|
int ret;
|
|
u8 val[MAX_BANK];
|
|
|
|
/* Let every port in proper state, that could save power */
|
|
memset(val, 0, NBANK(chip));
|
|
pca953x_write_regs(chip, PCA957X_PUPD, val);
|
|
memset(val, 0xFF, NBANK(chip));
|
|
pca953x_write_regs(chip, PCA957X_CFG, val);
|
|
memset(val, 0, NBANK(chip));
|
|
pca953x_write_regs(chip, PCA957X_OUT, val);
|
|
|
|
ret = pca953x_read_regs(chip, PCA957X_IN, val);
|
|
if (ret)
|
|
goto out;
|
|
ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
|
|
if (ret)
|
|
goto out;
|
|
ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
|
|
if (ret)
|
|
goto out;
|
|
|
|
/* set platform specific polarity inversion */
|
|
if (invert)
|
|
memset(val, 0xFF, NBANK(chip));
|
|
else
|
|
memset(val, 0, NBANK(chip));
|
|
pca953x_write_regs(chip, PCA957X_INVRT, val);
|
|
|
|
/* To enable register 6, 7 to controll pull up and pull down */
|
|
memset(val, 0x02, NBANK(chip));
|
|
pca953x_write_regs(chip, PCA957X_BKEN, val);
|
|
|
|
return 0;
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static int pca953x_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct pca953x_platform_data *pdata;
|
|
struct pca953x_chip *chip;
|
|
int irq_base = 0;
|
|
int ret;
|
|
u32 invert = 0;
|
|
|
|
chip = devm_kzalloc(&client->dev,
|
|
sizeof(struct pca953x_chip), GFP_KERNEL);
|
|
if (chip == NULL)
|
|
return -ENOMEM;
|
|
|
|
pdata = client->dev.platform_data;
|
|
if (pdata) {
|
|
irq_base = pdata->irq_base;
|
|
chip->gpio_start = pdata->gpio_base;
|
|
invert = pdata->invert;
|
|
chip->names = pdata->names;
|
|
} else {
|
|
pca953x_get_alt_pdata(client, &chip->gpio_start, &invert);
|
|
#ifdef CONFIG_OF_GPIO
|
|
/* If I2C node has no interrupts property, disable GPIO interrupts */
|
|
if (of_find_property(client->dev.of_node, "interrupts", NULL) == NULL)
|
|
irq_base = -1;
|
|
#endif
|
|
}
|
|
|
|
chip->client = client;
|
|
|
|
chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE);
|
|
|
|
mutex_init(&chip->i2c_lock);
|
|
|
|
/* initialize cached registers from their original values.
|
|
* we can't share this chip with another i2c master.
|
|
*/
|
|
pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK);
|
|
|
|
if (chip->chip_type == PCA953X_TYPE)
|
|
ret = device_pca953x_init(chip, invert);
|
|
else
|
|
ret = device_pca957x_init(chip, invert);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = pca953x_irq_setup(chip, id, irq_base);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = gpiochip_add(&chip->gpio_chip);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (pdata && pdata->setup) {
|
|
ret = pdata->setup(client, chip->gpio_chip.base,
|
|
chip->gpio_chip.ngpio, pdata->context);
|
|
if (ret < 0)
|
|
dev_warn(&client->dev, "setup failed, %d\n", ret);
|
|
}
|
|
|
|
i2c_set_clientdata(client, chip);
|
|
return 0;
|
|
}
|
|
|
|
static int pca953x_remove(struct i2c_client *client)
|
|
{
|
|
struct pca953x_platform_data *pdata = client->dev.platform_data;
|
|
struct pca953x_chip *chip = i2c_get_clientdata(client);
|
|
int ret = 0;
|
|
|
|
if (pdata && pdata->teardown) {
|
|
ret = pdata->teardown(client, chip->gpio_chip.base,
|
|
chip->gpio_chip.ngpio, pdata->context);
|
|
if (ret < 0) {
|
|
dev_err(&client->dev, "%s failed, %d\n",
|
|
"teardown", ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
ret = gpiochip_remove(&chip->gpio_chip);
|
|
if (ret) {
|
|
dev_err(&client->dev, "%s failed, %d\n",
|
|
"gpiochip_remove()", ret);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id pca953x_dt_ids[] = {
|
|
{ .compatible = "nxp,pca9505", },
|
|
{ .compatible = "nxp,pca9534", },
|
|
{ .compatible = "nxp,pca9535", },
|
|
{ .compatible = "nxp,pca9536", },
|
|
{ .compatible = "nxp,pca9537", },
|
|
{ .compatible = "nxp,pca9538", },
|
|
{ .compatible = "nxp,pca9539", },
|
|
{ .compatible = "nxp,pca9554", },
|
|
{ .compatible = "nxp,pca9555", },
|
|
{ .compatible = "nxp,pca9556", },
|
|
{ .compatible = "nxp,pca9557", },
|
|
{ .compatible = "nxp,pca9574", },
|
|
{ .compatible = "nxp,pca9575", },
|
|
|
|
{ .compatible = "maxim,max7310", },
|
|
{ .compatible = "maxim,max7312", },
|
|
{ .compatible = "maxim,max7313", },
|
|
{ .compatible = "maxim,max7315", },
|
|
|
|
{ .compatible = "ti,pca6107", },
|
|
{ .compatible = "ti,tca6408", },
|
|
{ .compatible = "ti,tca6416", },
|
|
{ .compatible = "ti,tca6424", },
|
|
{ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
|
|
|
|
static struct i2c_driver pca953x_driver = {
|
|
.driver = {
|
|
.name = "pca953x",
|
|
.of_match_table = pca953x_dt_ids,
|
|
},
|
|
.probe = pca953x_probe,
|
|
.remove = pca953x_remove,
|
|
.id_table = pca953x_id,
|
|
};
|
|
|
|
static int __init pca953x_init(void)
|
|
{
|
|
return i2c_add_driver(&pca953x_driver);
|
|
}
|
|
/* register after i2c postcore initcall and before
|
|
* subsys initcalls that may rely on these GPIOs
|
|
*/
|
|
subsys_initcall(pca953x_init);
|
|
|
|
static void __exit pca953x_exit(void)
|
|
{
|
|
i2c_del_driver(&pca953x_driver);
|
|
}
|
|
module_exit(pca953x_exit);
|
|
|
|
MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
|
|
MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
|
|
MODULE_LICENSE("GPL");
|