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The Armada 370 and Armada XP SOCs have a coherency fabric unit which is responsible for ensuring hardware coherency between all CPUs and between CPUs and I/O masters. This patch provides the basic support needed for SMP. Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Will Deacon <will.deacon@arm.com>
83 lines
2.3 KiB
C
83 lines
2.3 KiB
C
/*
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* Coherency fabric (Aurora) support for Armada 370 and XP platforms.
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*
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* Copyright (C) 2012 Marvell
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*
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* Yehuda Yitschak <yehuday@marvell.com>
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* Gregory Clement <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* The Armada 370 and Armada XP SOCs have a coherency fabric which is
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* responsible for ensuring hardware coherency between all CPUs and between
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* CPUs and I/O masters. This file initializes the coherency fabric and
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* supplies basic routines for configuring and controlling hardware coherency
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include <linux/smp.h>
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#include <asm/smp_plat.h>
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#include "armada-370-xp.h"
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/*
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* Some functions in this file are called very early during SMP
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* initialization. At that time the device tree framework is not yet
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* ready, and it is not possible to get the register address to
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* ioremap it. That's why the pointer below is given with an initial
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* value matching its virtual mapping
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*/
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static void __iomem *coherency_base = ARMADA_370_XP_REGS_VIRT_BASE + 0x20200;
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/* Coherency fabric registers */
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#define COHERENCY_FABRIC_CFG_OFFSET 0x4
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static struct of_device_id of_coherency_table[] = {
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{.compatible = "marvell,coherency-fabric"},
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{ /* end of list */ },
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};
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#ifdef CONFIG_SMP
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int coherency_get_cpu_count(void)
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{
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int reg, cnt;
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reg = readl(coherency_base + COHERENCY_FABRIC_CFG_OFFSET);
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cnt = (reg & 0xF) + 1;
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return cnt;
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}
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#endif
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/* Function defined in coherency_ll.S */
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int ll_set_cpu_coherent(void __iomem *base_addr, unsigned int hw_cpu_id);
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int set_cpu_coherent(unsigned int hw_cpu_id, int smp_group_id)
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{
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if (!coherency_base) {
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pr_warn("Can't make CPU %d cache coherent.\n", hw_cpu_id);
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pr_warn("Coherency fabric is not initialized\n");
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return 1;
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}
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return ll_set_cpu_coherent(coherency_base, hw_cpu_id);
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}
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int __init coherency_init(void)
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{
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struct device_node *np;
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np = of_find_matching_node(NULL, of_coherency_table);
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if (np) {
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pr_info("Initializing Coherency fabric\n");
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coherency_base = of_iomap(np, 0);
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}
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return 0;
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}
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