mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 01:33:37 +07:00
86ad0f1dd7
Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
760 lines
16 KiB
C
760 lines
16 KiB
C
/*
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* Realtek RTL2830 DVB-T demodulator driver
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*
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* Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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/*
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* Driver implements own I2C-adapter for tuner I2C access. That's since chip
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* have unusual I2C-gate control which closes gate automatically after each
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* I2C transfer. Using own I2C adapter we can workaround that.
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*/
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#include "rtl2830_priv.h"
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/* write multiple hardware registers */
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static int rtl2830_wr(struct rtl2830_priv *priv, u8 reg, u8 *val, int len)
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{
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int ret;
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u8 buf[1+len];
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struct i2c_msg msg[1] = {
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{
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.addr = priv->cfg.i2c_addr,
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.flags = 0,
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.len = 1+len,
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.buf = buf,
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}
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};
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buf[0] = reg;
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memcpy(&buf[1], val, len);
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ret = i2c_transfer(priv->i2c, msg, 1);
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if (ret == 1) {
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ret = 0;
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} else {
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dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* read multiple hardware registers */
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static int rtl2830_rd(struct rtl2830_priv *priv, u8 reg, u8 *val, int len)
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{
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int ret;
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struct i2c_msg msg[2] = {
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{
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.addr = priv->cfg.i2c_addr,
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.flags = 0,
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.len = 1,
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.buf = ®,
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}, {
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.addr = priv->cfg.i2c_addr,
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.flags = I2C_M_RD,
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.len = len,
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.buf = val,
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}
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};
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ret = i2c_transfer(priv->i2c, msg, 2);
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if (ret == 2) {
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ret = 0;
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} else {
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dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* write multiple registers */
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static int rtl2830_wr_regs(struct rtl2830_priv *priv, u16 reg, u8 *val, int len)
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{
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int ret;
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u8 reg2 = (reg >> 0) & 0xff;
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u8 page = (reg >> 8) & 0xff;
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/* switch bank if needed */
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if (page != priv->page) {
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ret = rtl2830_wr(priv, 0x00, &page, 1);
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if (ret)
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return ret;
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priv->page = page;
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}
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return rtl2830_wr(priv, reg2, val, len);
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}
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/* read multiple registers */
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static int rtl2830_rd_regs(struct rtl2830_priv *priv, u16 reg, u8 *val, int len)
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{
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int ret;
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u8 reg2 = (reg >> 0) & 0xff;
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u8 page = (reg >> 8) & 0xff;
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/* switch bank if needed */
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if (page != priv->page) {
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ret = rtl2830_wr(priv, 0x00, &page, 1);
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if (ret)
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return ret;
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priv->page = page;
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}
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return rtl2830_rd(priv, reg2, val, len);
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}
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#if 0 /* currently not used */
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/* write single register */
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static int rtl2830_wr_reg(struct rtl2830_priv *priv, u16 reg, u8 val)
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{
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return rtl2830_wr_regs(priv, reg, &val, 1);
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}
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#endif
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/* read single register */
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static int rtl2830_rd_reg(struct rtl2830_priv *priv, u16 reg, u8 *val)
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{
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return rtl2830_rd_regs(priv, reg, val, 1);
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}
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/* write single register with mask */
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int rtl2830_wr_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 val, u8 mask)
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{
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int ret;
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u8 tmp;
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/* no need for read if whole reg is written */
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if (mask != 0xff) {
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ret = rtl2830_rd_regs(priv, reg, &tmp, 1);
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if (ret)
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return ret;
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val &= mask;
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tmp &= ~mask;
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val |= tmp;
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}
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return rtl2830_wr_regs(priv, reg, &val, 1);
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}
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/* read single register with mask */
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int rtl2830_rd_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 *val, u8 mask)
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{
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int ret, i;
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u8 tmp;
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ret = rtl2830_rd_regs(priv, reg, &tmp, 1);
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if (ret)
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return ret;
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tmp &= mask;
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/* find position of the first bit */
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for (i = 0; i < 8; i++) {
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if ((mask >> i) & 0x01)
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break;
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}
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*val = tmp >> i;
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return 0;
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}
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static int rtl2830_init(struct dvb_frontend *fe)
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{
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struct rtl2830_priv *priv = fe->demodulator_priv;
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int ret, i;
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u64 num;
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u8 buf[3], tmp;
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u32 if_ctl;
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struct rtl2830_reg_val_mask tab[] = {
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{ 0x00d, 0x01, 0x03 },
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{ 0x00d, 0x10, 0x10 },
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{ 0x104, 0x00, 0x1e },
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{ 0x105, 0x80, 0x80 },
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{ 0x110, 0x02, 0x03 },
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{ 0x110, 0x08, 0x0c },
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{ 0x17b, 0x00, 0x40 },
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{ 0x17d, 0x05, 0x0f },
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{ 0x17d, 0x50, 0xf0 },
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{ 0x18c, 0x08, 0x0f },
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{ 0x18d, 0x00, 0xc0 },
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{ 0x188, 0x05, 0x0f },
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{ 0x189, 0x00, 0xfc },
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{ 0x2d5, 0x02, 0x02 },
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{ 0x2f1, 0x02, 0x06 },
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{ 0x2f1, 0x20, 0xf8 },
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{ 0x16d, 0x00, 0x01 },
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{ 0x1a6, 0x00, 0x80 },
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{ 0x106, priv->cfg.vtop, 0x3f },
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{ 0x107, priv->cfg.krf, 0x3f },
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{ 0x112, 0x28, 0xff },
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{ 0x103, priv->cfg.agc_targ_val, 0xff },
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{ 0x00a, 0x02, 0x07 },
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{ 0x140, 0x0c, 0x3c },
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{ 0x140, 0x40, 0xc0 },
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{ 0x15b, 0x05, 0x07 },
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{ 0x15b, 0x28, 0x38 },
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{ 0x15c, 0x05, 0x07 },
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{ 0x15c, 0x28, 0x38 },
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{ 0x115, priv->cfg.spec_inv, 0x01 },
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{ 0x16f, 0x01, 0x07 },
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{ 0x170, 0x18, 0x38 },
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{ 0x172, 0x0f, 0x0f },
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{ 0x173, 0x08, 0x38 },
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{ 0x175, 0x01, 0x07 },
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{ 0x176, 0x00, 0xc0 },
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};
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for (i = 0; i < ARRAY_SIZE(tab); i++) {
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ret = rtl2830_wr_reg_mask(priv, tab[i].reg, tab[i].val,
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tab[i].mask);
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if (ret)
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goto err;
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}
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ret = rtl2830_wr_regs(priv, 0x18f, "\x28\x00", 2);
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if (ret)
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goto err;
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ret = rtl2830_wr_regs(priv, 0x195,
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"\x04\x06\x0a\x12\x0a\x12\x1e\x28", 8);
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if (ret)
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goto err;
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num = priv->cfg.if_dvbt % priv->cfg.xtal;
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num *= 0x400000;
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num = div_u64(num, priv->cfg.xtal);
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num = -num;
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if_ctl = num & 0x3fffff;
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dev_dbg(&priv->i2c->dev, "%s: if_ctl=%08x\n", __func__, if_ctl);
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ret = rtl2830_rd_reg_mask(priv, 0x119, &tmp, 0xc0); /* b[7:6] */
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if (ret)
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goto err;
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buf[0] = tmp << 6;
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buf[0] = (if_ctl >> 16) & 0x3f;
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buf[1] = (if_ctl >> 8) & 0xff;
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buf[2] = (if_ctl >> 0) & 0xff;
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ret = rtl2830_wr_regs(priv, 0x119, buf, 3);
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if (ret)
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goto err;
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/* TODO: spec init */
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/* soft reset */
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ret = rtl2830_wr_reg_mask(priv, 0x101, 0x04, 0x04);
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if (ret)
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goto err;
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ret = rtl2830_wr_reg_mask(priv, 0x101, 0x00, 0x04);
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if (ret)
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goto err;
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priv->sleeping = false;
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return ret;
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err:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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static int rtl2830_sleep(struct dvb_frontend *fe)
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{
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struct rtl2830_priv *priv = fe->demodulator_priv;
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priv->sleeping = true;
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return 0;
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}
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int rtl2830_get_tune_settings(struct dvb_frontend *fe,
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struct dvb_frontend_tune_settings *s)
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{
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s->min_delay_ms = 500;
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s->step_size = fe->ops.info.frequency_stepsize * 2;
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s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
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return 0;
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}
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static int rtl2830_set_frontend(struct dvb_frontend *fe)
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{
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struct rtl2830_priv *priv = fe->demodulator_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret, i;
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static u8 bw_params1[3][34] = {
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{
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0x1f, 0xf0, 0x1f, 0xf0, 0x1f, 0xfa, 0x00, 0x17, 0x00, 0x41,
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0x00, 0x64, 0x00, 0x67, 0x00, 0x38, 0x1f, 0xde, 0x1f, 0x7a,
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0x1f, 0x47, 0x1f, 0x7c, 0x00, 0x30, 0x01, 0x4b, 0x02, 0x82,
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0x03, 0x73, 0x03, 0xcf, /* 6 MHz */
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}, {
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0x1f, 0xfa, 0x1f, 0xda, 0x1f, 0xc1, 0x1f, 0xb3, 0x1f, 0xca,
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0x00, 0x07, 0x00, 0x4d, 0x00, 0x6d, 0x00, 0x40, 0x1f, 0xca,
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0x1f, 0x4d, 0x1f, 0x2a, 0x1f, 0xb2, 0x00, 0xec, 0x02, 0x7e,
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0x03, 0xd0, 0x04, 0x53, /* 7 MHz */
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}, {
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0x00, 0x10, 0x00, 0x0e, 0x1f, 0xf7, 0x1f, 0xc9, 0x1f, 0xa0,
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0x1f, 0xa6, 0x1f, 0xec, 0x00, 0x4e, 0x00, 0x7d, 0x00, 0x3a,
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0x1f, 0x98, 0x1f, 0x10, 0x1f, 0x40, 0x00, 0x75, 0x02, 0x5f,
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0x04, 0x24, 0x04, 0xdb, /* 8 MHz */
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},
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};
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static u8 bw_params2[3][6] = {
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{0xc3, 0x0c, 0x44, 0x33, 0x33, 0x30,}, /* 6 MHz */
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{0xb8, 0xe3, 0x93, 0x99, 0x99, 0x98,}, /* 7 MHz */
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{0xae, 0xba, 0xf3, 0x26, 0x66, 0x64,}, /* 8 MHz */
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};
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dev_dbg(&priv->i2c->dev,
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"%s: frequency=%d bandwidth_hz=%d inversion=%d\n",
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__func__, c->frequency, c->bandwidth_hz, c->inversion);
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/* program tuner */
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if (fe->ops.tuner_ops.set_params)
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fe->ops.tuner_ops.set_params(fe);
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switch (c->bandwidth_hz) {
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case 6000000:
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i = 0;
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break;
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case 7000000:
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i = 1;
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break;
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case 8000000:
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i = 2;
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break;
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default:
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dev_dbg(&priv->i2c->dev, "%s: invalid bandwidth\n", __func__);
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return -EINVAL;
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}
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ret = rtl2830_wr_reg_mask(priv, 0x008, i << 1, 0x06);
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if (ret)
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goto err;
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/* 1/2 split I2C write */
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ret = rtl2830_wr_regs(priv, 0x11c, &bw_params1[i][0], 17);
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if (ret)
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goto err;
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/* 2/2 split I2C write */
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ret = rtl2830_wr_regs(priv, 0x12d, &bw_params1[i][17], 17);
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if (ret)
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goto err;
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ret = rtl2830_wr_regs(priv, 0x19d, bw_params2[i], 6);
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if (ret)
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goto err;
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return ret;
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err:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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static int rtl2830_get_frontend(struct dvb_frontend *fe)
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{
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struct rtl2830_priv *priv = fe->demodulator_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret;
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u8 buf[3];
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if (priv->sleeping)
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return 0;
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ret = rtl2830_rd_regs(priv, 0x33c, buf, 2);
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if (ret)
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goto err;
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ret = rtl2830_rd_reg(priv, 0x351, &buf[2]);
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if (ret)
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goto err;
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dev_dbg(&priv->i2c->dev, "%s: TPS=%*ph\n", __func__, 3, buf);
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switch ((buf[0] >> 2) & 3) {
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case 0:
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c->modulation = QPSK;
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break;
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case 1:
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c->modulation = QAM_16;
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break;
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case 2:
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c->modulation = QAM_64;
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break;
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}
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switch ((buf[2] >> 2) & 1) {
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case 0:
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c->transmission_mode = TRANSMISSION_MODE_2K;
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break;
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case 1:
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c->transmission_mode = TRANSMISSION_MODE_8K;
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}
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switch ((buf[2] >> 0) & 3) {
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case 0:
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c->guard_interval = GUARD_INTERVAL_1_32;
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break;
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case 1:
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c->guard_interval = GUARD_INTERVAL_1_16;
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break;
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case 2:
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c->guard_interval = GUARD_INTERVAL_1_8;
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break;
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case 3:
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c->guard_interval = GUARD_INTERVAL_1_4;
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break;
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}
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switch ((buf[0] >> 4) & 7) {
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case 0:
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c->hierarchy = HIERARCHY_NONE;
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break;
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case 1:
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c->hierarchy = HIERARCHY_1;
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break;
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case 2:
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c->hierarchy = HIERARCHY_2;
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break;
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case 3:
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c->hierarchy = HIERARCHY_4;
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break;
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}
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switch ((buf[1] >> 3) & 7) {
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case 0:
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c->code_rate_HP = FEC_1_2;
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break;
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case 1:
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c->code_rate_HP = FEC_2_3;
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break;
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case 2:
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c->code_rate_HP = FEC_3_4;
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break;
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case 3:
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c->code_rate_HP = FEC_5_6;
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break;
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case 4:
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c->code_rate_HP = FEC_7_8;
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break;
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}
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switch ((buf[1] >> 0) & 7) {
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case 0:
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c->code_rate_LP = FEC_1_2;
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break;
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case 1:
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c->code_rate_LP = FEC_2_3;
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break;
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case 2:
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c->code_rate_LP = FEC_3_4;
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break;
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case 3:
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c->code_rate_LP = FEC_5_6;
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break;
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case 4:
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c->code_rate_LP = FEC_7_8;
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break;
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}
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return 0;
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err:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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static int rtl2830_read_status(struct dvb_frontend *fe, fe_status_t *status)
|
|
{
|
|
struct rtl2830_priv *priv = fe->demodulator_priv;
|
|
int ret;
|
|
u8 tmp;
|
|
*status = 0;
|
|
|
|
if (priv->sleeping)
|
|
return 0;
|
|
|
|
ret = rtl2830_rd_reg_mask(priv, 0x351, &tmp, 0x78); /* [6:3] */
|
|
if (ret)
|
|
goto err;
|
|
|
|
if (tmp == 11) {
|
|
*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
|
|
FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
|
|
} else if (tmp == 10) {
|
|
*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
|
|
FE_HAS_VITERBI;
|
|
}
|
|
|
|
return ret;
|
|
err:
|
|
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
return ret;
|
|
}
|
|
|
|
static int rtl2830_read_snr(struct dvb_frontend *fe, u16 *snr)
|
|
{
|
|
struct rtl2830_priv *priv = fe->demodulator_priv;
|
|
int ret, hierarchy, constellation;
|
|
u8 buf[2], tmp;
|
|
u16 tmp16;
|
|
#define CONSTELLATION_NUM 3
|
|
#define HIERARCHY_NUM 4
|
|
static const u32 snr_constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {
|
|
{ 70705899, 70705899, 70705899, 70705899 },
|
|
{ 82433173, 82433173, 87483115, 94445660 },
|
|
{ 92888734, 92888734, 95487525, 99770748 },
|
|
};
|
|
|
|
if (priv->sleeping)
|
|
return 0;
|
|
|
|
/* reports SNR in resolution of 0.1 dB */
|
|
|
|
ret = rtl2830_rd_reg(priv, 0x33c, &tmp);
|
|
if (ret)
|
|
goto err;
|
|
|
|
constellation = (tmp >> 2) & 0x03; /* [3:2] */
|
|
if (constellation > CONSTELLATION_NUM - 1)
|
|
goto err;
|
|
|
|
hierarchy = (tmp >> 4) & 0x07; /* [6:4] */
|
|
if (hierarchy > HIERARCHY_NUM - 1)
|
|
goto err;
|
|
|
|
ret = rtl2830_rd_regs(priv, 0x40c, buf, 2);
|
|
if (ret)
|
|
goto err;
|
|
|
|
tmp16 = buf[0] << 8 | buf[1];
|
|
|
|
if (tmp16)
|
|
*snr = (snr_constant[constellation][hierarchy] -
|
|
intlog10(tmp16)) / ((1 << 24) / 100);
|
|
else
|
|
*snr = 0;
|
|
|
|
return 0;
|
|
err:
|
|
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
return ret;
|
|
}
|
|
|
|
static int rtl2830_read_ber(struct dvb_frontend *fe, u32 *ber)
|
|
{
|
|
struct rtl2830_priv *priv = fe->demodulator_priv;
|
|
int ret;
|
|
u8 buf[2];
|
|
|
|
if (priv->sleeping)
|
|
return 0;
|
|
|
|
ret = rtl2830_rd_regs(priv, 0x34e, buf, 2);
|
|
if (ret)
|
|
goto err;
|
|
|
|
*ber = buf[0] << 8 | buf[1];
|
|
|
|
return 0;
|
|
err:
|
|
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
return ret;
|
|
}
|
|
|
|
static int rtl2830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
|
|
{
|
|
*ucblocks = 0;
|
|
return 0;
|
|
}
|
|
|
|
static int rtl2830_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
|
|
{
|
|
struct rtl2830_priv *priv = fe->demodulator_priv;
|
|
int ret;
|
|
u8 buf[2];
|
|
u16 if_agc_raw, if_agc;
|
|
|
|
if (priv->sleeping)
|
|
return 0;
|
|
|
|
ret = rtl2830_rd_regs(priv, 0x359, buf, 2);
|
|
if (ret)
|
|
goto err;
|
|
|
|
if_agc_raw = (buf[0] << 8 | buf[1]) & 0x3fff;
|
|
|
|
if (if_agc_raw & (1 << 9))
|
|
if_agc = -(~(if_agc_raw - 1) & 0x1ff);
|
|
else
|
|
if_agc = if_agc_raw;
|
|
|
|
*strength = (u8) (55 - if_agc / 182);
|
|
*strength |= *strength << 8;
|
|
|
|
return 0;
|
|
err:
|
|
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
return ret;
|
|
}
|
|
|
|
static struct dvb_frontend_ops rtl2830_ops;
|
|
|
|
static u32 rtl2830_tuner_i2c_func(struct i2c_adapter *adapter)
|
|
{
|
|
return I2C_FUNC_I2C;
|
|
}
|
|
|
|
static int rtl2830_tuner_i2c_xfer(struct i2c_adapter *i2c_adap,
|
|
struct i2c_msg msg[], int num)
|
|
{
|
|
struct rtl2830_priv *priv = i2c_get_adapdata(i2c_adap);
|
|
int ret;
|
|
|
|
/* open i2c-gate */
|
|
ret = rtl2830_wr_reg_mask(priv, 0x101, 0x08, 0x08);
|
|
if (ret)
|
|
goto err;
|
|
|
|
ret = i2c_transfer(priv->i2c, msg, num);
|
|
if (ret < 0)
|
|
dev_warn(&priv->i2c->dev, "%s: tuner i2c failed=%d\n",
|
|
KBUILD_MODNAME, ret);
|
|
|
|
return ret;
|
|
err:
|
|
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
return ret;
|
|
}
|
|
|
|
static struct i2c_algorithm rtl2830_tuner_i2c_algo = {
|
|
.master_xfer = rtl2830_tuner_i2c_xfer,
|
|
.functionality = rtl2830_tuner_i2c_func,
|
|
};
|
|
|
|
struct i2c_adapter *rtl2830_get_tuner_i2c_adapter(struct dvb_frontend *fe)
|
|
{
|
|
struct rtl2830_priv *priv = fe->demodulator_priv;
|
|
return &priv->tuner_i2c_adapter;
|
|
}
|
|
EXPORT_SYMBOL(rtl2830_get_tuner_i2c_adapter);
|
|
|
|
static void rtl2830_release(struct dvb_frontend *fe)
|
|
{
|
|
struct rtl2830_priv *priv = fe->demodulator_priv;
|
|
|
|
i2c_del_adapter(&priv->tuner_i2c_adapter);
|
|
kfree(priv);
|
|
}
|
|
|
|
struct dvb_frontend *rtl2830_attach(const struct rtl2830_config *cfg,
|
|
struct i2c_adapter *i2c)
|
|
{
|
|
struct rtl2830_priv *priv = NULL;
|
|
int ret = 0;
|
|
u8 tmp;
|
|
|
|
/* allocate memory for the internal state */
|
|
priv = kzalloc(sizeof(struct rtl2830_priv), GFP_KERNEL);
|
|
if (priv == NULL)
|
|
goto err;
|
|
|
|
/* setup the priv */
|
|
priv->i2c = i2c;
|
|
memcpy(&priv->cfg, cfg, sizeof(struct rtl2830_config));
|
|
|
|
/* check if the demod is there */
|
|
ret = rtl2830_rd_reg(priv, 0x000, &tmp);
|
|
if (ret)
|
|
goto err;
|
|
|
|
/* create dvb_frontend */
|
|
memcpy(&priv->fe.ops, &rtl2830_ops, sizeof(struct dvb_frontend_ops));
|
|
priv->fe.demodulator_priv = priv;
|
|
|
|
/* create tuner i2c adapter */
|
|
strlcpy(priv->tuner_i2c_adapter.name, "RTL2830 tuner I2C adapter",
|
|
sizeof(priv->tuner_i2c_adapter.name));
|
|
priv->tuner_i2c_adapter.algo = &rtl2830_tuner_i2c_algo;
|
|
priv->tuner_i2c_adapter.algo_data = NULL;
|
|
i2c_set_adapdata(&priv->tuner_i2c_adapter, priv);
|
|
if (i2c_add_adapter(&priv->tuner_i2c_adapter) < 0) {
|
|
dev_err(&i2c->dev,
|
|
"%s: tuner i2c bus could not be initialized\n",
|
|
KBUILD_MODNAME);
|
|
goto err;
|
|
}
|
|
|
|
priv->sleeping = true;
|
|
|
|
return &priv->fe;
|
|
err:
|
|
dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
kfree(priv);
|
|
return NULL;
|
|
}
|
|
EXPORT_SYMBOL(rtl2830_attach);
|
|
|
|
static struct dvb_frontend_ops rtl2830_ops = {
|
|
.delsys = { SYS_DVBT },
|
|
.info = {
|
|
.name = "Realtek RTL2830 (DVB-T)",
|
|
.caps = FE_CAN_FEC_1_2 |
|
|
FE_CAN_FEC_2_3 |
|
|
FE_CAN_FEC_3_4 |
|
|
FE_CAN_FEC_5_6 |
|
|
FE_CAN_FEC_7_8 |
|
|
FE_CAN_FEC_AUTO |
|
|
FE_CAN_QPSK |
|
|
FE_CAN_QAM_16 |
|
|
FE_CAN_QAM_64 |
|
|
FE_CAN_QAM_AUTO |
|
|
FE_CAN_TRANSMISSION_MODE_AUTO |
|
|
FE_CAN_GUARD_INTERVAL_AUTO |
|
|
FE_CAN_HIERARCHY_AUTO |
|
|
FE_CAN_RECOVER |
|
|
FE_CAN_MUTE_TS
|
|
},
|
|
|
|
.release = rtl2830_release,
|
|
|
|
.init = rtl2830_init,
|
|
.sleep = rtl2830_sleep,
|
|
|
|
.get_tune_settings = rtl2830_get_tune_settings,
|
|
|
|
.set_frontend = rtl2830_set_frontend,
|
|
.get_frontend = rtl2830_get_frontend,
|
|
|
|
.read_status = rtl2830_read_status,
|
|
.read_snr = rtl2830_read_snr,
|
|
.read_ber = rtl2830_read_ber,
|
|
.read_ucblocks = rtl2830_read_ucblocks,
|
|
.read_signal_strength = rtl2830_read_signal_strength,
|
|
};
|
|
|
|
MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
|
|
MODULE_DESCRIPTION("Realtek RTL2830 DVB-T demodulator driver");
|
|
MODULE_LICENSE("GPL");
|