mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 07:36:44 +07:00
cc0c43a045
Clean the crtc_enable by using the proper crtc_state instead of the state of the primary plane state data. Also fix the dependency to commit the plane changes even if enable is called after the flush. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
238 lines
6.5 KiB
C
238 lines
6.5 KiB
C
/*
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* Copyright (C) 2016 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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* Copyright (C) 2015 Amlogic, Inc. All rights reserved.
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* Copyright (C) 2014 Endless Mobile
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*
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* Written by:
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* Jasper St. Pierre <jstpierre@mecheye.net>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/platform_device.h>
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#include <drm/drmP.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_flip_work.h>
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#include <drm/drm_crtc_helper.h>
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#include "meson_crtc.h"
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#include "meson_plane.h"
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#include "meson_venc.h"
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#include "meson_vpp.h"
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#include "meson_viu.h"
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#include "meson_registers.h"
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/* CRTC definition */
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struct meson_crtc {
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struct drm_crtc base;
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struct drm_pending_vblank_event *event;
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struct meson_drm *priv;
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};
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#define to_meson_crtc(x) container_of(x, struct meson_crtc, base)
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/* CRTC */
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static int meson_crtc_enable_vblank(struct drm_crtc *crtc)
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{
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struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
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struct meson_drm *priv = meson_crtc->priv;
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meson_venc_enable_vsync(priv);
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return 0;
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}
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static void meson_crtc_disable_vblank(struct drm_crtc *crtc)
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{
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struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
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struct meson_drm *priv = meson_crtc->priv;
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meson_venc_disable_vsync(priv);
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}
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static const struct drm_crtc_funcs meson_crtc_funcs = {
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.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
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.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
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.destroy = drm_crtc_cleanup,
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.page_flip = drm_atomic_helper_page_flip,
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.reset = drm_atomic_helper_crtc_reset,
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.set_config = drm_atomic_helper_set_config,
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.enable_vblank = meson_crtc_enable_vblank,
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.disable_vblank = meson_crtc_disable_vblank,
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};
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static void meson_crtc_enable(struct drm_crtc *crtc)
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{
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struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
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struct drm_crtc_state *crtc_state = crtc->state;
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struct meson_drm *priv = meson_crtc->priv;
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DRM_DEBUG_DRIVER("\n");
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if (!crtc_state) {
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DRM_ERROR("Invalid crtc_state\n");
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return;
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}
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/* Enable VPP Postblend */
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writel(crtc_state->mode.hdisplay,
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priv->io_base + _REG(VPP_POSTBLEND_H_SIZE));
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writel_bits_relaxed(VPP_POSTBLEND_ENABLE, VPP_POSTBLEND_ENABLE,
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priv->io_base + _REG(VPP_MISC));
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priv->viu.osd1_enabled = true;
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}
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static void meson_crtc_disable(struct drm_crtc *crtc)
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{
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struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
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struct meson_drm *priv = meson_crtc->priv;
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priv->viu.osd1_enabled = false;
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priv->viu.osd1_commit = false;
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/* Disable VPP Postblend */
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writel_bits_relaxed(VPP_POSTBLEND_ENABLE, 0,
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priv->io_base + _REG(VPP_MISC));
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if (crtc->state->event && !crtc->state->active) {
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spin_lock_irq(&crtc->dev->event_lock);
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drm_crtc_send_vblank_event(crtc, crtc->state->event);
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spin_unlock_irq(&crtc->dev->event_lock);
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crtc->state->event = NULL;
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}
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}
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static void meson_crtc_atomic_begin(struct drm_crtc *crtc,
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struct drm_crtc_state *state)
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{
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struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
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unsigned long flags;
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if (crtc->state->event) {
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WARN_ON(drm_crtc_vblank_get(crtc) != 0);
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spin_lock_irqsave(&crtc->dev->event_lock, flags);
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meson_crtc->event = crtc->state->event;
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spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
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crtc->state->event = NULL;
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}
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}
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static void meson_crtc_atomic_flush(struct drm_crtc *crtc,
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struct drm_crtc_state *old_crtc_state)
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{
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struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
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struct meson_drm *priv = meson_crtc->priv;
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priv->viu.osd1_commit = true;
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}
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static const struct drm_crtc_helper_funcs meson_crtc_helper_funcs = {
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.enable = meson_crtc_enable,
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.disable = meson_crtc_disable,
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.atomic_begin = meson_crtc_atomic_begin,
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.atomic_flush = meson_crtc_atomic_flush,
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};
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void meson_crtc_irq(struct meson_drm *priv)
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{
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struct meson_crtc *meson_crtc = to_meson_crtc(priv->crtc);
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unsigned long flags;
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/* Update the OSD registers */
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if (priv->viu.osd1_enabled && priv->viu.osd1_commit) {
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writel_relaxed(priv->viu.osd1_ctrl_stat,
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priv->io_base + _REG(VIU_OSD1_CTRL_STAT));
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writel_relaxed(priv->viu.osd1_blk0_cfg[0],
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priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W0));
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writel_relaxed(priv->viu.osd1_blk0_cfg[1],
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priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W1));
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writel_relaxed(priv->viu.osd1_blk0_cfg[2],
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priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W2));
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writel_relaxed(priv->viu.osd1_blk0_cfg[3],
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priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W3));
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writel_relaxed(priv->viu.osd1_blk0_cfg[4],
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priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W4));
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/* If output is interlace, make use of the Scaler */
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if (priv->viu.osd1_interlace) {
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struct drm_plane *plane = priv->primary_plane;
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struct drm_plane_state *state = plane->state;
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struct drm_rect dest = {
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.x1 = state->crtc_x,
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.y1 = state->crtc_y,
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.x2 = state->crtc_x + state->crtc_w,
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.y2 = state->crtc_y + state->crtc_h,
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};
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meson_vpp_setup_interlace_vscaler_osd1(priv, &dest);
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} else
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meson_vpp_disable_interlace_vscaler_osd1(priv);
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/* Enable OSD1 */
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writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND,
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priv->io_base + _REG(VPP_MISC));
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priv->viu.osd1_commit = false;
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}
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drm_crtc_handle_vblank(priv->crtc);
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spin_lock_irqsave(&priv->drm->event_lock, flags);
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if (meson_crtc->event) {
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drm_crtc_send_vblank_event(priv->crtc, meson_crtc->event);
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drm_crtc_vblank_put(priv->crtc);
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meson_crtc->event = NULL;
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}
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spin_unlock_irqrestore(&priv->drm->event_lock, flags);
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}
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int meson_crtc_create(struct meson_drm *priv)
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{
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struct meson_crtc *meson_crtc;
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struct drm_crtc *crtc;
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int ret;
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meson_crtc = devm_kzalloc(priv->drm->dev, sizeof(*meson_crtc),
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GFP_KERNEL);
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if (!meson_crtc)
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return -ENOMEM;
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meson_crtc->priv = priv;
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crtc = &meson_crtc->base;
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ret = drm_crtc_init_with_planes(priv->drm, crtc,
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priv->primary_plane, NULL,
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&meson_crtc_funcs, "meson_crtc");
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if (ret) {
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dev_err(priv->drm->dev, "Failed to init CRTC\n");
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return ret;
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}
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drm_crtc_helper_add(crtc, &meson_crtc_helper_funcs);
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priv->crtc = crtc;
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return 0;
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}
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