mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 20:16:05 +07:00
abe60a3a7a
Remove the usage of skeleton.dtsi in the remaining dts files. It was
deprecated since commit 9c0da3cc61 ("ARM: dts: explicitly mark
skeleton.dtsi as deprecated"). This will make adding a unit-address to
memory nodes easier.
The main tricky part to removing skeleton.dtsi is we could end up with
no /memory node at all when a bootloader depends on one being present. I
hacked up dtc to check for this condition.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
243 lines
4.6 KiB
Plaintext
243 lines
4.6 KiB
Plaintext
/*
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* wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
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*
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* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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*
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* Licensed under GPLv2 or later
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*/
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "wm,wm8650";
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cpus {
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#address-cells = <0>;
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#size-cells = <0>;
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cpu {
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device_type = "cpu";
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compatible = "arm,arm926ej-s";
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x0>;
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};
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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interrupt-parent = <&intc0>;
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intc0: interrupt-controller@d8140000 {
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compatible = "via,vt8500-intc";
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interrupt-controller;
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reg = <0xd8140000 0x10000>;
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#interrupt-cells = <1>;
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};
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/* Secondary IC cascaded to intc0 */
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intc1: interrupt-controller@d8150000 {
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compatible = "via,vt8500-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xD8150000 0x10000>;
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interrupts = <56 57 58 59 60 61 62 63>;
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};
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pinctrl: pinctrl@d8110000 {
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compatible = "wm,wm8650-pinctrl";
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reg = <0xd8110000 0x10000>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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pmc@d8130000 {
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compatible = "via,vt8500-pmc";
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reg = <0xd8130000 0x1000>;
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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ref25: ref25M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <25000000>;
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};
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ref24: ref24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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plla: plla {
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#clock-cells = <0>;
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compatible = "wm,wm8650-pll-clock";
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clocks = <&ref25>;
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reg = <0x200>;
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};
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pllb: pllb {
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#clock-cells = <0>;
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compatible = "wm,wm8650-pll-clock";
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clocks = <&ref25>;
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reg = <0x204>;
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};
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pllc: pllc {
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#clock-cells = <0>;
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compatible = "wm,wm8650-pll-clock";
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clocks = <&ref25>;
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reg = <0x208>;
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};
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plld: plld {
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#clock-cells = <0>;
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compatible = "wm,wm8650-pll-clock";
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clocks = <&ref25>;
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reg = <0x20c>;
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};
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plle: plle {
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#clock-cells = <0>;
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compatible = "wm,wm8650-pll-clock";
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clocks = <&ref25>;
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reg = <0x210>;
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};
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clkarm: arm {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&plla>;
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divisor-reg = <0x300>;
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};
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clkahb: ahb {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&pllb>;
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divisor-reg = <0x304>;
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};
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clkapb: apb {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&pllb>;
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divisor-reg = <0x320>;
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};
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clkddr: ddr {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&plld>;
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divisor-reg = <0x310>;
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};
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clkuart0: uart0 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <1>;
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};
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clkuart1: uart1 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <2>;
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};
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clksdhc: sdhc {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&pllb>;
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divisor-reg = <0x328>;
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divisor-mask = <0x3f>;
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enable-reg = <0x254>;
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enable-bit = <18>;
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};
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};
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};
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timer@d8130100 {
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compatible = "via,vt8500-timer";
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reg = <0xd8130100 0x28>;
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interrupts = <36>;
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};
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ehci@d8007900 {
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compatible = "via,vt8500-ehci";
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reg = <0xd8007900 0x200>;
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interrupts = <43>;
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};
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uhci@d8007b00 {
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compatible = "platform-uhci";
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reg = <0xd8007b00 0x200>;
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interrupts = <43>;
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};
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sdhc@d800a000 {
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compatible = "wm,wm8505-sdhc";
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reg = <0xd800a000 0x400>;
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interrupts = <20>, <21>;
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clocks = <&clksdhc>;
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bus-width = <4>;
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sdon-inverted;
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};
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fb: fb@d8050800 {
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compatible = "wm,wm8505-fb";
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reg = <0xd8050800 0x200>;
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};
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ge_rops@d8050400 {
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compatible = "wm,prizm-ge-rops";
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reg = <0xd8050400 0x100>;
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};
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uart0: serial@d8200000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8200000 0x1040>;
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interrupts = <32>;
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clocks = <&clkuart0>;
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status = "disabled";
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};
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uart1: serial@d82b0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82b0000 0x1040>;
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interrupts = <33>;
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clocks = <&clkuart1>;
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status = "disabled";
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};
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rtc@d8100000 {
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compatible = "via,vt8500-rtc";
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reg = <0xd8100000 0x10000>;
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interrupts = <48>;
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};
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ethernet@d8004000 {
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compatible = "via,vt8500-rhine";
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reg = <0xd8004000 0x100>;
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interrupts = <10>;
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};
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};
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};
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