mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 20:05:14 +07:00
8f49a658b4
Pull networking fixes from David Miller:
"First batch of fixes in the new merge window:
1) Double dst_cache free in act_tunnel_key, from Wenxu.
2) Avoid NULL deref in IN_DEV_MFORWARD() by failing early in the
ip_route_input_rcu() path, from Paolo Abeni.
3) Fix appletalk compile regression, from Arnd Bergmann.
4) If SLAB objects reach the TCP sendpage method we are in serious
trouble, so put a debugging check there. From Vasily Averin.
5) Memory leak in hsr layer, from Mao Wenan.
6) Only test GSO type on GSO packets, from Willem de Bruijn.
7) Fix crash in xsk_diag_put_umem(), from Eric Dumazet.
8) Fix VNIC mailbox length in nfp, from Dirk van der Merwe.
9) Fix race in ipv4 route exception handling, from Xin Long.
10) Missing DMA memory barrier in hns3 driver, from Jian Shen.
11) Use after free in __tcf_chain_put(), from Vlad Buslov.
12) Handle inet_csk_reqsk_queue_add() failures, from Guillaume Nault.
13) Return value correction when ip_mc_may_pull() fails, from Eric
Dumazet.
14) Use after free in x25_device_event(), also from Eric"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (72 commits)
gro_cells: make sure device is up in gro_cells_receive()
vxlan: test dev->flags & IFF_UP before calling gro_cells_receive()
net/x25: fix use-after-free in x25_device_event()
isdn: mISDNinfineon: fix potential NULL pointer dereference
net: hns3: fix to stop multiple HNS reset due to the AER changes
ip: fix ip_mc_may_pull() return value
net: keep refcount warning in reqsk_free()
net: stmmac: Avoid one more sometimes uninitialized Clang warning
net: dsa: mv88e6xxx: Set correct interface mode for CPU/DSA ports
rxrpc: Fix client call queueing, waiting for channel
tcp: handle inet_csk_reqsk_queue_add() failures
net: ethernet: sun: Zero initialize class in default case in niu_add_ethtool_tcam_entry
8139too : Add support for U.S. Robotics USR997901A 10/100 Cardbus NIC
fou, fou6: avoid uninit-value in gue_err() and gue6_err()
net: sched: fix potential use-after-free in __tcf_chain_put()
vhost: silence an unused-variable warning
vsock/virtio: fix kernel panic from virtio_transport_reset_no_sock
connector: fix unsafe usage of ->real_parent
vxlan: do not need BH again in vxlan_cleanup()
net: hns3: add dma_rmb() for rx description
...
536 lines
12 KiB
Plaintext
536 lines
12 KiB
Plaintext
/*
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* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "armv7-m.dtsi"
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#include <dt-bindings/clock/stm32h7-clks.h>
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#include <dt-bindings/mfd/stm32h7-rcc.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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clocks {
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clk_hse: clk-hse {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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};
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clk_lse: clk-lse {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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clk_i2s: i2s_ckin {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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};
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};
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soc {
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timer5: timer@40000c00 {
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compatible = "st,stm32-timer";
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reg = <0x40000c00 0x400>;
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interrupts = <50>;
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clocks = <&rcc TIM5_CK>;
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};
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lptimer1: timer@40002400 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32-lptimer";
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reg = <0x40002400 0x400>;
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clocks = <&rcc LPTIM1_CK>;
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clock-names = "mux";
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status = "disabled";
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pwm {
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compatible = "st,stm32-pwm-lp";
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#pwm-cells = <3>;
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status = "disabled";
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};
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trigger@0 {
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compatible = "st,stm32-lptimer-trigger";
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reg = <0>;
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status = "disabled";
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};
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counter {
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compatible = "st,stm32-lptimer-counter";
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status = "disabled";
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};
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};
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spi2: spi@40003800 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32h7-spi";
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reg = <0x40003800 0x400>;
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interrupts = <36>;
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clocks = <&rcc SPI2_CK>;
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status = "disabled";
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};
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spi3: spi@40003c00 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32h7-spi";
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reg = <0x40003c00 0x400>;
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interrupts = <51>;
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clocks = <&rcc SPI3_CK>;
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status = "disabled";
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};
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usart2: serial@40004400 {
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compatible = "st,stm32f7-uart";
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reg = <0x40004400 0x400>;
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interrupts = <38>;
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status = "disabled";
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clocks = <&rcc USART2_CK>;
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};
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i2c1: i2c@40005400 {
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compatible = "st,stm32f7-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005400 0x400>;
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interrupts = <31>,
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<32>;
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resets = <&rcc STM32H7_APB1L_RESET(I2C1)>;
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clocks = <&rcc I2C1_CK>;
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status = "disabled";
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};
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i2c2: i2c@40005800 {
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compatible = "st,stm32f7-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005800 0x400>;
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interrupts = <33>,
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<34>;
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resets = <&rcc STM32H7_APB1L_RESET(I2C2)>;
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clocks = <&rcc I2C2_CK>;
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status = "disabled";
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};
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i2c3: i2c@40005C00 {
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compatible = "st,stm32f7-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005C00 0x400>;
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interrupts = <72>,
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<73>;
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resets = <&rcc STM32H7_APB1L_RESET(I2C3)>;
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clocks = <&rcc I2C3_CK>;
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status = "disabled";
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};
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dac: dac@40007400 {
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compatible = "st,stm32h7-dac-core";
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reg = <0x40007400 0x400>;
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clocks = <&rcc DAC12_CK>;
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clock-names = "pclk";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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dac1: dac@1 {
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compatible = "st,stm32-dac";
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#io-channels-cells = <1>;
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reg = <1>;
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status = "disabled";
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};
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dac2: dac@2 {
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compatible = "st,stm32-dac";
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#io-channels-cells = <1>;
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reg = <2>;
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status = "disabled";
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};
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};
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usart1: serial@40011000 {
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compatible = "st,stm32f7-uart";
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reg = <0x40011000 0x400>;
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interrupts = <37>;
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status = "disabled";
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clocks = <&rcc USART1_CK>;
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};
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spi1: spi@40013000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32h7-spi";
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reg = <0x40013000 0x400>;
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interrupts = <35>;
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clocks = <&rcc SPI1_CK>;
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status = "disabled";
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};
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spi4: spi@40013400 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32h7-spi";
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reg = <0x40013400 0x400>;
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interrupts = <84>;
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clocks = <&rcc SPI4_CK>;
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status = "disabled";
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};
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spi5: spi@40015000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32h7-spi";
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reg = <0x40015000 0x400>;
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interrupts = <85>;
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clocks = <&rcc SPI5_CK>;
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status = "disabled";
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};
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dma1: dma@40020000 {
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compatible = "st,stm32-dma";
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reg = <0x40020000 0x400>;
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interrupts = <11>,
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<12>,
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<13>,
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<14>,
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<15>,
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<16>,
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<17>,
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<47>;
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clocks = <&rcc DMA1_CK>;
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#dma-cells = <4>;
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st,mem2mem;
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dma-requests = <8>;
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status = "disabled";
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};
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dma2: dma@40020400 {
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compatible = "st,stm32-dma";
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reg = <0x40020400 0x400>;
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interrupts = <56>,
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<57>,
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<58>,
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<59>,
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<60>,
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<68>,
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<69>,
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<70>;
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clocks = <&rcc DMA2_CK>;
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#dma-cells = <4>;
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st,mem2mem;
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dma-requests = <8>;
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status = "disabled";
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};
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dmamux1: dma-router@40020800 {
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compatible = "st,stm32h7-dmamux";
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reg = <0x40020800 0x1c>;
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#dma-cells = <3>;
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dma-channels = <16>;
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dma-requests = <128>;
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dma-masters = <&dma1 &dma2>;
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clocks = <&rcc DMA1_CK>;
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};
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adc_12: adc@40022000 {
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compatible = "st,stm32h7-adc-core";
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reg = <0x40022000 0x400>;
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interrupts = <18>;
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clocks = <&rcc ADC12_CK>;
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clock-names = "bus";
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interrupt-controller;
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#interrupt-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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adc1: adc@0 {
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compatible = "st,stm32h7-adc";
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#io-channel-cells = <1>;
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reg = <0x0>;
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interrupt-parent = <&adc_12>;
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interrupts = <0>;
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status = "disabled";
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};
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adc2: adc@100 {
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compatible = "st,stm32h7-adc";
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#io-channel-cells = <1>;
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reg = <0x100>;
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interrupt-parent = <&adc_12>;
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interrupts = <1>;
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status = "disabled";
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};
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};
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usbotg_hs: usb@40040000 {
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compatible = "st,stm32f7-hsotg";
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reg = <0x40040000 0x40000>;
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interrupts = <77>;
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clocks = <&rcc USB1OTG_CK>;
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clock-names = "otg";
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g-rx-fifo-size = <256>;
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g-np-tx-fifo-size = <32>;
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g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
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status = "disabled";
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};
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usbotg_fs: usb@40080000 {
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compatible = "st,stm32f4x9-fsotg";
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reg = <0x40080000 0x40000>;
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interrupts = <101>;
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clocks = <&rcc USB2OTG_CK>;
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clock-names = "otg";
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status = "disabled";
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};
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mdma1: dma@52000000 {
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compatible = "st,stm32h7-mdma";
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reg = <0x52000000 0x1000>;
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interrupts = <122>;
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clocks = <&rcc MDMA_CK>;
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#dma-cells = <5>;
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dma-channels = <16>;
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dma-requests = <32>;
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};
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exti: interrupt-controller@58000000 {
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compatible = "st,stm32h7-exti";
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x58000000 0x400>;
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interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <62>, <76>;
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};
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syscfg: system-config@58000400 {
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compatible = "syscon";
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reg = <0x58000400 0x400>;
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};
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spi6: spi@58001400 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32h7-spi";
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reg = <0x58001400 0x400>;
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interrupts = <86>;
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clocks = <&rcc SPI6_CK>;
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status = "disabled";
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};
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i2c4: i2c@58001C00 {
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compatible = "st,stm32f7-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x58001C00 0x400>;
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interrupts = <95>,
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<96>;
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resets = <&rcc STM32H7_APB4_RESET(I2C4)>;
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clocks = <&rcc I2C4_CK>;
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status = "disabled";
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};
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lptimer2: timer@58002400 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32-lptimer";
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reg = <0x58002400 0x400>;
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clocks = <&rcc LPTIM2_CK>;
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clock-names = "mux";
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status = "disabled";
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pwm {
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compatible = "st,stm32-pwm-lp";
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#pwm-cells = <3>;
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status = "disabled";
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};
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trigger@1 {
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compatible = "st,stm32-lptimer-trigger";
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reg = <1>;
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status = "disabled";
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};
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counter {
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compatible = "st,stm32-lptimer-counter";
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status = "disabled";
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};
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};
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lptimer3: timer@58002800 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32-lptimer";
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reg = <0x58002800 0x400>;
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clocks = <&rcc LPTIM3_CK>;
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clock-names = "mux";
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status = "disabled";
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pwm {
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compatible = "st,stm32-pwm-lp";
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#pwm-cells = <3>;
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status = "disabled";
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};
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trigger@2 {
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compatible = "st,stm32-lptimer-trigger";
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reg = <2>;
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status = "disabled";
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};
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};
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lptimer4: timer@58002c00 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32-lptimer";
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reg = <0x58002c00 0x400>;
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clocks = <&rcc LPTIM4_CK>;
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clock-names = "mux";
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status = "disabled";
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pwm {
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compatible = "st,stm32-pwm-lp";
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#pwm-cells = <3>;
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status = "disabled";
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};
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};
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lptimer5: timer@58003000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32-lptimer";
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reg = <0x58003000 0x400>;
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clocks = <&rcc LPTIM5_CK>;
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clock-names = "mux";
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status = "disabled";
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pwm {
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compatible = "st,stm32-pwm-lp";
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#pwm-cells = <3>;
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status = "disabled";
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};
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};
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vrefbuf: regulator@58003c00 {
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compatible = "st,stm32-vrefbuf";
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reg = <0x58003C00 0x8>;
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clocks = <&rcc VREF_CK>;
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <2500000>;
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status = "disabled";
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};
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rtc: rtc@58004000 {
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compatible = "st,stm32h7-rtc";
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reg = <0x58004000 0x400>;
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clocks = <&rcc RTCAPB_CK>, <&rcc RTC_CK>;
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|
clock-names = "pclk", "rtc_ck";
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assigned-clocks = <&rcc RTC_CK>;
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|
assigned-clock-parents = <&rcc LSE_CK>;
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|
interrupt-parent = <&exti>;
|
|
interrupts = <17 IRQ_TYPE_EDGE_RISING>;
|
|
interrupt-names = "alarm";
|
|
st,syscfg = <&pwrcfg 0x00 0x100>;
|
|
status = "disabled";
|
|
};
|
|
|
|
rcc: reset-clock-controller@58024400 {
|
|
compatible = "st,stm32h743-rcc", "st,stm32-rcc";
|
|
reg = <0x58024400 0x400>;
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>;
|
|
st,syscfg = <&pwrcfg>;
|
|
};
|
|
|
|
pwrcfg: power-config@58024800 {
|
|
compatible = "syscon";
|
|
reg = <0x58024800 0x400>;
|
|
};
|
|
|
|
adc_3: adc@58026000 {
|
|
compatible = "st,stm32h7-adc-core";
|
|
reg = <0x58026000 0x400>;
|
|
interrupts = <127>;
|
|
clocks = <&rcc ADC3_CK>;
|
|
clock-names = "bus";
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
|
|
adc3: adc@0 {
|
|
compatible = "st,stm32h7-adc";
|
|
#io-channel-cells = <1>;
|
|
reg = <0x0>;
|
|
interrupt-parent = <&adc_3>;
|
|
interrupts = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
mac: ethernet@40028000 {
|
|
compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
|
|
reg = <0x40028000 0x8000>;
|
|
reg-names = "stmmaceth";
|
|
interrupts = <61>;
|
|
interrupt-names = "macirq";
|
|
clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
|
|
clocks = <&rcc ETH1MAC_CK>, <&rcc ETH1TX_CK>, <&rcc ETH1RX_CK>;
|
|
st,syscon = <&syscfg 0x4>;
|
|
snps,pbl = <8>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|
|
&systick {
|
|
clock-frequency = <250000000>;
|
|
status = "okay";
|
|
};
|